Keil Logo

Technical Support

On-Line Manuals

µVision User's Guide

About µVision User Interface Creating Applications Debugging Start Debugging Start Energy Measurement without Debug Application Program Execution Debug Windows and Dialogs Breakpoints Window Call Stack and Locals Window Code Coverage Command Window Component Viewer Disassembly Window Editor Window Event Recorder Setup Event Recorder Event Recorder Window Events Filtering Event Statistics Window Post-mortem Analysis Event Viewer Execution Profiler Instruction Trace Window System Analyzer Usage tips Save System Analyzer Contents Statistics Restrictions Logic Analyzer Setup Setup in Detail Restrictions Cortex-M Trace Configuration Memory Map Memory Window Performance Analyzer Registers Window Serial Window Debug (printf) Viewer Symbols Window System Viewer Adding System Viewer Windows System and Thread Viewer Thread States Toolbox Trace Data Window Trace Navigation Trace Exceptions Event Counters ULINKplus Window Watch Window Core Peripherals Cortex-M0 and Cortex-M0+ Nested Vector Interrupt Controller System Control and Configuration System Tick Timer Fault Reports (Cortex-M0+ only) Cortex-M3, Cortex-M4, and Cortex-M7 Nested Vector Interrupt Controller System Control and Configuration System Tick Timer Fault Reports Memory Protection Unit Cortex-M23/M33/M35P and Cortex-M55 Nested Vector Interrupt Controller System Control and Configuration System Tick Timer Fault Reports Memory Protection Unit Security Attribution Unit M-Profile Vector Extension (MVE) Debug Scripting Expressions Constants System Variables Peripheral Variables I/O Ports Serial Ports Program Variables (Symbols) Fully Qualified Symbols Non-Qualified Symbols Literal Symbols Using Symbols Line Numbers Bit Addresses Type Specifications Memory Attribution Specifiers Operators Differences between µVision and C Expression Examples Code and Data Trace (Cortex-M) Trace Features Configuring Trace Tracepoint Expressions Tracepoint Intrinsics Tracepoint Limitations Tracepoint Marks Tips and Tricks Review Peripherals and CPU Configuration Simulate I/O Ports Simulate Interrupts and Clock Inputs Simulate external I/O Devices Assign Serial I/O to a PC COM Port Check Illegal Memory Access Command Input from File Preset I/O Ports or Memory Contents Write Debug Output to a File Keyboard Shortcuts TPIU Initialization after RESET (Cortex-M) Prevent Opening Files Show Japanese Messages Debug Commands Debug Functions Simulation Flash Programming Dialogs Utilities Command Line Example Programs Appendix

Fault Reports (Cortex-M0+ only)

The Debug Fault Status Register (DFSR) can monitor:

  • external debug requests.
  • vector catches.
  • data watchpoint match.
  • breakpoint instruction execution and BPU comparator matches.
  • halt requests.

picture: M0_FAULTS

You can configure (where applicable) the processor behavior using the following control groups:

Debug Faults
Shows the Debug Fault Status Register (DFSR) settings.


DBG_FAULT_STAT Shows the content of the DFSR register (in HEX) located at memory address 0xE000ED30. Reset value is 0x00000000. The register is sticky read/write clear. This means, it can be read normally. Writing a 1 to a bit clears that bit.
  • 0 (unchecked) = no halt request.
  • 1 (checked) = halt requested by DAP or halted with a debugging step command.
BKPT The BKPT flag is set by the execution of the BKPT instruction or on an instruction whose address triggered the breakpoint comparator match. When the processor has halted, the return PC points to the address of the breakpointed instruction.
  • 0 (unchecked) = no BKPT instruction or hardware breakpoint match.
  • 1 (checked) = BKPT instruction or hardware breakpoint match.
DWTRAP The Data Watchpoint (DW) flag stops the processor at the current instruction or at the next instruction.
  • 0 (unchecked) = no DW match.
  • 1 (checked) = DW match.
VCATCH When the VCATCH flag is set, a flag in the Debug Exception and Monitor Control Register is also set to indicate the type of vector catch.
  • 0 (unchecked) = no vector catch occurred.
  • 1 (checked) = vector catch occurred.
EXTERNAL When the External debug request flag is set, then the processor stops on next instruction boundary.
  • 0 (unchecked) = no EDBGRQ has occurred.
  • 1 (checked) = EDBGRQ has halted the core.

Application access to fault reports

You can access peripheral registers and related functions from the user application. As a minimum, the files <device>.h and <core_cm#>.h define the register layout, base addresses, and access definitions. Refer to CMSIS-CORE – Peripheral Access for details.

  Arm logo
Important information

This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.

Change Settings

Privacy Policy Update

Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.