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NXP LPC17xx Devices

NXP LPC17xx devices support all CoreSight features including ETM trace. No additional target resources are needed for debugging. By default, LPC17xx devices debug in JTAG mode, and can be switched to Serial Wire mode. LPC17xx devices offer ETM, ITM, and DWT trace data.

To use the CoreSight trace functionalities, the LPC17xx device, the debugger adapter and connector, as well as µVision have to be configured properly:


  • While debugging, the LPC17xx cannot wake up in the usual way from deep-sleep and power-down modes. Preferably avoid to use these modes during debugging.
  • Also, while debugging, the SYSTICK timer and the Repetitive Interrupt Timer (RIT) are stopped automatically whenever the CPU is stopped. Other peripherals are not affected.
  • If the Repetitive Interrupt Timers is configured such that its PLCK is lower than the CPU clock rate, it might not increment predictably during single-stepping operations.
  • Debugging is disabled when Code Read Protection (CRP) is enabled.
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