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BL51 Linker directives are entered on the command line after the output file. Multiple directives must be separated by at least one empty space. Each directive may be entered only once on the command line. If a directive is entered twice, the linker generates an error.

The following table describes all BL51 Linker directives.

Directive Description
BANKx Specifies the code bank in which to locate the specified segment.
BANKAREA Specifies the address range where code banks are located.

Locates BIT segments.


Locates CODE segments.


Locates DATA segments.

DISABLEWARNING Disables generation of specified warning numbers.
IBANKING Uses the on-chip code banking hardware of the Mentor M8051EW core, the Infineon SDA30C16x/26x, and the Micronas SDA555x.

Locates IDATA segments.

IXREF Enables cross reference details in the listing file.
NAME Specifies the module name of the output file.
NOAJMP Avoids AJMP instructions in bank switch code.
NOAMAKE Excludes AMAKE information from the object file.
NODEBUGLINES Excludes line number information from the output object file.
NODEBUGPUBLICS Excludes public symbol information from the output object file.
NODEBUGSYMBOLS Excludes local symbol information from the output object file.
NODEFAULTLIBRARY Disables automatic inclusion of run-time library routines.
NOINDIRECTCALL Disables bank switching code for indirectly called functions.
NOJMPTAB Disables generation of the code banking jump table.
NOLINES Excludes line number information from the listing file and object file.
NOMAP Excludes the memory map from the listing file.
NOOVERLAY Disables data segment overlaying.
NOPRINT Disables generation of the listing (MAP) file.
NOPUBLICS Excludes public symbols from the listing file and object file.
NOSORTSIZE Disables sorting sections by size prior to locating.
NOSYMBOLS Excludes local symbols from the listing file and object file.
OVERLAY Modifies the call tree for overlaying of local bit and data segments.
PAGELENGTH Specifies the number of lines on a page in the listing file.
PAGEWIDTH Specifies the number of characters on a line in the listing file.

Locates PDATA segments.

PRECEDE Locates segments in DATA memory prior to other relocatable BIT, DATA, and IDATA segments.
PRINT Specifies the name of the listing file.
RAMSIZE Specifies the number of bytes of DATA and IDATA.
RECURSIONS Specifies the maximum number of recursive calls detected before link failure.
REGFILE Specifies the name of the register definition file for global register coloring.
RTX51 Specifies that the RTX51 Real-Time Kernel is used.
RTX51TINY Specifies that the RTX51 Tiny Real-Time Kernel is used.
SPEEDOVL Ignores references from constant segments to program segments during overlay analysis.
STACK Locates segments in the uppermost IDATA memory space.

Locates XDATA segments.

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