Factors that influence function inlining

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Arm^® Compiler Reference Guide

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C4.5 Factors that influence function inlining

There are a number of factors that influence how the linker inlines functions.

The following factors influence the way functions are inlined:

The linker handles only the simplest cases and does not inline any instructions that read or write to the PC because this depends on the location of the function.
If your image contains both A32 and T32 code, functions that are called from the opposite state must be built for interworking. The linker can inline functions containing up to two 16-bit T32 instructions. However, an A32 calling function can only inline functions containing either a single 16-bit encoded T32 instruction or a 32-bit encoded T32 instruction.

The action that the linker takes depends on the size of the function being called. The following table shows the state of both the calling function and the function being called:

Table C4-1 Inlining small functions

Calling function state	Called function state	Called function size
A32	A32	4 to 8 bytes
A32	T32	2 to 6 bytes
T32	T32	2 to 6 bytes

The linker can inline in different states if there is an equivalent instruction available. For example, if a T32 instruction is adds r0, r0 then the linker can inline the equivalent A32 instruction. It is not possible to inline from A32 to T32 because there is less chance of T32 equivalent to an A32 instruction.

For a function to be inlined, the last instruction of the function must be either:
```
MOV pc, lr
```
or
```
BX lr
```
A function that consists only of a return sequence can be inlined as a NOP.
A conditional A32 instruction can only be inlined if either:
- The condition on the BL matches the condition on the instruction being inlined. For example, BLEQ can only inline an instruction with a matching condition like ADDEQ.
- The BL instruction or the instruction to be inlined is unconditional. An unconditional A32 BL can inline any conditional or unconditional instruction that satisfies all the other criteria. An instruction that cannot be conditionally executed cannot be inlined if the BL instruction is conditional.
A BL that is the last instruction of a T32 If-Then (IT) block cannot inline a 16-bit encoded T32 instruction or a 32-bit MRS, MSR, or CPS instruction. This is because the IT block changes the behavior of the instructions within its scope so inlining the instruction changes the behavior of the program.