A Type 3 image is similar to a Type 2 image except that the single load region is split into multiple root load regions.
The following figure shows the load and execution view for a Type 3 image without
execute-only (XO) code:
Figure
C3-6 Simple Type 3 image
Use the following command for images of this type:
armlink --cpu=8-A.32 --split --ro_base 0x8000 --rw_base 0xE000
Load view
In the load view, the first load region consists of the RO output section, and the second
load region consists of the RW output section. The ZI output section does not exist at load
time. It is created before execution, using the description of the output section contained
in the image file.
Execution view
In the execution view, the first execution region contains the RO output section, the
second execution region contains the RW output section, and the third execution region
contains the ZI output section.
The execution address of the RO region is the same as its load address, so
the contents of the RO output section do not have to be moved or copied from their load
address to their execution address.
The execution address of the RW region is also the same as its load address, so the
contents of the RW output section are not moved from their load address to their execution
address. However, the ZI output section is created at run-time and is placed contiguously
with the RW region.
Specify the load and execution address using the following linker options:
--ro_base=address
-
Instructs armlink to set the load and execution address of the
region containing the RO section at a four-byte aligned
address
, for example, the address of the first
location in ROM. If you do not use the --ro_base
option to specify
the address, the default value of 0x8000
is used by armlink
.
--rw_base=address
Instructs armlink to set the execution address of the region
containing the RW output section at a four-byte aligned
address
. If this option is used with
--split
, this specifies both the load and execution addresses of
the RW region, for example, a root region.
--split
Splits the default single load region, that contains both the RO and RW output
sections, into two root load regions:
You can then place them separately using --ro_base
and
--rw_base
.
Load view for images containing XO sections
For images that contain XO sections, the XO output section is placed at the address
specified by --ro_base
. The RO and RW output sections are placed
consecutively and immediately after the XO section.
If you use --split
, then the one load region contains the XO and RO output
sections, and the other contains the RW output section.
Execution view for images containing XO sections
For images that contain XO sections, the XO execution region is placed at the address
specified by --ro_base
. The RO execution region is placed contiguously and
immediately after the XO execution region.
If you specify --split
, then the XO and RO execution regions are placed in
the first load region, and the RW and ZI execution regions are placed in the second load
region.
If you specify --xo_base address
, then the XO execution region is placed at the specified
address in a separate load region from the RO execution region.
Note:
XO memory
is supported only for Arm®v7‑M and Armv8‑M architectures.