-ffixed-rN

Default

By default, the compiler is free to use general-purpose registers for any purpose, such as for temporary storage of local variables, within the requirements of the Arm ABI.

Parameters

N specifies the register number from 6-11, and enables you to reserve general-purpose registers R6 to R11.

Restrictions

This feature is only available for AArch32 state.

If you use -mpixolib, then you must not use the following registers as global named register variables:

• R8
• R9

If you use -frwpi or -frwpi-lowering, then you must not use register R9 as a global named register variable. armclang thows an error if you do.

The Arm ABI reserves the following registers for use as a frame pointer if needed:

• R7 in T32 state.
• R11 in A32 state.

armclang thows an error if you use global named register variables under these conditions.

Code size

Declaring a general-purpose register as a global named register variable means that the register is not available to the compiler for other operations. If you declare too many global named register variables, code size increases significantly. Sometimes, your program might not compile, for example if there are insufficient registers available to compute a particular expression.

Operation

-ffixed-rN reserves the specified general-purpose register so that the compiler does not use the specified register unless required for Arm ABI compliance. You must reserve the register if you want to use the register as a global named register variable. You can also use -ffixed-rN for generating compatible objects, for example to generate objects that you want to link with other objects that have been built with -frwpi.

For example, -ffixed-r8 reserves register R8 so that the compiler cannot use R8 for storing temporary variables.

Examples

The following example demonstrates the effect of the -ffixed-rN option.

Source file bar.c contains the following code:

int bar(unsigned int i, unsigned int j,
        unsigned int k, unsigned int l,
        unsigned int m, unsigned int n,
        unsigned int o, unsigned int p,
        unsigned int q, unsigned int r,
        unsigned int s)
{
    return (i + j + k + l + m + n + o + p + q + r + s);
}

Compile this code without any -ffixed-rN option:

armclang --target=arm-arm-none-eabi -march=armv8-a -O0 -S bar.c -o bar.s

The generated assembly file, bar.s, saves the registers that it needs to use, which are {r4, r5, r6, r7, r8, lr}:

bar:
    .fnstart
    .cfi_sections .debug_frame
    .cfi_startproc
@ %bb.0:
    .save    {r4, r5, r6, r7, r8, lr}
    push    {r4, r5, r6, r7, r8, lr}
    .cfi_def_cfa_offset 24
    .cfi_offset lr, -4
    .cfi_offset r8, -8
    .cfi_offset r7, -12
    .cfi_offset r6, -16
    .cfi_offset r5, -20
    .cfi_offset r4, -24
    .pad    #16
    sub    sp, sp, #16
       
    /* Code in between is hidden */

    add    sp, sp, #16
    pop    {r4, r5, r6, r7, r8, pc}
.Lfunc_end0:

To ensure that the compiler does not use registers R6, R7, and R8, compile the same code in foo.c with the -ffixed-r6, -ffixed-r7, and -ffixed-r8 options:

armclang --target=arm-arm-none-eabi -march=armv8-a -O0 -ffixed-r6 -ffixed-r7 -ffixed-r8 -S bar.c -o bar.s

The generated assembly file, bar.s, saves the registers that it needs to use, which are {r4, r5, r9, r10, r11, lr}. In this bar.s, the compiler uses registers R9, R10, and R11 instead of R6, R7, and R8:

bar:
    .fnstart
    .cfi_sections .debug_frame
    .cfi_startproc
@ %bb.0:
    .save    {r4, r5, r9, r10, r11, lr}
    push    {r4, r5, r9, r10, r11, lr}
    .cfi_def_cfa_offset 24
    .cfi_offset lr, -4
    .cfi_offset r11, -8
    .cfi_offset r10, -12
    .cfi_offset r9, -16
    .cfi_offset r5, -20
    .cfi_offset r4, -24
    .pad    #16
    sub    sp, sp, #16
       
    /* Code in between is hidden */

    add    sp, sp, #16
    pop    {r4, r5, r9, r10, r11, pc}
.Lfunc_end0: