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Preface Arm Compiler Tools Overview armclang Reference armlink Reference fromelf Reference armar Reference armasm Legacy Assembler Reference armasm Command-line Options --16 --32 --apcs=qualifier…qualifier --arm --arm_only --bi --bigend --brief_diagnostics, --no_brief_diagnostics --checkreglist --cpreproc --cpreproc_opts=option[,option,…] --cpu=list (armasm) --cpu=name (armasm) --debug --depend=dependfile --depend_format=string --diag_error=tag[,tag,…] (armasm) --diag_remark=tag[,tag,…] (armasm) --diag_style={arm|ide|gnu} (armasm) --diag_suppress=tag[,tag,…] (armasm) --diag_warning=tag[,tag,…] (armasm) --dllexport_all --dwarf2 --dwarf3 --errors=errorfile --exceptions, --no_exceptions --exceptions_unwind, --no_exceptions_unwind --execstack, --no_execstack --execute_only --fpmode=model --fpu=list (armasm) --fpu=name (armasm) -g (armasm) --help (armasm) -idir[,dir, …] --keep (armasm) --length=n --li --library_type=lib --list=file --list= --littleend -m (armasm) --maxcache=n --md --no_code_gen --no_esc --no_hide_all --no_regs --no_terse --no_warn -o filename (armasm) --pd --predefine "directive" --reduce_paths, --no_reduce_paths --regnames --report-if-not-wysiwyg --show_cmdline (armasm) --thumb --unaligned_access, --no_unaligned_access --unsafe --untyped_local_labels --version_number (armasm) --via=filename (armasm) --vsn (armasm) --width=n --xref Structure of armasm Assembly Language Modules Syntax of source lines in armasm syntax assembly l Literals ELF sections and the AREA directive An example armasm syntax assembly language module Writing A32/T32 Instructions in armasm Syntax Asse About the Unified Assembler Language Syntax differences between UAL and A64 assembly la Register usage in subroutine calls Load immediate values Load immediate values using MOV and MVN Load immediate values using MOV32 Load immediate values using LDR Rd, =const Literal pools Load addresses into registers Load addresses to a register using ADR Load addresses to a register using ADRL Load addresses to a register using LDR Rd, =label Other ways to load and store registers Load and store multiple register instructions Load and store multiple register instructions in A Stack implementation using LDM and STM Stack operations for nested subroutines Block copy with LDM and STM Memory accesses The Read-Modify-Write operation Optional hash with immediate constants Use of macros Test-and-branch macro example Unsigned integer division macro example Instruction and directive relocations Symbol versions Frame directives Exception tables and Unwind tables Using armasm armasm command-line syntax Specify command-line options with an environment v Using stdin to input source code to the assembler Built-in variables and constants Identifying versions of armasm in source code Diagnostic messages Interlocks diagnostics Automatic IT block generation in T32 code T32 branch target alignment T32 code size diagnostics A32 and T32 instruction portability diagnostics T32 instruction width diagnostics Two pass assembler diagnostics Using the C preprocessor Address alignment in A32/T32 code Address alignment in A64 code Instruction width selection in T32 code Symbols, Literals, Expressions, and Operators in a Symbol naming rules Variables Numeric constants Assembly time substitution of variables Register-relative and PC-relative expressions Labels Labels for PC-relative addresses Labels for register-relative addresses Labels for absolute addresses Numeric local labels Syntax of numeric local labels String expressions String literals Numeric expressions Syntax of numeric literals Syntax of floating-point literals Logical expressions Logical literals Unary operators Binary operators Multiplicative operators String manipulation operators Shift operators Addition, subtraction, and logical operators Relational operators Boolean operators Operator precedence Difference between operator precedence in assembly armasm Directives Reference Alphabetical list of directives armasm assembly la About armasm assembly language control directives About frame directives Directives that can be omitted in pass 2 of the as ALIAS ALIGN AREA ARM or CODE32 directive ASSERT ATTR CN CODE16 directive COMMON CP DATA DCB DCD and DCDU DCDO DCFD and DCFDU DCFS and DCFSU DCI DCQ and DCQU DCW and DCWU END ENDFUNC or ENDP ENTRY EQU EXPORT or GLOBAL EXPORTAS FIELD FRAME ADDRESS FRAME POP FRAME PUSH FRAME REGISTER FRAME RESTORE FRAME RETURN ADDRESS FRAME SAVE FRAME STATE REMEMBER FRAME STATE RESTORE FRAME UNWIND ON FRAME UNWIND OFF FUNCTION or PROC GBLA, GBLL, and GBLS GET or INCLUDE IF, ELSE, ENDIF, and ELIF IMPORT and EXTERN INCBIN INFO KEEP LCLA, LCLL, and LCLS LTORG MACRO and MEND MAP MEXIT NOFP OPT QN, DN, and SN RELOC REQUIRE REQUIRE8 and PRESERVE8 RLIST RN ROUT SETA, SETL, and SETS SPACE or FILL THUMB directive TTL and SUBT WHILE and WEND WN and XN armasm-Specific A32 and T32 Instruction Set Featur armasm support for the CSDB instruction A32 and T32 pseudo-instruction summary ADRL pseudo-instruction CPY pseudo-instruction LDR pseudo-instruction MOV32 pseudo-instruction NEG pseudo-instruction UND pseudo-instruction Appendixes

ALIGN

F6.6 ALIGN

The ALIGN directive aligns the current location to a specified boundary by padding with zeros or NOP instructions.

Syntax

ALIGN {expr{,offset{,pad{,padsize}}}}

where:

expr

is a numeric expression evaluating to any power of 2 from 20 to 231

offset

can be any numeric expression

pad

can be any numeric expression

padsize

can be 1, 2 or 4.

Operation

The current location is aligned to the next lowest address of the form:

offset + n * expr

n is any integer which the assembler selects to minimise padding.

If expr is not specified, ALIGN sets the current location to the next word (four byte) boundary. The unused space between the previous and the new current location are filled with:

  • Copies of pad, if pad is specified.

  • NOP instructions, if all the following conditions are satisfied:

    • pad is not specified.

    • The ALIGN directive follows A32 or T32 instructions.

    • The current section has the CODEALIGN attribute set on the AREA directive.

  • Zeros otherwise.

pad is treated as a byte, halfword, or word, according to the value of padsize. If padsize is not specified, pad defaults to bytes in data sections, halfwords in T32 code, or words in A32 code.

Usage

Use ALIGN to ensure that your data and code is aligned to appropriate boundaries. This is typically required in the following circumstances:

  • The ADR T32 pseudo-instruction can only load addresses that are word aligned, but a label within T32 code might not be word aligned. Use ALIGN 4 to ensure four-byte alignment of an address within T32 code.

  • Use ALIGN to take advantage of caches on some Arm® processors. For example, the Arm940T™ processor has a cache with 16-byte lines. Use ALIGN 16 to align function entries on 16-byte boundaries and maximize the efficiency of the cache.

  • A label on a line by itself can be arbitrarily aligned. Following A32 code is word-aligned (T32 code is halfword aligned). The label therefore does not address the code correctly. Use ALIGN 4 (or ALIGN 2 for T32) before the label.

Alignment is relative to the start of the ELF section where the routine is located. The section must be aligned to the same, or coarser, boundaries. The ALIGN attribute on the AREA directive is specified differently.

Examples

        AREA    cacheable, CODE, ALIGN=3
rout1   ; code         ; aligned on 8-byte boundary
        ; code
        MOV     pc,lr  ; aligned only on 4-byte boundary
        ALIGN   8      ; now aligned on 8-byte boundary
rout2   ; code

In the following example, the ALIGN directive tells the assembler that the next instruction is word aligned and offset by 3 bytes. The 3 byte offset is counted from the previous word aligned address, resulting in the second DCB placed in the last byte of the same word and 2 bytes of padding are to be added.

        AREA    OffsetExample, CODE
        DCB     1      ; This example places the two bytes in the first
        ALIGN   4,3    ; and fourth bytes of the same word.
        DCB     1      ; The second DCB is offset by 3 bytes from the 
                       ; first DCB.

In the following example, the ALIGN directive tells the assembler that the next instruction is word aligned and offset by 2 bytes. Here, the 2 byte offset is counted from the next word aligned address, so the value n is set to 1 (n=0 clashes with the third DCB). This time three bytes of padding are to be added.

        AREA    OffsetExample1, CODE
        DCB     1      ; In this example, n cannot be 0 because it
        DCB     1      ; clashes with the 3rd DCB. The assembler 
        DCB     1      ; sets n to 1.
        ALIGN   4,2    ; The next instruction is word aligned and 
        DCB     2      ; offset by 2.

In the following example, the DCB directive makes the PC misaligned. The ALIGN directive ensures that the label subroutine1 and the following instruction are word aligned.

        AREA    Example, CODE, READONLY
start   LDR     r6,=label1
        ; code
        MOV     pc,lr
label1  DCB     1      ; PC now misaligned
        ALIGN          ; ensures that subroutine1 addresses
subroutine1            ; the following instruction.
        MOV r5,#0x5
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