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Preface Arm Compiler Tools Overview armclang Reference armlink Reference fromelf Reference armar Reference armasm Legacy Assembler Reference armasm Command-line Options --16 --32 --apcs=qualifier…qualifier --arm --arm_only --bi --bigend --brief_diagnostics, --no_brief_diagnostics --checkreglist --cpreproc --cpreproc_opts=option[,option,…] --cpu=list (armasm) --cpu=name (armasm) --debug --depend=dependfile --depend_format=string --diag_error=tag[,tag,…] (armasm) --diag_remark=tag[,tag,…] (armasm) --diag_style={arm|ide|gnu} (armasm) --diag_suppress=tag[,tag,…] (armasm) --diag_warning=tag[,tag,…] (armasm) --dllexport_all --dwarf2 --dwarf3 --errors=errorfile --exceptions, --no_exceptions --exceptions_unwind, --no_exceptions_unwind --execstack, --no_execstack --execute_only --fpmode=model --fpu=list (armasm) --fpu=name (armasm) -g (armasm) --help (armasm) -idir[,dir, …] --keep (armasm) --length=n --li --library_type=lib --list=file --list= --littleend -m (armasm) --maxcache=n --md --no_code_gen --no_esc --no_hide_all --no_regs --no_terse --no_warn -o filename (armasm) --pd --predefine "directive" --reduce_paths, --no_reduce_paths --regnames --report-if-not-wysiwyg --show_cmdline (armasm) --thumb --unaligned_access, --no_unaligned_access --unsafe --untyped_local_labels --version_number (armasm) --via=filename (armasm) --vsn (armasm) --width=n --xref Structure of armasm Assembly Language Modules Syntax of source lines in armasm syntax assembly l Literals ELF sections and the AREA directive An example armasm syntax assembly language module Writing A32/T32 Instructions in armasm Syntax Asse About the Unified Assembler Language Syntax differences between UAL and A64 assembly la Register usage in subroutine calls Load immediate values Load immediate values using MOV and MVN Load immediate values using MOV32 Load immediate values using LDR Rd, =const Literal pools Load addresses into registers Load addresses to a register using ADR Load addresses to a register using ADRL Load addresses to a register using LDR Rd, =label Other ways to load and store registers Load and store multiple register instructions Load and store multiple register instructions in A Stack implementation using LDM and STM Stack operations for nested subroutines Block copy with LDM and STM Memory accesses The Read-Modify-Write operation Optional hash with immediate constants Use of macros Test-and-branch macro example Unsigned integer division macro example Instruction and directive relocations Symbol versions Frame directives Exception tables and Unwind tables Using armasm armasm command-line syntax Specify command-line options with an environment v Using stdin to input source code to the assembler Built-in variables and constants Identifying versions of armasm in source code Diagnostic messages Interlocks diagnostics Automatic IT block generation in T32 code T32 branch target alignment T32 code size diagnostics A32 and T32 instruction portability diagnostics T32 instruction width diagnostics Two pass assembler diagnostics Using the C preprocessor Address alignment in A32/T32 code Address alignment in A64 code Instruction width selection in T32 code Symbols, Literals, Expressions, and Operators in a Symbol naming rules Variables Numeric constants Assembly time substitution of variables Register-relative and PC-relative expressions Labels Labels for PC-relative addresses Labels for register-relative addresses Labels for absolute addresses Numeric local labels Syntax of numeric local labels String expressions String literals Numeric expressions Syntax of numeric literals Syntax of floating-point literals Logical expressions Logical literals Unary operators Binary operators Multiplicative operators String manipulation operators Shift operators Addition, subtraction, and logical operators Relational operators Boolean operators Operator precedence Difference between operator precedence in assembly armasm Directives Reference Alphabetical list of directives armasm assembly la About armasm assembly language control directives About frame directives Directives that can be omitted in pass 2 of the as ALIAS ALIGN AREA ARM or CODE32 directive ASSERT ATTR CN CODE16 directive COMMON CP DATA DCB DCD and DCDU DCDO DCFD and DCFDU DCFS and DCFSU DCI DCQ and DCQU DCW and DCWU END ENDFUNC or ENDP ENTRY EQU EXPORT or GLOBAL EXPORTAS FIELD FRAME ADDRESS FRAME POP FRAME PUSH FRAME REGISTER FRAME RESTORE FRAME RETURN ADDRESS FRAME SAVE FRAME STATE REMEMBER FRAME STATE RESTORE FRAME UNWIND ON FRAME UNWIND OFF FUNCTION or PROC GBLA, GBLL, and GBLS GET or INCLUDE IF, ELSE, ENDIF, and ELIF IMPORT and EXTERN INCBIN INFO KEEP LCLA, LCLL, and LCLS LTORG MACRO and MEND MAP MEXIT NOFP OPT QN, DN, and SN RELOC REQUIRE REQUIRE8 and PRESERVE8 RLIST RN ROUT SETA, SETL, and SETS SPACE or FILL THUMB directive TTL and SUBT WHILE and WEND WN and XN armasm-Specific A32 and T32 Instruction Set Featur armasm support for the CSDB instruction A32 and T32 pseudo-instruction summary ADRL pseudo-instruction CPY pseudo-instruction LDR pseudo-instruction MOV32 pseudo-instruction NEG pseudo-instruction UND pseudo-instruction Appendixes

Unsigned integer division macro example

F3.24 Unsigned integer division macro example

You can use a macro to perform unsigned integer division.

The macro takes the following parameters:


The register that holds the divisor.


The register that holds the dividend before the instructions are executed. After the instructions are executed, it holds the remainder.


The register where the quotient of the division is placed. It can be NULL ("") if only the remainder is required.


A temporary register used during the calculation.

Example unsigned integer division with a macro

$Lab    DivMod  $Div,$Top,$Bot,$Temp
        ASSERT  $Top <> $Bot        ; Produce an error message if the
        ASSERT  $Top <> $Temp       ; registers supplied are
        ASSERT  $Bot <> $Temp       ; not all different
        IF      "$Div" <> ""
            ASSERT  $Div <> $Top    ; These three only matter if $Div
            ASSERT  $Div <> $Bot    ; is not null ("")
            ASSERT  $Div <> $Temp   ;
        MOV     $Temp, $Bot           ; Put divisor in $Temp
        CMP     $Temp, $Top, LSR #1   ; double it until
90      MOVLS   $Temp, $Temp, LSL #1  ; 2 * $Temp > $Top
        CMP     $Temp, $Top, LSR #1
        BLS     %b90                ; The b means search backwards
        IF      "$Div" <> ""        ; Omit next instruction if $Div
                                    ; is null
            MOV     $Div, #0        ; Initialize quotient
91      CMP     $Top, $Temp         ; Can we subtract $Temp?
        SUBCS   $Top, $Top,$Temp    ; If we can, do so
        IF      "$Div" <> ""        ; Omit next instruction if $Div
                                    ; is null
            ADC     $Div, $Div, $Div  ; Double $Div
        MOV     $Temp, $Temp, LSR #1  ; Halve $Temp,
        CMP     $Temp, $Bot           ; and loop until
        BHS     %b91                  ; less than divisor

The macro checks that no two parameters use the same register. It also optimizes the code produced if only the remainder is required.

To avoid multiple definitions of labels if DivMod is used more than once in the assembler source, the macro uses numeric local labels (90, 91).

The following example shows the code that this macro produces if it is invoked as follows:

ratio  DivMod  R0,R5,R4,R2

Output from the example division macro

        ASSERT  r5 <> r4          ; Produce an error if the
        ASSERT  r5 <> r2          ; registers supplied are
        ASSERT  r4 <> r2          ; not all different
        ASSERT  r0 <> r5          ; These three only matter if $Div
        ASSERT  r0 <> r4          ; is not null ("")
        ASSERT  r0 <> r2          ;
        MOV     r2, r4            ; Put divisor in $Temp
        CMP     r2, r5, LSR #1    ; double it until
90      MOVLS   r2, r2, LSL #1    ; 2 * r2 > r5
        CMP     r2, r5, LSR #1
        BLS     %b90              ; The b means search backwards
        MOV     r0, #0            ; Initialize quotient
91      CMP     r5, r2            ; Can we subtract r2?
        SUBCS   r5, r5, r2        ; If we can, do so
        ADC     r0, r0, r0        ; Double r0
        MOV     r2, r2, LSR #1    ; Halve r2,
        CMP     r2, r4            ; and loop until
        BHS     %b91              ; less than divisor
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