To use this intrinsic, your source file must contain
#include <arm_compat.h>. This is only available
for targets in AArch32 state.
Note:
Typically, this intrinsic disables FIQ interrupts by
setting the F-bit in the CPSR. However, for v7-M and v8-M.mainline, it sets the fault mask
register (FAULTMASK). This intrinsic is not supported for v6-M and v8-M.baseline.
Syntax
int __disable_fiq(void)
Usage
int __disable_fiq(void);
disables fast interrupts and returns the value the FIQ interrupt mask has in the
PSR before disabling interrupts.
Return value
int
__disable_fiq(void);
returns the value the FIQ interrupt mask has in the PSR before disabling FIQ interrupts.
Restrictions
The __disable_fiq intrinsic can only be executed in privileged modes, that is, in non-user modes. In User mode, this intrinsic does not change the interrupt flags in the CPSR.
Example
void foo(void)
{
int was_masked = __disable_fiq();
/* ... */
if (!was_masked)
__enable_fiq();
}
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