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Compiler Getting Started Guide
Preface
Getting Started
Getting Started with the SVE features in Arm Compi
Using Common Compiler Options
Writing Optimized Code
Assembling Assembly Code
Using Assembly and Intrinsics in C or C++ Code
SVE Coding Considerations with Arm Compiler
Mapping Code and Data to the Target
Overlays
Embedded Software Development
Building Secure and Non-secure Images Using Armv8‑
Overview of the Linker
Getting Image Details
SysV Dynamic Linking
Overview of the fromelf Image Converter
Using fromelf
Overview of the Arm Librarian
Overview of the armasm Legacy Assembler
Supporting reference information
Arm Compiler User Guide Changes
Arm Compiler User Guide
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Arm® Compiler User Guide
Version 6.16
Copyright © 2016–2021 Arm Limited or its affiliates. All rights reserved.
Table of Contents
- Preface
- 1 Getting Started
- 1.1 Introduction to Arm® Compiler 6
- 1.2 About the Arm® Compiler toolchain assemblers
- 1.3 Installing Arm® Compiler
- 1.4 Accessing Arm® Compiler from Arm® Development Studio
- 1.5 Accessing Arm® Compiler from the Arm® Keil® µVision® IDE
- 1.6 Compiling a Hello World example
- 1.7 Using the integrated assembler
- 1.8 Running bare-metal images
- 1.9 Architectures supported by Arm® Compiler
- 1.10 Using Arm® Compiler securely in a shared environment
- 2 Getting Started with the SVE features in Arm® Compiler
- 3 Using Common Compiler Options
- 3.1 Mandatory armclang options
- 3.2 Common Arm® Compiler toolchain options
- 3.3 Selecting source language options
- 3.4 Selecting optimization options
- 3.5 Building to aid debugging
- 3.6 Linking object files to produce an executable
- 3.7 Linker options for mapping code and data to target memory
- 3.8 Passing options from the compiler to the linker
- 3.9 Controlling diagnostic messages
- 3.10 Selecting floating-point options
- 3.11 Compilation tools command-line option rules
- 4 Writing Optimized Code
- 4.1 Effect of the volatile keyword on compiler optimization
- 4.2 Optimizing loops
- 4.3 Inlining functions
- 4.4 Stack use in C and C++
- 4.5 Packing data structures
- 4.6 Optimizing for code size or performance
- 4.7 Methods of minimizing function parameter passing overhead
- 4.8 Optimizing across modules with Link-Time Optimization
- 4.9 Scatter file section or object placement with Link-Time Optimization
- 4.10 How optimization affects the debug experience
- 5 Assembling Assembly Code
- 6 Using Assembly and Intrinsics in C or C++ Code
- 7 SVE Coding Considerations with Arm® Compiler
- 8 Mapping Code and Data to the Target
- 8.1 What the linker does to create an image
- 8.2 Placing data items for target peripherals with a scatter file
- 8.3 Placing the stack and heap with a scatter file
- 8.4 Root region
- 8.5 Placing functions and data in a named section
- 8.6 Loading armlink-generated ELF files that have complex scatter-files
- 8.7 Placement of functions and data at specific addresses
- 8.7.1 Placement of __at sections at a specific address
- 8.7.2 Restrictions on placing __at sections
- 8.7.3 Automatic placement of __at sections
- 8.7.4 Manual placement of __at sections
- 8.7.5 Place a key in flash memory with an __at section
- 8.7.6 Placing constants at fixed locations
- 8.7.7 Placing jump tables in ROM
- 8.7.8 Placing a variable at a specific address without scatter-loading
- 8.7.9 Placing a variable at a specific address with scatter-loading
- 8.8 Bare-metal Position Independent Executables
- 8.9 Placement of Arm® C and C++ library code
- 8.10 Manual placement of unassigned sections
- 8.10.1 Default rules for placing unassigned sections
- 8.10.2 Command-line options for controlling the placement of unassigned sections
- 8.10.3 Prioritizing the placement of unassigned sections
- 8.10.4 Specify the maximum region size permitted for placing unassigned sections
- 8.10.5 Examples of using placement algorithms for .ANY sections
- 8.10.6 Example of next_fit algorithm showing behavior of full regions, selectors, and priority
- 8.10.7 Examples of using sorting algorithms for .ANY sections
- 8.10.8 Behavior when .ANY sections overflow because of linker-generated content
- 8.11 Placing veneers with a scatter file
- 8.12 Preprocessing a scatter file
- 8.13 Reserving an empty block of memory
- 8.14 Alignment of regions to page boundaries
- 8.15 Alignment of execution regions and input sections
- 9 Overlays
- 10 Embedded Software Development
- 10.1 About embedded software development
- 10.2 Default compilation tool behavior
- 10.3 C library structure
- 10.4 Default memory map
- 10.5 Application startup
- 10.6 Tailoring the C library to your target hardware
- 10.7 Reimplementing C library functions
- 10.8 Tailoring the image memory map to your target hardware
- 10.9 About the scatter-loading description syntax
- 10.10 Root regions
- 10.11 Placing the stack and heap
- 10.12 Run-time memory models
- 10.13 Reset and initialization
- 10.14 The vector table
- 10.15 ROM and RAM remapping
- 10.16 Local memory setup considerations
- 10.17 Stack pointer initialization
- 10.18 Hardware initialization
- 10.19 Execution mode considerations
- 10.20 Target hardware and the memory map
- 10.21 Execute-only memory
- 10.22 Building applications for execute-only memory
- 10.23 Vector table for ARMv6 and earlier, ARMv7-A and ARMv7-R profiles
- 10.24 Vector table for M-profile architectures
- 10.25 Vector Table Offset Register
- 10.26 Integer division-by-zero errors in C code
- 11 Building Secure and Non-secure Images Using Arm®v8‑M Security Extensions
- 12 Overview of the Linker
- 13 Getting Image Details
- 14 SysV Dynamic Linking
- 15 Overview of the fromelf Image Converter
- 16 Using fromelf
- 16.1 General considerations when using fromelf
- 16.2 Examples of processing ELF files in an archive
- 16.3 Options to protect code in image files with fromelf
- 16.4 Options to protect code in object files with fromelf
- 16.5 Option to print specific details of ELF files
- 16.6 Using fromelf to find where a symbol is placed in an executable ELF image
- 17 Overview of the Arm® Librarian
- 18 Overview of the armasm Legacy Assembler
- A Supporting reference information
- A.1 Support level definitions
- A.2 Standards compliance in Arm® Compiler
- A.3 Compliance with the ABI for the Arm® Architecture (Base Standard)
- A.4 GCC compatibility provided by Arm® Compiler 6
- A.5 Locale support in Arm® Compiler
- A.6 Toolchain environment variables
- A.7 Clang and LLVM documentation
- A.8 Further reading
- B Arm® Compiler User Guide Changes
List of Figures
- 1-1 A typical tool usage flow diagram
- 4-1 Structure without packing attribute or pragma
- 4-2 Structure with attribute packed
- 4-3 Structure with pragma pack with 1 byte alignment
- 4-4 Structure with pragma pack with 2 byte alignment
- 4-5 Structure with pragma pack with 4 byte alignment
- 4-6 Structure with attribute packed on individual member
- 4-7 Link-Time Optimization
- 8-1 Memory map for fixed execution regions
- 8-2 .ANY contingency
- 8-3 Reserving a region for the stack
- 10-1 C library structure
- 10-2 Default memory map
- 10-3 Linker placement rules
- 10-4 Default initialization sequence
- 10-5 Retargeting the C library
- 10-6 Scatter-loading description syntax
- 10-7 One-region model
- 10-8 Two-region model
- 10-9 Initialization sequence
- A-1 Integration boundaries in Arm Compiler 6.
List of Tables
- 3-1 armclang common options
- 3-2 armlink common options
- 3-3 armar common options
- 3-4 fromelf common options
- 3-5 armasm common options
- 3-6 Source language variants
- 3-7 Exceptions to the support for the language standards
- 3-8 Optimization goals
- 3-9 Example code generation with -O0
- 3-10 Example code generation with -O1
- 3-11 armclang linker control options
- 3-12 Common diagnostic options
- 3-13 Options for floating-point selection
- 3-14 Floating-point linkage for AArch32
- 4-1 C code for nonvolatile and volatile buffer loops
- 4-2 Disassembly for nonvolatile and volatile buffer loop
- 4-3 Loop unrolling pragmas
- 4-4 Loop optimizing example
- 4-5 Loop examples
- 4-6 Example loops
- 4-7 Assembly code from vectorizable and non-vectorizable loops
- 4-8 C code for incrementing and decrementing loops
- 4-9 C disassembly for incrementing and decrementing loops
- 4-10 Function inlining
- 4-11 Effect of -fno-inline-functions
- 4-12 Packing members in a structure or union
- 4-13 Packing structures
- 4-14 Packing individual members
- 7-1 Element selection by predicate type svbool_t
- 7-2 Common addressing mode disambiguators
- 8-1 Input section properties for placement of .ANY sections
- 8-2 Input section properties for placement of sections with next_fit
- 8-3 Input section properties and ordering for sections_a.o and sections_b.o
- 8-4 Sort order for descending_size algorithm
- 8-5 Sort order for cmdline algorithm
- 9-1 Using relative offset in overlays
- A-1 Environment variables used by the toolchain
- B-1 Changes between 6.16 and 6.15
- B-2 Changes between 6.15 and 6.14
Release Information
| Document History | |||
|---|---|---|---|
| Issue | Date | Confidentiality | Change |
| 0606-00 | 04 November 2016 | Non-Confidential | Arm Compiler v6.6 Release |
| 0607-00 | 05 April 2017 | Non-Confidential | Arm Compiler v6.7 Release |
| 0608-00 | 30 July 2017 | Non-Confidential | Arm Compiler v6.8 Release. |
| 0609-00 | 25 October 2017 | Non-Confidential | Arm Compiler v6.9 Release. |
| 0610-00 | 14 March 2018 | Non-Confidential | Arm Compiler v6.10 Release. |
| 0611-00 | 25 October 2018 | Non-Confidential | Arm Compiler v6.11 Release. |
| 0612-00 | 27 February 2019 | Non-Confidential | Arm Compiler v6.12 Release. |
| 0613-00 | 09 October 2019 | Non-Confidential | Arm Compiler v6.13 Release. |
| 0614-00 | 26 February 2020 | Non-Confidential | Arm Compiler v6.14 Release. |
| 0615-00 | 07 October 2020 | Non-Confidential | Arm Compiler v6.15 Release. |
| 0615-01 | 14 December 2020 | Non-Confidential | Documentation update 1 for Arm Compiler v6.15 Release. |
| 0616-00 | 03 March 2021 | Non-Confidential | Arm Compiler v6.16 Release. |
| 0616-01 | 12 March 2021 | Non-Confidential | Documentation update 1 for Arm Compiler v6.16 Release. |
Non-Confidential Proprietary Notice
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| Non-Confidential | PDF version | 100748_0616_01_en |
| Copyright © 2016–2021 Arm Limited or its affiliates. All rights reserved. |
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