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Preface Overview of the Compiler Getting Started with the Compiler Compiler Features Compiler intrinsics Performance benefits of compiler intrinsics ARM assembler instruction intrinsics Generic intrinsics Compiler intrinsics for controlling IRQ and FIQ in Compiler intrinsics for inserting optimization bar Compiler intrinsics for inserting native instructi Compiler intrinsics for Digital Signal Processing Compiler support for European Telecommunications S Overflow and carry status flags for C and C++ code Texas Instruments (TI) C55x intrinsics for optimiz Compiler support for accessing registers using nam Pragmas recognized by the compiler Compiler and processor support for bit-banding Compiler type attribute, __attribute__((bitband)) --bitband compiler command-line option How the compiler handles bit-band objects placed o Compiler support for thread-local storage Compiler support for literal pools Compiler eight-byte alignment features Precompiled Header (PCH) files Automatic Precompiled Header (PCH) file processing Precompiled Header (PCH) file processing and the h Precompiled Header (PCH) file creation requirement Compilation with multiple Precompiled Header (PCH) Obsolete Precompiled Header (PCH) files Manually specifying the filename and location of a Selectively applying Precompiled Header (PCH) file Suppressing Precompiled Header (PCH) file processi Message output during Precompiled Header (PCH) pro Performance issues with Precompiled Header (PCH) f Default compiler options that are affected by opti Compiler Coding Practices Compiler Diagnostic Messages Using the Inline and Embedded Assemblers of the AR Compiler Command-line Options Language Extensions Compiler-specific Features C and C++ Implementation Details What is Semihosting? Via File Syntax Summary Table of GNU Language Extensions Standard C Implementation Definition Standard C++ Implementation Definition C and C++ Compiler Implementation Limits

Compiler intrinsics for inserting optimization barriers

3.6 Compiler intrinsics for inserting optimization barriers

The optimization barrier intrinsics __schedule_barrier, __force_stores, __force_loads, and __memory_changed let you override compiler optimizations by disabling instruction re-ordering and forcing memory updates.

The compiler can perform a range of optimizations, including re-ordering instructions and merging some operations. In some cases, such as system level programming where memory is being accessed concurrently by multiple processes, it might be necessary to disable instruction re-ordering and force memory to be updated.
The optimization barrier intrinsics __schedule_barrier, __force_stores, __force_loads and __memory_changed do not generate code, but they can result in slightly increased code size and extra memory accesses.


On some systems, the optimization barrier intrinsics might not be sufficient to ensure memory consistency. For example, the __memory_changed intrinsic forces values held in registers to be written out to memory. However, if the destination for the data is held in a region that can be buffered it might wait in a write buffer. In this case, you might also have to write to CP15 or use a memory barrier instruction to drain the write buffer. See the Technical Reference Manual for your ARM processor for more information.

Memory barrier intrinsics

Memory barrier intrinsics insert the following instructions into the instruction stream:
Memory barrier intrinsic Instruction
__dsb() DSB
__dmb() DMB
__isb() ISB
The memory barrier intrinsic also implicitly adds an optimization barrier intrinsic, and applies an operand to the inserted instruction. The argument passed to either __dsb(), or __dmb() defines which optimization barrier is added, and which operand is applied.
Intrinsic argument Operand Optimization barrier intrinsic
1 OSH __force_loads()
2 OSHST __force_stores()
3 OSH __memory_changed()
5 NSH __force_loads()
6 NSHST __force_stores()
7 NSH __memory_changed()
9 ISH __force_loads()
10 ISHST __force_stores()
11 ISH __memory_changed()
13 SY __force_loads()
14 ST __force_stores()
15 SY __memory_changed()


__dsb(5) inserts DSB NSH into the instruction stream, and implicitly adds the __force_loads() optimization barrier intrinsic.


  • For__isb(), the only supported operand is SY.
  • When compiling for an ARMv7-M target, all intrinsic arguments passed to __isb(), __dmb() and __dsb() emit the SY operand.
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