Keil Logo

VLDM (floating-point)

11.11 VLDM (floating-point)

Extension register load multiple.


VLDMmode{cond} Rn{!}, Registers
must be one of:
meaning Increment address After each transfer. IA is the default, and can be omitted.
meaning Decrement address Before each transfer.
meaning Empty Ascending stack operation. This is the same as DB for loads.
meaning Full Descending stack operation. This is the same as IA for loads.
is an optional condition code.
is the ARM register holding the base address for the transfer.
is optional. ! specifies that the updated base address must be written back to Rn. If ! is not specified, mode must be IA.
is a list of consecutive extension registers enclosed in braces, { and }. The list can be comma-separated, or in range format. There must be at least one register in the list.
You can specify S or D registers, but they must not be mixed. The number of registers must not exceed 16 D registers.


VPOP Registers is equivalent to VLDM sp!, Registers.
You can use either form of this instruction. They both disassemble to VPOP.
Non-ConfidentialPDF file icon PDF versionARM DUI0379H
Copyright © 2007, 2008, 2011, 2012, 2014-2016 ARM. All rights reserved. 
  Arm logo
Important information

This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.

Change Settings

Privacy Policy Update

Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.