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Instruction Operands

An operand is the part of the instruction following the instruction opcode. The instructions for the C16x/ST10 require zero to three operands. Depending on the instruction, each operand can be one of the following types.

Rn,Rm Provides direct access to the General Purpose Registers (GPRs) within the current register bank. Each register bank normally contains registers R0 to R15. Because the GPRs are located in the CPU's on-chip RAM, the register bank acts as a register window, which can be switched to another bank by changing the context pointer (CP).
REG Provides direct access to any GPR or special function register (SFR). REG forms an 8-bit number to designate the required location in internal memory.
BIT WORD Provides access to a particular word in the bit-addressable memory space.
BITADDR Provides access to a particular single bit in the bit-addressable memory space.
MEM Provides access to any memory location.
[Rn],[Rm] Provides indirect access to memory space by the content of a GPR.
#DATAn Provides an immediate constant value where n = 3, 4, 8, 16.
CADDR Provides a 16-bit code address within the current 64K segment for use in branch instructions.
REL Relative offset for use in a branch instruction. The covered range is +127 / -128 words relative to the current offset.
SEG The code segment number. The C16x/ST10 addresses up to 256K of memory and the segment numbers 0, 1, 2, and 3 exist.
#TRAP A 7-bit constant used as a interrupt vector number.
CC_cond Refers to condition code: CC_UC for unconditionally, CC_ULE for unsigned lower or equal condition, and so on.
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