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ARM: Single Stepping Cortex-M7 Enters Pending Exception Handler

Information in this knowledgebase article applies to:

  • Keil MDK
  • Cortex-M7 devices with core revisions r0p0 or r0p1


We noticed, that while single-stepping the program code on a Cortex-M7 device, the debugger will always enter the exception handler of a pending interrupt rather than to continue stepping the program from the current PC. This is very inconvenient and makes debugging quite impossible. We don't see such behaviour on Cortex-M3/M4 devices. So, what is wrong?


The debugger sets the DHCSR -> C_MASKINTS bit on every single step to make sure this step will not enter an interrupt handler. Unfortunately, this bit has slightly different behaviour in the Cortex-M7 core with core revision r0p0 or r0p1. Setting it does not mask pending interrupts, as it does in other core revisions. So with the next step, the program enters the interrupt handler, which became pending while the program was halted before executing that next single step.


Unfortunately, the problem can't be resolved by the debugger. If you want to debug a specific portion of the program code where this happens, you may have to disable problematic recurring interrupts manually to debug properly.

Also, check if the device manufacturer offers updated revisions of the device with a Cortex-M7 core revision r0p2 or newer.


In Keil MDK 5.16 we made an attempt to work around the issue in our ULINK2, ULINKpro and CMSIS_DAP debug drivers by setting the DHCSR -> C_MASKINTS bit while the target is halted and not just for a step.
This does help, but unfortunately, it does not solve the issue in all situations. When a program halts at a breakpoint, an interrupt can become pending until the debugger can set the C_MASKINTS bit. That interrupt also gets entered on the next step.


Last Reviewed: Thursday, November 12, 2020

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