CMSIS-Core (Cortex-M)  Version 5.3.0
CMSIS-Core support for Cortex-M processor-based devices
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SCB_Type Struct Reference

Structure type to access the System Control Block (SCB).

Data Fields

__IM uint32_t CPUID
 Offset: 0x000 (R/ ) CPUID Base Register. More...
__IOM uint32_t ICSR
 Offset: 0x004 (R/W) Interrupt Control and State Register. More...
__IOM uint32_t VTOR
 Offset: 0x008 (R/W) Vector Table Offset Register. More...
__IOM uint32_t AIRCR
 Offset: 0x00C (R/W) Application Interrupt and Reset Control Register. More...
__IOM uint32_t SCR
 Offset: 0x010 (R/W) System Control Register. More...
__IOM uint32_t CCR
 Offset: 0x014 (R/W) Configuration Control Register. More...
__IOM uint8_t SHP [12]
 Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15) More...
__IOM uint32_t SHCSR
 Offset: 0x024 (R/W) System Handler Control and State Register. More...
__IOM uint32_t CFSR
 Offset: 0x028 (R/W) Configurable Fault Status Register. More...
__IOM uint32_t HFSR
 Offset: 0x02C (R/W) HardFault Status Register. More...
__IOM uint32_t DFSR
 Offset: 0x030 (R/W) Debug Fault Status Register. More...
__IOM uint32_t MMFAR
 Offset: 0x034 (R/W) MemManage Fault Address Register. More...
__IOM uint32_t BFAR
 Offset: 0x038 (R/W) BusFault Address Register. More...
__IOM uint32_t AFSR
 Offset: 0x03C (R/W) Auxiliary Fault Status Register. More...
__IM uint32_t PFR [2]
 Offset: 0x040 (R/ ) Processor Feature Register. More...
__IM uint32_t DFR
 Offset: 0x048 (R/ ) Debug Feature Register. More...
__IM uint32_t ADR
 Offset: 0x04C (R/ ) Auxiliary Feature Register. More...
__IM uint32_t MMFR [4]
 Offset: 0x050 (R/ ) Memory Model Feature Register. More...
__IM uint32_t ISAR [5]
 Offset: 0x060 (R/ ) Instruction Set Attributes Register. More...
uint32_t RESERVED0 [5]
 Reserved. More...
__IOM uint32_t CPACR
 Offset: 0x088 (R/W) Coprocessor Access Control Register. More...

Field Documentation

__IM uint32_t SCB_Type::ADR
__IOM uint32_t SCB_Type::AFSR
__IOM uint32_t SCB_Type::AIRCR
__IOM uint32_t SCB_Type::BFAR
__IOM uint32_t SCB_Type::CCR
__IOM uint32_t SCB_Type::CFSR
__IOM uint32_t SCB_Type::CPACR
__IM uint32_t SCB_Type::CPUID
__IM uint32_t SCB_Type::DFR
__IOM uint32_t SCB_Type::DFSR
__IOM uint32_t SCB_Type::HFSR
__IOM uint32_t SCB_Type::ICSR
__IM uint32_t SCB_Type::ISAR[5]
__IOM uint32_t SCB_Type::MMFAR
__IM uint32_t SCB_Type::MMFR[4]
__IM uint32_t SCB_Type::PFR[2]
uint32_t SCB_Type::RESERVED0[5]
__IOM uint32_t SCB_Type::SCR
__IOM uint32_t SCB_Type::SHCSR
__IOM uint8_t SCB_Type::SHP[12]
__IOM uint32_t SCB_Type::VTOR