Structure type to access the Core Debug Register (CoreDebug).
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| __IOM uint32_t | DHCSR |
| | Offset: 0x000 (R/W) Debug Halting Control and Status Register. More...
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| __OM uint32_t | DCRSR |
| | Offset: 0x004 ( /W) Debug Core Register Selector Register. More...
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| __IOM uint32_t | DCRDR |
| | Offset: 0x008 (R/W) Debug Core Register Data Register. More...
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| __IOM uint32_t | DEMCR |
| | Offset: 0x00C (R/W) Debug Exception and Monitor Control Register. More...
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| __IOM uint32_t CoreDebug_Type::DCRDR |
| __OM uint32_t CoreDebug_Type::DCRSR |
| __IOM uint32_t CoreDebug_Type::DEMCR |
| __IOM uint32_t CoreDebug_Type::DHCSR |
