
void  arm_conv_f32 (const float32_t *pSrcA, uint32_t srcALen, const float32_t *pSrcB, uint32_t srcBLen, float32_t *pDst) 
 Convolution of floatingpoint sequences. More...


void  arm_conv_fast_opt_q15 (const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2) 
 Convolution of Q15 sequences (fast version). More...


void  arm_conv_fast_q15 (const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst) 
 Convolution of Q15 sequences (fast version). More...


void  arm_conv_fast_q31 (const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst) 
 Convolution of Q31 sequences (fast version). More...


void  arm_conv_opt_q15 (const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst, q15_t *pScratch1, q15_t *pScratch2) 
 Convolution of Q15 sequences. More...


void  arm_conv_opt_q7 (const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst, q15_t *pScratch1, q15_t *pScratch2) 
 Convolution of Q7 sequences. More...


void  arm_conv_q15 (const q15_t *pSrcA, uint32_t srcALen, const q15_t *pSrcB, uint32_t srcBLen, q15_t *pDst) 
 Convolution of Q15 sequences. More...


void  arm_conv_q31 (const q31_t *pSrcA, uint32_t srcALen, const q31_t *pSrcB, uint32_t srcBLen, q31_t *pDst) 
 Convolution of Q31 sequences. More...


void  arm_conv_q7 (const q7_t *pSrcA, uint32_t srcALen, const q7_t *pSrcB, uint32_t srcBLen, q7_t *pDst) 
 Convolution of Q7 sequences. More...


Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector. Convolution is similar to correlation and is frequently used in filtering and data analysis. The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floatingpoint data types. The library also provides fast versions of the Q15 and Q31 functions.
 Algorithm
 Let
a[n]
and b[n]
be sequences of length srcALen
and srcBLen
samples respectively. Then the convolution c[n] = a[n] * b[n]
 is defined as
 Note that
c[n]
is of length srcALen + srcBLen  1
and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen  2
. pSrcA
points to the first input vector of length srcALen
and pSrcB
points to the second input vector of length srcBLen
. The output result is written to pDst
and the calling function must allocate srcALen+srcBLen1
words for the result.
 Conceptually, when two signals
a[n]
and b[n]
are convolved, the signal b[n]
slides over a[n]
. For each offset n
, the overlapping portions of a[n] and b[n] are multiplied and summed together.
 Note that convolution is a commutative operation:
a[n] * b[n] = b[n] * a[n].
 This means that switching the A and B arguments to the convolution functions has no effect.
 FixedPoint Behavior
 Convolution requires summing up a large number of intermediate products. As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation. Refer to the function specific documentation below for further details of the particular algorithm used.
 Fast Versions
 Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires the input signals should be scaled down to avoid intermediate overflows.
 Opt Versions
 Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation. These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
 Returns
 none
void arm_conv_fast_opt_q15 
( 
const q15_t * 
pSrcA, 


uint32_t 
srcALen, 


const q15_t * 
pSrcB, 


uint32_t 
srcBLen, 


q15_t * 
pDst, 


q15_t * 
pScratch1, 


q15_t * 
pScratch2 

) 
 
Convolution of Q15 sequences (fast version) for CortexM3 and CortexM4.
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1 
[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen)  2 
[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen 
 Returns
 none
 Scaling and Overflow Behavior
 This fast version uses a 32bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
void arm_conv_fast_q15 
( 
const q15_t * 
pSrcA, 


uint32_t 
srcALen, 


const q15_t * 
pSrcB, 


uint32_t 
srcBLen, 


q15_t * 
pDst 

) 
 
Convolution of Q15 sequences (fast version) for CortexM3 and CortexM4.
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1 
 Returns
 none
 Scaling and Overflow Behavior
 This fast version uses a 32bit accumulator with 2.30 format. The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
void arm_conv_fast_q31 
( 
const q31_t * 
pSrcA, 


uint32_t 
srcALen, 


const q31_t * 
pSrcB, 


uint32_t 
srcBLen, 


q31_t * 
pDst 

) 
 
Convolution of Q31 sequences (fast version) for CortexM3 and CortexM4.
 Parameters

[in]  pSrcA  points to the first input sequence. 
[in]  srcALen  length of the first input sequence. 
[in]  pSrcB  points to the second input sequence. 
[in]  srcBLen  length of the second input sequence. 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
 Returns
 none
 Scaling and Overflow Behavior
 This function is optimized for speed at the expense of fixedpoint precision and overflow protection. The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format. These intermediate results are accumulated in a 32bit register in 2.30 format. Finally, the accumulator is saturated and converted to a 1.31 result.
 The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result. In order to avoid overflows completely the input signals must be scaled down. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally.
void arm_conv_opt_q15 
( 
const q15_t * 
pSrcA, 


uint32_t 
srcALen, 


const q15_t * 
pSrcB, 


uint32_t 
srcBLen, 


q15_t * 
pDst, 


q15_t * 
pScratch1, 


q15_t * 
pScratch2 

) 
 
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen)  2. 
[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen). 
 Returns
 none
 Scaling and Overflow Behavior
 The function is implemented using a 64bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
void arm_conv_opt_q7 
( 
const q7_t * 
pSrcA, 


uint32_t 
srcALen, 


const q7_t * 
pSrcB, 


uint32_t 
srcBLen, 


q7_t * 
pDst, 


q15_t * 
pScratch1, 


q15_t * 
pScratch2 

) 
 
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen)  2. 
[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen). 
 Returns
 none
 Scaling and Overflow Behavior
 The function is implemented using a 32bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as
max(srcALen, srcBLen)<131072
. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
void arm_conv_q15 
( 
const q15_t * 
pSrcA, 


uint32_t 
srcALen, 


const q15_t * 
pSrcB, 


uint32_t 
srcBLen, 


q15_t * 
pDst 

) 
 
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
 Returns
 none
 Scaling and Overflow Behavior
 The function is implemented using a 64bit internal accumulator. Both inputs are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
void arm_conv_q31 
( 
const q31_t * 
pSrcA, 


uint32_t 
srcALen, 


const q31_t * 
pSrcB, 


uint32_t 
srcBLen, 


q31_t * 
pDst 

) 
 
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
 Returns
 none
 Scaling and Overflow Behavior
 The function is implemented using an internal 64bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows, as maximum of min(srcALen, srcBLen) number of additions are carried internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
void arm_conv_q7 
( 
const q7_t * 
pSrcA, 


uint32_t 
srcALen, 


const q7_t * 
pSrcB, 


uint32_t 
srcBLen, 


q7_t * 
pDst 

) 
 
 Parameters

[in]  pSrcA  points to the first input sequence 
[in]  srcALen  length of the first input sequence 
[in]  pSrcB  points to the second input sequence 
[in]  srcBLen  length of the second input sequence 
[out]  pDst  points to the location where the output result is written. Length srcALen+srcBLen1. 
 Returns
 none
 Scaling and Overflow Behavior
 The function is implemented using a 32bit internal accumulator. Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result. The 2.14 intermediate results are accumulated in a 32bit accumulator in 18.14 format. This approach provides 17 guard bits and there is no risk of overflow as long as
max(srcALen, srcBLen)<131072
. The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.