CMSIS-Core (Cortex-A)  Version 1.2.1
CMSIS-Core support for Cortex-A processor-based devices
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TLB maintenance operations

This section describes the TLB operations that are implemented on all Armv7-A implementations. More...


__STATIC_FORCEINLINE void __set_TLBIALL (uint32_t value)
 Set TLBIALL. More...


TLB maintenance operations provide a mechanism to invalidate entries from a TLB.

Consider using Memory Management Unit Functions instead of raw register usage.

Function Documentation

__STATIC_INLINE void __set_TLBIALL ( uint32_t  value)

TLB Invalidate All

This function invalidates entire unified TLB.