CMSIS-Core (Cortex-A)  Version 1.2.1
CMSIS-Core support for Cortex-A processor-based devices
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Valid values for CPSR M field. More...


#define CPSR_M_USR   0x10U
 CPSR: M User mode (PL0) More...
#define CPSR_M_FIQ   0x11U
 CPSR: M Fast Interrupt mode (PL1) More...
#define CPSR_M_IRQ   0x12U
 CPSR: M Interrupt mode (PL1) More...
#define CPSR_M_SVC   0x13U
 CPSR: M Supervisor mode (PL1) More...
#define CPSR_M_MON   0x16U
 CPSR: M Monitor mode (PL1) More...
#define CPSR_M_ABT   0x17U
 CPSR: M Abort mode (PL1) More...
#define CPSR_M_HYP   0x1AU
 CPSR: M Hypervisor mode (PL2) More...
#define CPSR_M_UND   0x1BU
 CPSR: M Undefined mode (PL1) More...
#define CPSR_M_SYS   0x1FU
 CPSR: M System mode (PL1) More...


The M field can contain one of these values which indicates the current processor mode.

Macro Definition Documentation

#define CPSR_M_ABT   0x17U

Abort mode is the default mode to which a Data Abort exception or Prefetch Abort exception is taken.

#define CPSR_M_FIQ   0x11U

FIQ mode is the default mode to which an FIQ interrupt is taken.

#define CPSR_M_HYP   0x1AU

Hyp mode is the Non-secure PL2 mode, implemented as part of the Virtualization Extensions. Hyp mode is entered on taking an exception from Non-secure state that must be taken to PL2.

#define CPSR_M_IRQ   0x12U

IRQ mode is the default mode to which an IRQ interrupt is taken.

#define CPSR_M_MON   0x16U

Monitor mode is the mode to which a Secure Monitor Call exception is taken.

#define CPSR_M_SVC   0x13U

Supervisor mode is the default mode to which a Supervisor Call exception is taken.

#define CPSR_M_SYS   0x1FU

Software executing in System mode executes at PL1. System mode has the same registers available as User mode, and is not entered by any exception.

#define CPSR_M_UND   0x1BU

Undefined mode is the default mode to which an instruction-related exception, including any attempt to execute an UNDEFINED instruction, is taken.

#define CPSR_M_USR   0x10U

An operating system runs applications in User mode to restrict the use of system resources. Software executing in User mode executes at PL0. Execution in User mode is sometimes described as unprivileged execution.