CMSIS-Core (Cortex-M)  Version 5.6.0
CMSIS-Core support for Cortex-M processor-based devices
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TPI_Type Struct Reference

Structure type to access the Trace Port Interface Register (TPI). More...

Data Fields

__IOM uint32_t SSPSR
 Offset: 0x000 (R/ ) Supported Parallel Port Size Register. More...
 
__IOM uint32_t CSPSR
 Offset: 0x004 (R/W) Current Parallel Port Size Register. More...
 
uint32_t RESERVED0 [2]
 Reserved. More...
 
__IOM uint32_t ACPR
 Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register. More...
 
uint32_t RESERVED1 [55]
 Reserved. More...
 
__IOM uint32_t SPPR
 Offset: 0x0F0 (R/W) Selected Pin Protocol Register. More...
 
uint32_t RESERVED2 [131]
 Reserved. More...
 
__IM uint32_t FFSR
 Offset: 0x300 (R/ ) Formatter and Flush Status Register. More...
 
__IOM uint32_t FFCR
 Offset: 0x304 (R/W) Formatter and Flush Control Register. More...
 
__IM uint32_t FSCR
 Offset: 0x308 (R/ ) Formatter Synchronization Counter Register. More...
 
uint32_t RESERVED3 [759]
 Reserved. More...
 
__IM uint32_t TRIGGER
 Offset: 0xEE8 (R/ ) TRIGGER. More...
 
__IM uint32_t FIFO0
 Offset: 0xEEC (R/ ) Integration ETM Data. More...
 
__IM uint32_t ITATBCTR2
 Offset: 0xEF0 (R/ ) ITATBCTR2. More...
 
uint32_t RESERVED4 [1]
 Reserved. More...
 
__IM uint32_t ITATBCTR0
 Offset: 0xEF8 (R/ ) ITATBCTR0. More...
 
__IM uint32_t FIFO1
 Offset: 0xEFC (R/ ) Integration ITM Data. More...
 
__IOM uint32_t ITCTRL
 Offset: 0xF00 (R/W) Integration Mode Control. More...
 
uint32_t RESERVED5 [39]
 Reserved. More...
 
__IOM uint32_t CLAIMSET
 Offset: 0xFA0 (R/W) Claim tag set. More...
 
__IOM uint32_t CLAIMCLR
 Offset: 0xFA4 (R/W) Claim tag clear. More...
 
uint32_t RESERVED7 [8]
 Reserved. More...
 
__IM uint32_t DEVID
 Offset: 0xFC8 (R/ ) TPIU_DEVID. More...
 
__IM uint32_t DEVTYPE
 Offset: 0xFCC (R/ ) TPIU_DEVTYPE. More...
 

Description

Structure type to access the Trace Port Interface Register (TPI).

Field Documentation

__IOM uint32_t TPI_Type::ACPR

Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register.

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear.

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set.

__IOM uint32_t TPI_Type::CSPSR

Offset: 0x004 (R/W) Current Parallel Port Size Register.

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) TPIU_DEVID.

__IM uint32_t TPI_Type::DEVTYPE

Offset: 0xFCC (R/ ) TPIU_DEVTYPE.

__IOM uint32_t TPI_Type::FFCR

Offset: 0x304 (R/W) Formatter and Flush Control Register.

__IM uint32_t TPI_Type::FFSR

Offset: 0x300 (R/ ) Formatter and Flush Status Register.

__IM uint32_t TPI_Type::FIFO0

Offset: 0xEEC (R/ ) Integration ETM Data.

__IM uint32_t TPI_Type::FIFO1

Offset: 0xEFC (R/ ) Integration ITM Data.

__IM uint32_t TPI_Type::FSCR

Offset: 0x308 (R/ ) Formatter Synchronization Counter Register.

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) ITATBCTR0.

__IM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/ ) ITATBCTR2.

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control.

uint32_t TPI_Type::RESERVED0[2]

Reserved.

uint32_t TPI_Type::RESERVED1[55]

Reserved.

uint32_t TPI_Type::RESERVED2[131]

Reserved.

uint32_t TPI_Type::RESERVED3[759]

Reserved.

uint32_t TPI_Type::RESERVED4[1]

Reserved.

uint32_t TPI_Type::RESERVED5[39]

Reserved.

uint32_t TPI_Type::RESERVED7[8]

Reserved.

__IOM uint32_t TPI_Type::SPPR

Offset: 0x0F0 (R/W) Selected Pin Protocol Register.

__IOM uint32_t TPI_Type::SSPSR

Offset: 0x000 (R/ ) Supported Parallel Port Size Register.

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER.