Structure type to access the Nested Vectored Interrupt Controller (NVIC). More...

Data Fields
__IOM uint32_t	ISER [8]
	Offset: 0x000 (R/W) Interrupt Set Enable Register. More...

uint32_t	RESERVED0 [24]
	Reserved. More...

__IOM uint32_t	ICER [8]
	Offset: 0x080 (R/W) Interrupt Clear Enable Register. More...

uint32_t	RSERVED1 [24]
	Reserved. More...

__IOM uint32_t	ISPR [8]
	Offset: 0x100 (R/W) Interrupt Set Pending Register. More...

uint32_t	RESERVED2 [24]
	Reserved. More...

__IOM uint32_t	ICPR [8]
	Offset: 0x180 (R/W) Interrupt Clear Pending Register. More...

uint32_t	RESERVED3 [24]
	Reserved. More...

__IOM uint32_t	IABR [8]
	Offset: 0x200 (R/W) Interrupt Active bit Register. More...

uint32_t	RESERVED4 [56]
	Reserved. More...

__IOM uint8_t	IP [240]
	Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide) More...

uint32_t	RESERVED5 [644]
	Reserved. More...

__OM uint32_t	STIR
	Offset: 0xE00 ( /W) Software Trigger Interrupt Register. More...

Description

Structure type to access the Nested Vectored Interrupt Controller (NVIC).

Field Documentation

__IOM uint32_t NVIC_Type::IABR[8]

Offset: 0x200 (R/W) Interrupt Active bit Register.

__IOM uint32_t NVIC_Type::ICER[8]

Offset: 0x080 (R/W) Interrupt Clear Enable Register.

__IOM uint32_t NVIC_Type::ICPR[8]

Offset: 0x180 (R/W) Interrupt Clear Pending Register.

__IOM uint8_t NVIC_Type::IP[240]

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

__IOM uint32_t NVIC_Type::ISER[8]

Offset: 0x000 (R/W) Interrupt Set Enable Register.

__IOM uint32_t NVIC_Type::ISPR[8]

Offset: 0x100 (R/W) Interrupt Set Pending Register.

uint32_t NVIC_Type::RESERVED0[24]

Reserved.

uint32_t NVIC_Type::RESERVED2[24]

Reserved.

uint32_t NVIC_Type::RESERVED3[24]

Reserved.

uint32_t NVIC_Type::RESERVED4[56]

Reserved.

uint32_t NVIC_Type::RESERVED5[644]

Reserved.

uint32_t NVIC_Type::RSERVED1[24]

Reserved.

__OM uint32_t NVIC_Type::STIR

Offset: 0xE00 ( /W) Software Trigger Interrupt Register.