STM32Cube  Version 1.3.0
Create Projects for STM32H5 Series with STM32Cube HAL and STM32CubeMX
I2C

Revision History

  • Version 1.0
    • Initial release

Capabilities

This driver supports Master and Slave modes.

Instances

Hardware resource relating to driver instance is shown in the table below:

Driver Instance Hardware Resource
Driver_I2C1 I2C1
Driver_I2C2 I2C2
Driver_I2C3 I2C3
Driver_I2C4 I2C4

Configuration

Compile-time

Definitions used for compile-time configuration of this driver are shown in the table below:

Definition Default value Value Description
I2C1_ANF_ENABLE 0 0 I2C1 analog noise filter: disabled
1 I2C1 analog noise filter: enabled
I2C2_ANF_ENABLE 0 0 I2C2 analog noise filter: disabled
1 I2C2 analog noise filter: enabled
I2C3_ANF_ENABLE 0 0 I2C3 analog noise filter: disabled
1 I2C3 analog noise filter: enabled
I2C4_ANF_ENABLE 0 0 I2C4 analog noise filter: disabled
1 I2C4 analog noise filter: enabled
I2C1_DNF_COEFFICIENT 0 0 I2C1 digital noise filter coefficient: disabled
1..15 I2C1 digital noise filter coefficient number
I2C2_DNF_COEFFICIENT 0 0 I2C2 digital noise filter coefficient: disabled
1..15 I2C2 digital noise filter coefficient number
I2C3_DNF_COEFFICIENT 0 0 I2C3 digital noise filter coefficient: disabled
1..15 I2C3 digital noise filter coefficient number
I2C4_DNF_COEFFICIENT 0 0 I2C4 digital noise filter coefficient: disabled
1..15 I2C4 digital noise filter coefficient number

STM32CubeMX

The I2C driver requires:

  • I2C peripheral clock
  • I2C peripheral configured as I2C
  • I2C SCL and SDA pins
  • optional DMA configuration for transfers

NUCLEO-H563ZI Board Configuration

These settings are relevant for this board, for different board please refer to the board schematic for proper configuration.

Link to NUCLEO-H563ZI board schematic.

STM32CubeMX

Required peripherals for the NUCLEO-H563ZI board are listed in the table below:

Peripheral Mode Description
I2C4 I2C I2C4 Controller
PB8 Alternate Function Push Pull I2C4 SCL Pin
PB9 Alternate Function Push Pull I2C4 SDA Pin
Note
All settings have to be configured as described in the procedure below. Important settings, typically the ones different from default, are emphasized in bold.

Pinout & Configuration tab

  1. In the Pinout view window click on a pin and select it's functionality:
    Pin Functionality
    PB8 I2C4_SCL
    PB9 I2C4_SDA

  2. Under Categories: Connectivity select I2C4:

    Mode:

    • Mode: I2C

    Configuration:

    • Parameter Settings: not used
    • User Constants: not used
    • NVIC Settings: configured in later step (under Category: System Core: NVIC)
    • DMA Settings: configured in later step (under Category: System Core: GPDMA1)
    • GPIO Settings:
      Pin Name Signal on Pin Pin Context.. GPIO output.. GPIO mode GPIO Pull-up/Pull.. Maximum out.. Fast Mode User Label
      PB8 I2C4_SCL n/a n/a Alternate Function Push Pull No pull-up and no.. Low n/a .
      PB9 I2C4_SDA n/a n/a Alternate Function Push Pull No pull-up and no.. Low n/a .

  3. Under Categories: System Core select GPDMA1:

    Mode:

    • Channel 0 - 2 Words Internal FIFO: Standard Request Mode
    • Channel 1 - 2 Words Internal FIFO: Standard Request Mode

    Configuration:

    • All Channels: not used
    • Security:
      • CH1:
        • Enable Channel as Privileged: NON PRIVILEGED
      • CH0:
        • Enable Channel as Privileged: NON PRIVILEGED
    • CH0:
      • Circular configuration:
        • Circular Mode: Disable
      • Request Configuration:
        • Request: I2C4_TX
        • DMA Handle in IP Structure: hdmatx
        • Block HW request protocol: Single/Burst Level
      • Channel configuration:
        • Priority: Low
        • Transaction Mode: Normal
        • Direction: Memory to Peripheral
      • Source Data Setting:
        • Source Address Increment After Transfer: Enabled
        • Data Width: Byte
        • Burst Length: 1
        • Allocated Port for Transfer: Port 0
      • Destination Data Setting:
        • Destination Address Increment After Transfer: Disabled
        • Data Width: Byte
        • Burst Length: 1
        • Allocated Port for Transfer: Port 0
      • Data Handling:
        • Data Handling Configuration: Disable
      • Trigger:
        • Trigger Configuration: Disable
      • Transfer Event Configuration:
        • Transfer Event Generation: The TC (and the HT) ...
    • CH1:
      • Circular configuration:
        • Circular Mode: Disable
      • Request Configuration:
        • Request: I2C4_RX
        • DMA Handle in IP Structure: hdmarx
        • Block HW request protocol: Single/Burst Level
      • Channel configuration:
        • Priority: Low
        • Transaction Mode: Normal
        • Direction: Peripheral to Memory
      • Source Data Setting:
        • Source Address Increment After Transfer: Disabled
        • Data Width: Byte
        • Burst Length: 1
        • Allocated Port for Transfer: Port 1
      • Destination Data Setting:
        • Destination Address Increment After Transfer: Enabled
        • Data Width: Byte
        • Burst Length: 1
        • Allocated Port for Transfer: Port 1
      • Data Handling:
        • Data Handling Configuration: Disable
      • Trigger:
        • Trigger Configuration: Disable
      • Transfer Event Configuration:
        • Transfer Event Generation: The TC (and the HT) ...
    • User Constants: not used

  4. Under Categories: System Core select NVIC:

    Configuration:

    • NVIC:
      NVIC Interrupt Table Enabled Preemption Priority Sub Priority
      GPDMA1 Channel 0 global interrupt checked 0 0
      GPDMA1 Channel 1 global interrupt checked 0 0
      I2C4 event interrupt checked 0 0
      I2C4 error interrupt checked 0 0
    • Code generation:
      Enabled interrupt table Select for.. Generate Enable in.. Generate IRQ h.. Call HAL handler
      GPDMA1 Channel 0 global interrupt unchecked checked checked checked
      GPDMA1 Channel 1 global interrupt unchecked checked checked checked
      I2C4 event interrupt unchecked checked checked checked
      I2C4 error interrupt unchecked checked checked checked

Clock Configuration tab

  1. Configure To I2C4 (MHz): 250

Project Manager tab

  1. Under Advanced Settings:

    Generated Function Calls:

    Generate Code Function Name Peripheral Inst.. Do not generate .. Visibility (Static)
    checked MX_I2C4_Init I2C4 checked checked

Generate Code

Generate source code by clicking on the GENERATE CODE button on the toolbar.

Validation

Results of the CMSIS-Driver Validation for this driver can be found in the I2C_TestReport.txt file.