Release Notes for STM32F2xx CMSIS

Copyright © 2016 STMicroelectronics

Update History

Main Changes

  • All source files: update disclaimer to add reference to the new license agreement.
  • Update the GCC startup file to be aligned to IAR/Keil IDE.

Main Changes

  • Improve GCC startup files robustness.
  • Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME
  • Add atomic register access macros.

Main Changes

  • All header files:
    • Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro
  • system_stm32f2xx.h
    • SystemInit(): update to don’t reset RCC registers to its reset values.
  • Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS

Main Changes

  • Update Release_Notes.html to refer to"_htmresc/st_logo.png" instead of "../../../../../_htmresc/st_logo.png"

Main Changes

  • General updates to fix known defects and enhancements implementation for MISRA 2012 compliance.
    • Update to use “UL” postfix for bits mask definitions(_Msk) and memory/peripheral base addresses
    • HAL_IS_BIT_SET()/HAL_IS_BIT_CLR() macros implementation update
    • Devices headers clean up:
      • Remove double casting uint32_t and U
      • Remove extra parenthesis instead of U
  • stm32f2xx.h
    • Align ErrorStatus typedef to common error handling
  • GPIO:
    • Add new IS_GPIO_AF_INSTANCE() macro
  • HASH
    • Rename HASH_RNG_IRQn to RNG_IRQn for STM32F205xx and STM32F207xx devices as HASH isn’t supported
  • CRYP:
    • Rename CRYP data input register name to be aligned with reference manual
      • Rename DIN field to DR in the CRYP_TypeDef structure
  • USB:
    • Add missing Bits Definitions in USB_OTG_DOEPMSK register
      • USB_OTG_DOEPMSK_AHBERRM
      • USB_OTG_DOEPMSK_OTEPSPRM
      • USB_OTG_DOEPMSK_BERRM
      • USB_OTG_DOEPMSK_NAKM
      • USB_OTG_DOEPMSK_NYETM
    • Add missing Bits Definitions in USB_OTG_DIEPINT register
      • USB_OTG_DIEPINT_INEPNM
      • USB_OTG_DIEPINT_AHBERR
      • USB_OTG_DOEPINT_OUTPKTERR
      • USB_OTG_DOEPINT_NAK
      • USB_OTG_DOEPINT_STPKTRX
    • Add missing Bits Definitions in USB_OTG_DCFG register
      • USB_OTG_DCFG_XCVRDLY
      • USB_OTG_DCFG_ERRATIM
  • TIM:
    • Add requires TIM assert macros:
      • IS_TIM_SYNCHRO_INSTANCE()
      • IS_TIM_CLOCKSOURCE_TIX_INSTANCE()
      • IS_TIM_CLOCKSOURCE_ITRX_INSTANCE()

Main Changes

  • Header file for all STM32 devices
    • Add missing HardFault_IRQn in IRQn_Type enumeration
  • “stm32f215xx.h”, “stm32f217xx.h”
    • Remove HASH_DIGEST instance
  • Remove Date and Version from header files

Main Changes

  • Use _Pos and _Mask macros for all Bit Definitions
  • General updates in header files to support LL drivers
    • Align Bit naming for RCC_CSR register (ex: RCC_CSR_PADRSTF –> RCC_CSR_PINRSTF)
    • Align Bit naming for RTC_CR and RTC_TAFCR registers (ex: RTC_CR_BCK –> RTC_CR_BKP)
    • Rename IS_UART_INSTANCE() macro to IS_UART_HALFDUPLEX_INSTANCE()
    • Add new defines to check LIN instance: IS_UART_LIN_INSTANCE
    • Add FLASH_OTP_BASE and FLASH_OTP_END defnes to manage FLASH OPT area
    • Add Device electronic signature defines: UID_BASE and FLASHSIZE_BASE defines
    • Add bit definitions for ETH_MACDBGR register
    • Add new define ADC123_COMMON_BASE to replace ADC_BASE define
    • Add new define ADC123_COMMON to replace ADC define
    • Add new ADC macros: IS_ADC_COMMON_INSTANCE() and IS_ADC_MULTIMODE_MASTER_INSTANCE()
    • Add new ADC aliases ADC_CDR_RDATA_MST and ADC_CDR_RDATA_SLV for compatibilities with all STM32 Families
    • Update TIM CNT and ARR register mask on 32-bits
    • Add new TIM_OR_TI1_RMP define in TIM_OR register
    • Add new TIM macros to check TIM feature instance support:
      • IS_TIM_COUNTER_MODE_SELECT_INSTANCE()
      • IS_TIM_CLOCK_DIVISION_INSTANCE()
      • IS_TIM_COMMUTATION_EVENT_INSTANCE()
      • IS_TIM_OCXREF_CLEAR_INSTANCE()
      • IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE()
      • IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE()
      • IS_TIM_REPETITION_COUNTER_INSTANCE()
      • IS_TIM_ENCODER_INTERFACE_INSTANCE()
      • IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE()
      • IS_TIM_BREAK_INSTANCE()
    • USB_OTG register: fix the wrong defined values for USB_OTG_GAHBCFG bits

Main Changes

  • Header file for all STM32 devices
    • Remove uint32_t cast and keep only Misra Cast (U) to avoid two types cast duplication
    • Correct some bits definition to be in line with naming used in the Reference Manual
      • WWDG_CR_Tx changed to WWDG_CR_T_x
      • WWDG_CFR_Wx changed to WWDG_CFR_W_x
      • WWDG_CFR_WDGTBx changed to WWDG_CFR_WDGTB_x
    • I2C FLTR feature is not supported on F2 family, FLTR bits are removed.
    • Add missing defines for GPIO_AFRL & GPIO_AFRH registers
    • Remove the double definition of USB_OTG_HS_MAX_IN_ENDPOINTS and add a new one for USB_OTG_HS_MAX_OUT_ENDPOINTS
    • Update CMSIS driver to be compliante with MISRA C 2004 rule 10.6
  • stm32f207xx.h and stm32f217xx.h files
    • Correct some bits definition to be in line with naming used in the Reference Manual
      • DCMI_RISR_x changed to DCMI_RIS_x
      • DCMI_RISR_OVF_RIS changed to DCMI_RIS_OVR_RIS
      • DCMI_IER_OVF_IE changed to DCMI_IER_OVR_IE
      • DCMI_ICR_OVF_ISC changed to DCMI_ICR_OVR_ISC
      • DCMI_MISR changed to DCMI_MIS
    • Add missing bit definitions for DCMI_ESCR, DCMI_ESUR, DCMI_CWSTRT, DCMI_CWSIZE, DCMI_DR registers
  • stm32f2xx.h
    • Rename __STM32F2xx_CMSIS_DEVICE_VERSION_xx defines to __STM32F2_CMSIS_VERSION_xx (MISRA-C 2004 rule 5.1)

Main Changes

  • stm32f205xx.h, stm32f207xx.h, stm32f215xx.h, stm32f217xx.h files
    • Remove FSMC_BWTRx_CLKDIV and FSMC_BWTRx_DATLAT bits definitions

Main Changes

  • stm32f2xx.h
    • Add new constant definition STM32F2
  • Header file for all STM32F2 devices
    • GPIO_TypeDef: change the BSRR register definition, the two 16-bits definition BSRRH and BSRRL are merged in a single 32-bits definition BSRR
    • Add missing defines for GPIO LCKR Register
    • Add defines for FLASH memory base and end addresses
    • Update SRAM2 and BKPSRAM Bit-Banding base address defined values
  • Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.xx version
  • “stm32f215xx.h”, “stm32f217xx.h”
    • HASH alignment with bits naming used in documentation
      • Rename HASH_IMR_DINIM to HASH_IMR_DINIE
      • Rename HASH_IMR_DCIM to HASH_IMR_DCIE
      • Rename HASH_STR_NBW to HASH_STR_NBW
  • system_stm32f2xx.c
    • Remove dependency vs. the HAL, to allow using this file without the need to have the HAL drivers
      • Include stm32f2xx.h instead of stm32f2xx_hal.h
      • Add definition of HSE_VALUE and HSI_VALUE, if they are not yet defined in the compilation scope (these values are defined in stm32f2xx_hal_conf).
    • Remove __IO on constant table declaration
    • Implement workaround to cover RCC limitation regarding peripheral enable delay
    • SystemInit_ExtMemCtl() update GPIO configuration when external SRAM is used

Main Changes

  • Update based on STM32Cube specification
  • This version and later has to be used only with STM32CubeF2 based development

Main Changes

  • All source files: license disclaimer text update and add link to the License file on ST Internet.

Main Changes

  • All source files: update disclaimer to add reference to the new license agreement
  • stm32f2xx.h
    • Correct bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST

Main Changes

  • stm32f2xx.h
    • Add missing bits definition for DAC CR register
    • Add missing bits definition for FSMC BTR1, BTR2, BTR3, BWTR1, BWTR2, BWTR3 and BWTR4 registers
  • Add startup file for TASKING toolchain

Main Changes

  • stm32f2xx.h
    • Add define for Cortex-M3 revision __CM3_REV
    • Allow modification of some constants by the application code, definition of these constants is now bracketed by #if !defined. The concerned constant are HSE_VALUE, HSI_VALUE and HSE_STARTUP_TIMEOUT.
    • Fix include of stm32f2xx_conf.h file, change “stm32f2xx_conf.h” by “stm32f2xx_conf.h”
    • Correct MII_RMII_SEL bit (in SYSCFG_PMC register) value to 0x00800000
    • Correct RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000
    • Correct some bits definition to be in line with naming used in the Reference Manual (RM0033)
      • GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_x
      • GPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_x
      • SYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SEL
      • RCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RST
      • DBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOP
    • GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28

Main Changes

  • First official release for STM32F2xx devices