58 #if !defined(LPI2C_HAL_H)
80 #define LPI2C_HAL_MASTER_DATA_MATCH_INT 0x4000UL
81 #define LPI2C_HAL_MASTER_PIN_LOW_TIMEOUT_INT 0x2000UL
82 #define LPI2C_HAL_MASTER_FIFO_ERROR_INT 0x1000UL
83 #define LPI2C_HAL_MASTER_ARBITRATION_LOST_INT 0x800UL
84 #define LPI2C_HAL_MASTER_NACK_DETECT_INT 0x400UL
85 #define LPI2C_HAL_MASTER_STOP_DETECT_INT 0x200UL
86 #define LPI2C_HAL_MASTER_END_PACKET_INT 0x100UL
87 #define LPI2C_HAL_MASTER_RECEIVE_DATA_INT 0x2UL
88 #define LPI2C_HAL_MASTER_TRANSMIT_DATA_INT 0x1UL
93 #define LPI2C_HAL_SLAVE_SMBUS_ALERT_RESPONSE_INT 0x8000UL
94 #define LPI2C_HAL_SLAVE_GENERAL_CALL_INT 0x4000UL
95 #define LPI2C_HAL_SLAVE_ADDRESS_MATCH_1_INT 0x2000UL
96 #define LPI2C_HAL_SLAVE_ADDRESS_MATCH_0_INT 0x1000UL
97 #define LPI2C_HAL_SLAVE_FIFO_ERROR_INT 0x800UL
98 #define LPI2C_HAL_SLAVE_BIT_ERROR_INT 0x400UL
99 #define LPI2C_HAL_SLAVE_STOP_DETECT_INT 0x200UL
100 #define LPI2C_HAL_SLAVE_REPEATED_START_INT 0x100UL
101 #define LPI2C_HAL_SLAVE_TRANSMIT_ACK_INT 0x8UL
102 #define LPI2C_HAL_SLAVE_ADDRESS_VALID_INT 0x4UL
103 #define LPI2C_HAL_SLAVE_RECEIVE_DATA_INT 0x2UL
104 #define LPI2C_HAL_SLAVE_TRANSMIT_DATA_INT 0x1UL
285 #if defined(__cplusplus)
305 uint32_t tmp = baseAddr->
VERID;
323 uint32_t tmp = baseAddr->
PARAM;
326 return (uint16_t)tmp;
341 uint32_t tmp = baseAddr->
PARAM;
344 return (uint16_t)tmp;
358 uint32_t regValue = (uint32_t)baseAddr->
MCR;
361 baseAddr->
MCR = (uint32_t)regValue;
375 uint32_t regValue = (uint32_t)baseAddr->
MCR;
378 baseAddr->
MCR = (uint32_t)regValue;
393 uint32_t regValue = (uint32_t)baseAddr->
MCR;
396 baseAddr->
MCR = (uint32_t)regValue;
411 uint32_t regValue = (uint32_t)baseAddr->
MCR;
414 baseAddr->
MCR = (uint32_t)regValue;
431 uint32_t regValue = (uint32_t)baseAddr->
MCR;
434 baseAddr->
MCR = (uint32_t)regValue;
451 uint32_t regValue = (uint32_t)baseAddr->
MCR;
454 baseAddr->
MCR = (uint32_t)regValue;
469 uint32_t regValue = (uint32_t)baseAddr->
MCR;
471 return (
bool)regValue;
486 uint32_t regValue = (uint32_t)baseAddr->
MCR;
488 return (
bool)regValue;
503 uint32_t regValue = (uint32_t)baseAddr->
MCR;
505 return (
bool)regValue;
520 uint32_t regValue = (uint32_t)baseAddr->
MCR;
522 return (
bool)regValue;
537 uint32_t regValue = (uint32_t)baseAddr->
MSR;
539 return (
bool)regValue;
555 uint32_t regValue = (uint32_t)baseAddr->
MSR;
557 return (
bool)regValue;
574 uint32_t regValue = (uint32_t)baseAddr->
MSR;
576 return (
bool)regValue;
593 uint32_t regValue = (uint32_t)baseAddr->
MSR;
595 return (
bool)regValue;
613 uint32_t regValue = (uint32_t)baseAddr->
MSR;
615 return (
bool)regValue;
631 uint32_t regValue = (uint32_t)baseAddr->
MSR;
633 return (
bool)regValue;
652 uint32_t regValue = (uint32_t)baseAddr->
MSR;
654 return (
bool)regValue;
672 uint32_t regValue = (uint32_t)baseAddr->
MSR;
674 return (
bool)regValue;
693 uint32_t regValue = (uint32_t)baseAddr->
MSR;
695 return (
bool)regValue;
710 uint32_t regValue = (uint32_t)baseAddr->
MSR;
712 return (
bool)regValue;
729 uint32_t regValue = (uint32_t)baseAddr->
MSR;
731 return (
bool)regValue;
850 uint32_t regValue = (uint32_t)baseAddr->
MDER;
853 baseAddr->
MDER = (uint32_t)regValue;
869 uint32_t regValue = (uint32_t)baseAddr->
MDER;
872 baseAddr->
MDER = (uint32_t)regValue;
887 uint32_t regValue = (uint32_t)baseAddr->
MDER;
889 return (
bool)regValue;
904 uint32_t regValue = (uint32_t)baseAddr->
MDER;
906 return (
bool)regValue;
933 uint32_t tmp = baseAddr->
MIER;
943 baseAddr->
MIER = tmp;
970 uint32_t tmp = baseAddr->
MIER;
971 bool hasInterrupts =
false;
973 if ((tmp & interrupts) != (uint32_t)0U)
975 hasInterrupts =
true;
978 return hasInterrupts;
996 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
999 baseAddr->
MCFGR0 = (uint32_t)regValue;
1015 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1038 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1041 baseAddr->
MCFGR0 = (uint32_t)regValue;
1056 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1058 return (
bool)regValue;
1073 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1076 baseAddr->
MCFGR0 = (uint32_t)regValue;
1091 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1094 baseAddr->
MCFGR0 = (uint32_t)regValue;
1111 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1114 baseAddr->
MCFGR0 = (uint32_t)regValue;
1129 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1146 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1163 uint32_t regValue = (uint32_t)baseAddr->
MCFGR0;
1165 return (
bool)regValue;
1181 uint32_t tmp = baseAddr->
MCFGR1;
1199 uint32_t tmp = baseAddr->
MCFGR1;
1218 uint32_t tmp = baseAddr->
MCFGR1;
1236 uint32_t tmp = baseAddr->
MCFGR1;
1254 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1257 baseAddr->
MCFGR1 = (uint32_t)regValue;
1272 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1291 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1294 baseAddr->
MCFGR1 = (uint32_t)regValue;
1309 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1328 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1331 baseAddr->
MCFGR1 = (uint32_t)regValue;
1347 uint32_t regValue = (uint32_t)baseAddr->
MCFGR1;
1349 return (
bool)regValue;
1365 uint32_t tmp = baseAddr->
MCFGR1;
1383 uint32_t tmp = baseAddr->
MCFGR1;
1404 uint32_t tmp = baseAddr->
MCFGR2;
1422 uint32_t tmp = baseAddr->
MCFGR2;
1424 return (uint8_t)tmp;
1443 uint32_t tmp = baseAddr->
MCFGR2;
1461 uint32_t tmp = baseAddr->
MCFGR2;
1463 return (uint8_t)tmp;
1481 uint32_t tmp = baseAddr->
MCFGR2;
1499 uint32_t tmp = baseAddr->
MCFGR2;
1501 return (uint16_t)tmp;
1518 baseAddr->
MCFGR3 = cycles;
1533 return (uint32_t)(baseAddr->
MCFGR3);
1550 uint32_t tmp = baseAddr->
MDMR;
1553 baseAddr->
MDMR = tmp;
1568 uint32_t tmp = baseAddr->
MDMR;
1570 return (uint8_t)tmp;
1587 uint32_t tmp = baseAddr->
MDMR;
1590 baseAddr->
MDMR = tmp;
1605 uint32_t tmp = baseAddr->
MDMR;
1607 return (uint8_t)tmp;
1623 uint32_t tmp = baseAddr->
MCCR0;
1626 baseAddr->
MCCR0 = tmp;
1641 uint32_t tmp = baseAddr->
MCCR0;
1643 return (uint8_t)tmp;
1662 uint32_t tmp = baseAddr->
MCCR0;
1665 baseAddr->
MCCR0 = tmp;
1681 uint32_t tmp = baseAddr->
MCCR0;
1683 return (uint8_t)tmp;
1702 uint32_t tmp = baseAddr->
MCCR0;
1705 baseAddr->
MCCR0 = tmp;
1720 uint32_t tmp = baseAddr->
MCCR0;
1722 return (uint8_t)tmp;
1739 uint32_t tmp = baseAddr->
MCCR0;
1742 baseAddr->
MCCR0 = tmp;
1757 uint32_t tmp = baseAddr->
MCCR0;
1759 return (uint8_t)tmp;
1777 uint32_t tmp = baseAddr->
MCCR1;
1780 baseAddr->
MCCR1 = tmp;
1796 uint32_t tmp = baseAddr->
MCCR1;
1798 return (uint8_t)tmp;
1818 uint32_t tmp = baseAddr->
MCCR1;
1821 baseAddr->
MCCR1 = tmp;
1837 uint32_t tmp = baseAddr->
MCCR1;
1839 return (uint8_t)tmp;
1859 uint32_t tmp = baseAddr->
MCCR1;
1862 baseAddr->
MCCR1 = tmp;
1878 uint32_t tmp = baseAddr->
MCCR1;
1880 return (uint8_t)tmp;
1898 uint32_t tmp = baseAddr->
MCCR1;
1901 baseAddr->
MCCR1 = tmp;
1917 uint32_t tmp = baseAddr->
MCCR1;
1919 return (uint8_t)tmp;
1936 uint32_t tmp = baseAddr->
MFCR;
1939 baseAddr->
MFCR = tmp;
1954 uint32_t tmp = baseAddr->
MFCR;
1956 return (uint8_t)tmp;
1973 uint32_t tmp = baseAddr->
MFCR;
1976 baseAddr->
MFCR = tmp;
1991 uint32_t tmp = baseAddr->
MFCR;
1993 return (uint8_t)tmp;
2008 uint32_t tmp = baseAddr->
MFSR;
2010 return (uint8_t)tmp;
2025 uint32_t tmp = baseAddr->
MFSR;
2027 return (uint8_t)tmp;
2044 baseAddr->
MTDR = ((uint32_t)cmd << 8U) + (uint32_t)data;
2060 uint32_t tmp = baseAddr->
MRDR;
2062 return (uint8_t)tmp;
2077 uint32_t regValue = (uint32_t)baseAddr->
MRDR;
2079 return (
bool)regValue;
2094 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2097 baseAddr->
SCR = (uint32_t)regValue;
2113 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2115 return (
bool)regValue;
2131 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2134 baseAddr->
SCR = (uint32_t)regValue;
2149 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2151 return (
bool)regValue;
2167 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2170 baseAddr->
SCR = (uint32_t)regValue;
2185 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2187 return (
bool)regValue;
2202 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2205 baseAddr->
SCR = (uint32_t)regValue;
2220 uint32_t regValue = (uint32_t)baseAddr->
SCR;
2222 return (
bool)regValue;
2237 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2239 return (
bool)regValue;
2255 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2257 return (
bool)regValue;
2273 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2275 return (
bool)regValue;
2291 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2293 return (
bool)regValue;
2310 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2312 return (
bool)regValue;
2329 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2331 return (
bool)regValue;
2347 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2349 return (
bool)regValue;
2366 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2368 return (
bool)regValue;
2384 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2386 return (
bool)regValue;
2403 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2405 return (
bool)regValue;
2422 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2424 return (
bool)regValue;
2443 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2445 return (
bool)regValue;
2464 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2466 return (
bool)regValue;
2485 uint32_t regValue = (uint32_t)baseAddr->
SSR;
2487 return (
bool)regValue;
2573 uint32_t tmp = baseAddr->
SIER;
2583 baseAddr->
SIER = tmp;
2613 uint32_t tmp = baseAddr->
SIER;
2614 bool hasInterrupts =
false;
2616 if ((tmp & interrupts) != (uint32_t)0U)
2618 hasInterrupts =
true;
2621 return hasInterrupts;
2639 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2642 baseAddr->
SDER = (uint32_t)regValue;
2658 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2661 baseAddr->
SDER = (uint32_t)regValue;
2677 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2680 baseAddr->
SDER = (uint32_t)regValue;
2695 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2697 return (
bool)regValue;
2712 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2714 return (
bool)regValue;
2729 uint32_t regValue = (uint32_t)baseAddr->
SDER;
2731 return (
bool)regValue;
2747 uint32_t tmp = baseAddr->
SCFGR1;
2765 uint32_t tmp = baseAddr->
SCFGR1;
2785 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2788 baseAddr->
SCFGR1 = (uint32_t)regValue;
2803 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2805 return (
bool)regValue;
2822 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2825 baseAddr->
SCFGR1 = (uint32_t)regValue;
2840 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2861 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2864 baseAddr->
SCFGR1 = (uint32_t)regValue;
2879 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2903 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2906 baseAddr->
SCFGR1 = (uint32_t)regValue;
2921 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2938 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2941 baseAddr->
SCFGR1 = (uint32_t)regValue;
2956 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2958 return (
bool)regValue;
2973 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2976 baseAddr->
SCFGR1 = (uint32_t)regValue;
2991 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
2993 return (
bool)regValue;
3011 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3014 baseAddr->
SCFGR1 = (uint32_t)regValue;
3030 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3032 return (
bool)regValue;
3049 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3052 baseAddr->
SCFGR1 = (uint32_t)regValue;
3068 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3070 return (
bool)regValue;
3087 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3090 baseAddr->
SCFGR1 = (uint32_t)regValue;
3106 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3108 return (
bool)regValue;
3125 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3128 baseAddr->
SCFGR1 = (uint32_t)regValue;
3144 uint32_t regValue = (uint32_t)baseAddr->
SCFGR1;
3146 return (
bool)regValue;
3166 uint32_t tmp = baseAddr->
SCFGR2;
3184 uint32_t tmp = baseAddr->
SCFGR2;
3186 return (uint8_t)tmp;
3206 uint32_t tmp = baseAddr->
SCFGR2;
3224 uint32_t tmp = baseAddr->
SCFGR2;
3226 return (uint8_t)tmp;
3245 uint32_t tmp = baseAddr->
SCFGR2;
3263 uint32_t tmp = baseAddr->
SCFGR2;
3265 return (uint8_t)tmp;
3283 uint32_t tmp = baseAddr->
SCFGR2;
3301 uint32_t tmp = baseAddr->
SCFGR2;
3303 return (uint8_t)tmp;
3323 uint32_t tmp = baseAddr->
SAMR;
3326 baseAddr->
SAMR = tmp;
3341 uint32_t tmp = baseAddr->
SAMR;
3343 return (uint16_t)tmp;
3363 uint32_t tmp = baseAddr->
SAMR;
3366 baseAddr->
SAMR = tmp;
3381 uint32_t tmp = baseAddr->
SAMR;
3383 return (uint16_t)tmp;
3399 uint32_t regValue = (uint32_t)baseAddr->
SASR;
3420 uint32_t tmp = baseAddr->
SASR;
3422 return (uint16_t)tmp;
3440 uint32_t regValue = (uint32_t)baseAddr->
STAR;
3443 baseAddr->
STAR = (uint32_t)regValue;
3458 uint32_t regValue = (uint32_t)baseAddr->
STAR;
3476 baseAddr->
STDR = (uint32_t)data;
3492 uint32_t regValue = (uint32_t)baseAddr->
SRDR;
3494 return (
bool)regValue;
3509 uint32_t regValue = (uint32_t)baseAddr->
SRDR;
3511 return (
bool)regValue;
3527 uint32_t tmp = baseAddr->
SRDR;
3529 return (uint8_t)tmp;
3545 #if defined(__cplusplus)
#define LPI2C_SCFGR1_ADRSTALL_SHIFT
lpi2c_nack_config_t
Master NACK reaction configuration Implements : lpi2c_nack_config_t_Class.
#define LPI2C_MCFGR1_IGNACK_MASK
#define LPI2C_MCR_RST_SHIFT
static void LPI2C_HAL_SlaveSetHighSpeedModeDetect(LPI2C_Type *baseAddr, bool enable)
Control detection of the High-speed Mode master code.
#define LPI2C_MCFGR0_HREN_SHIFT
static bool LPI2C_HAL_MasterGetHreqEnable(const LPI2C_Type *baseAddr)
Return the enable/disable state the host request feature.
static uint8_t LPI2C_HAL_SlaveGetSCLGlitchFilter(const LPI2C_Type *baseAddr)
Return the LPI2C slave SCL glitch filter configuration.
#define LPI2C_MDER_RDDE_SHIFT
#define LPI2C_MCFGR2_FILTSCL(x)
static uint8_t LPI2C_HAL_MasterGetClockLowPeriodHS(const LPI2C_Type *baseAddr)
Return the configured minimum clock low period in high-speed mode.
static void LPI2C_HAL_MasterSetCircularFIFO(LPI2C_Type *baseAddr, bool enable)
Set the circular FIFO mode for the transmit FIFO.
#define LPI2C_MDER_RDDE(x)
static bool LPI2C_HAL_MasterGetReceiveDataReadyEvent(const LPI2C_Type *baseAddr)
Indicate the availability of receive data.
lpi2c_timeout_config_t
SCL/SDA low time-out configuration Implements : lpi2c_timeout_config_t_Class.
static void LPI2C_HAL_SlaveClearFIFOErrorEvent(LPI2C_Type *baseAddr)
Clear the FIFO overflow or underflow flag.
#define LPI2C_SRDR_RXEMPTY_MASK
#define LPI2C_SRDR_SOF_MASK
#define LPI2C_SASR_RADDR_MASK
#define LPI2C_SCFGR1_ACKSTALL_MASK
#define LPI2C_SCFGR1_RXSTALL(x)
#define LPI2C_MCFGR0_CIRFIFO_MASK
static void LPI2C_HAL_MasterSetEnable(LPI2C_Type *baseAddr, bool enable)
Enable or disable the LPI2C master.
static void LPI2C_HAL_MasterSetSoftwareReset(LPI2C_Type *baseAddr, bool enable)
Set/clear the master reset command.
#define LPI2C_MCR_MEN_SHIFT
#define LPI2C_MSR_ALF_SHIFT
#define LPI2C_MCFGR0_HRSEL_SHIFT
static bool LPI2C_HAL_SlaveGetReceiveDataEvent(const LPI2C_Type *baseAddr)
Check the availability of receive data.
#define LPI2C_MRDR_RXEMPTY_SHIFT
#define LPI2C_MFSR_RXCOUNT_SHIFT
#define LPI2C_SCFGR1_GCEN_SHIFT
static bool LPI2C_HAL_SlaveGetStartOfFrame(const LPI2C_Type *baseAddr)
Check if the current received data is the first in the current frame.
#define LPI2C_SASR_ANV_MASK
#define LPI2C_MCFGR1_PINCFG_SHIFT
static lpi2c_slave_nack_config_t LPI2C_HAL_SlaveGetIgnoreNACK(const LPI2C_Type *baseAddr)
Return the configured slave behaviour when NACK is detected.
static void LPI2C_HAL_MasterSetClockHighPeriodHS(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock high period in high-speed mode.
static void LPI2C_HAL_SlaveSetSoftwareReset(LPI2C_Type *baseAddr, bool enable)
Set/clear the slave reset command.
#define LPI2C_SAMR_ADDR0(x)
#define LPI2C_MCR_DBGEN_MASK
static bool LPI2C_HAL_SlaveGetBitErrorEvent(const LPI2C_Type *baseAddr)
Check the detection of a bit error.
#define LPI2C_SCFGR1_SAEN_MASK
static void LPI2C_HAL_MasterSetClockHighPeriod(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock high period.
#define LPI2C_SCFGR1_ADRSTALL_MASK
static void LPI2C_HAL_MasterSetSetupHoldDelayHS(LPI2C_Type *baseAddr, uint8_t value)
Set the setup and hold time for a START / STOP condition in high-speed mode.
static void LPI2C_HAL_MasterSetHreqSelect(LPI2C_Type *baseAddr, lpi2c_hreq_source_t source)
Set the source of the host request input.
static void LPI2C_HAL_SlaveSetIgnoreNACK(LPI2C_Type *baseAddr, lpi2c_slave_nack_config_t nack_config)
Control slave behaviour when NACK is detected.
#define LPI2C_MSR_RDF_SHIFT
static void LPI2C_HAL_MasterClearPinLowTimeoutEvent(LPI2C_Type *baseAddr)
Clear the pin low timeout event flag.
#define LPI2C_SSR_SARF_SHIFT
#define LPI2C_MCCR0_CLKLO_MASK
#define LPI2C_MCFGR0_HRPOL(x)
static uint16_t LPI2C_HAL_SlaveGetAddr1(const LPI2C_Type *baseAddr)
Return the ADDR1 address for slave address match.
#define LPI2C_MRDR_DATA_SHIFT
static void LPI2C_HAL_SlaveSetGeneralCall(LPI2C_Type *baseAddr, bool enable)
Enable or disable general call address.
#define LPI2C_SRDR_DATA_SHIFT
static void LPI2C_HAL_MasterSetTimeoutConfig(LPI2C_Type *baseAddr, lpi2c_timeout_config_t configuration)
Set the timeout configuration of the module.
static uint16_t LPI2C_HAL_MasterGetBusIdleTimeout(const LPI2C_Type *baseAddr)
Return the bus idle timeout configuration.
#define LPI2C_MCR_DBGEN(x)
#define LPI2C_SCFGR2_DATAVD(x)
static bool LPI2C_HAL_SlaveGetRXEmpty(const LPI2C_Type *baseAddr)
Check if the receive data register is empty.
static bool LPI2C_HAL_MasterGetBusBusyEvent(const LPI2C_Type *baseAddr)
Return the idle/busy state of the I2C bus.
#define LPI2C_MCFGR0_HREN(x)
#define LPI2C_SCFGR1_TXDSTALL_MASK
static bool LPI2C_HAL_SlaveGetFilterDoze(const LPI2C_Type *baseAddr)
Return the slave filter configuration in doze mode.
static uint8_t LPI2C_HAL_SlaveGetClockHoldTime(const LPI2C_Type *baseAddr)
Return the minimum clock hold time configuration.
#define LPI2C_MCFGR1_MATCFG(x)
static bool LPI2C_HAL_MasterGetAutoStopConfig(const LPI2C_Type *baseAddr)
Return the current setting for automatic generation of STOP condition.
#define LPI2C_MCCR0_DATAVD(x)
#define LPI2C_SSR_BEF_MASK
#define LPI2C_MFSR_TXCOUNT_MASK
static lpi2c_master_prescaler_t LPI2C_HAL_MasterGetPrescaler(const LPI2C_Type *baseAddr)
Return the LPI2C master prescaler.
#define LPI2C_MCCR0_CLKHI_MASK
#define LPI2C_MCCR0_SETHOLD(x)
static void LPI2C_HAL_SlaveSetRxDataConfig(LPI2C_Type *baseAddr, lpi2c_slave_rxdata_config_t configuration)
Control the functionality of the receive data register.
#define LPI2C_MCCR0_SETHOLD_MASK
lpi2c_slave_nack_transmit_t
Slave ACK transmission options Implements : lpi2c_slave_nack_transmit_t_Class.
#define LPI2C_SCFGR1_TXDSTALL(x)
static bool LPI2C_HAL_SlaveGetFIFOErrorEvent(const LPI2C_Type *baseAddr)
Check the detection of a FIFO overflow or underflow.
static lpi2c_hreq_polarity_t LPI2C_HAL_MasterGetHreqPolarity(const LPI2C_Type *baseAddr)
Return the polarity of the host request input pin.
static bool LPI2C_HAL_MasterGetSTOPDetectEvent(const LPI2C_Type *baseAddr)
Check the occurrence of a STOP detect event.
#define LPI2C_SCFGR2_CLKHOLD_SHIFT
static uint8_t LPI2C_HAL_MasterGetSDAGlitchFilter(const LPI2C_Type *baseAddr)
Return the LPI2C SDA glitch filter configuration.
lpi2c_slave_nack_config_t
Slave NACK reaction configuration Implements : lpi2c_slave_nack_config_t_Class.
static void LPI2C_HAL_MasterClearDataMatchEvent(LPI2C_Type *baseAddr)
Clear the data match event flag.
#define LPI2C_MCFGR2_FILTSDA_MASK
static void LPI2C_HAL_SlaveSetRxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable slave receive data DMA requests.
lpi2c_slave_txflag_config_t
Slave Transmit Data Flag function control Implements : lpi2c_slave_txflag_config_t_Class.
#define LPI2C_MCCR0_DATAVD_SHIFT
static bool LPI2C_HAL_SlaveGetRXStall(const LPI2C_Type *baseAddr)
Return the configured state for clock stretching for data reception.
#define LPI2C_PARAM_MRXFIFO_MASK
#define LPI2C_MSR_EPF_MASK
#define LPI2C_SSR_BEF_SHIFT
#define LPI2C_MCFGR1_PINCFG(x)
static void LPI2C_HAL_MasterClearFIFOErrorEvent(LPI2C_Type *baseAddr)
Clear the FIFO error event flag.
#define LPI2C_SSR_GCF_SHIFT
static void LPI2C_HAL_SlaveClearBitErrorEvent(LPI2C_Type *baseAddr)
Clear bit error flag.
static uint8_t LPI2C_HAL_MasterGetDataValidDelay(const LPI2C_Type *baseAddr)
Return the configured data hold time for SDA.
#define LPI2C_MCR_DOZEN(x)
static void LPI2C_HAL_SlaveSetFilterDoze(LPI2C_Type *baseAddr, bool enable)
Configure the slave filter in doze mode.
#define LPI2C_MCCR1_CLKHI_MASK
static uint8_t LPI2C_HAL_MasterGetRxData(const LPI2C_Type *baseAddr)
Return the received data.
lpi2c_rx_data_match_t
Non_matching data discard options Implements : lpi2c_rx_data_match_t_Class.
#define LPI2C_SCFGR1_HSMEN_MASK
#define LPI2C_MSR_NDF_SHIFT
static bool LPI2C_HAL_MasterGetEnable(const LPI2C_Type *baseAddr)
Return the enable/disable setting for the LPI2C master.
#define LPI2C_SCFGR1_ADDRCFG_SHIFT
#define LPI2C_SCR_FILTDZ(x)
static uint16_t LPI2C_HAL_SlaveGetAddr0(const LPI2C_Type *baseAddr)
Return the ADDR0 address for slave address match.
#define LPI2C_MSR_SDF_SHIFT
#define LPI2C_MCCR0_CLKHI(x)
#define LPI2C_MCFGR0_HREN_MASK
static void LPI2C_HAL_SlaveSetInt(LPI2C_Type *baseAddr, uint32_t interrupts, bool enable)
Enable or disable specified LPI2C slave interrupts.
#define LPI2C_MRDR_DATA_MASK
#define LPI2C_SAMR_ADDR1_MASK
#define LPI2C_SSR_AM0F_SHIFT
#define LPI2C_MCR_DBGEN_SHIFT
static void LPI2C_HAL_MasterSetTxFIFOWatermark(LPI2C_Type *baseAddr, uint8_t value)
Set the transmit FIFO watermark.
static bool LPI2C_HAL_MasterGetCircularFIFO(const LPI2C_Type *baseAddr)
Return the circular FIFO mode for the transmit FIFO.
#define LPI2C_MSR_NDF_MASK
#define LPI2C_MCFGR2_FILTSCL_MASK
#define LPI2C_VERID_MAJOR_SHIFT
static uint8_t LPI2C_HAL_MasterGetClockHighPeriodHS(const LPI2C_Type *baseAddr)
Return the configured minimum clock high period in high-speed mode.
#define LPI2C_MCCR0_SETHOLD_SHIFT
static uint32_t LPI2C_HAL_MasterGetPinLowTimeout(const LPI2C_Type *baseAddr)
Return the pin low timeout configuration.
static void LPI2C_HAL_MasterClearEndPacketEvent(LPI2C_Type *baseAddr)
Clear the end packet event flag.
static void LPI2C_HAL_MasterSetInt(LPI2C_Type *baseAddr, uint32_t interrupts, bool enable)
Enable or disable specified LPI2C master interrupts.
static void LPI2C_HAL_SlaveSetTXDStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for data transmission.
#define LPI2C_MCFGR0_CIRFIFO_SHIFT
#define LPI2C_STAR_TXNACK(x)
lpi2c_hreq_source_t
Host request input source selection Implements : lpi2c_hreq_source_t_Class.
static void LPI2C_HAL_MasterClearArbitrationLostEvent(LPI2C_Type *baseAddr)
Clear the arbitration lost event flag.
static void LPI2C_HAL_MasterSetNACKConfig(LPI2C_Type *baseAddr, lpi2c_nack_config_t configuration)
Configure the reaction of the module on NACK reception.
static uint8_t LPI2C_HAL_MasterGetTxFIFOWatermark(const LPI2C_Type *baseAddr)
Return the configured transmit FIFO watermark.
#define LPI2C_SCR_FILTEN_SHIFT
static bool LPI2C_HAL_MasterGetDataMatchEvent(const LPI2C_Type *baseAddr)
Check the occurrence of a data match event.
#define LPI2C_MRDR_RXEMPTY_MASK
#define LPI2C_MCCR1_CLKLO(x)
#define LPI2C_MCCR0_CLKHI_SHIFT
static void LPI2C_HAL_MasterSetBusIdleTimeout(LPI2C_Type *baseAddr, uint16_t cycles)
Configure the bus idle timeout.
static bool LPI2C_HAL_MasterGetDozeMode(const LPI2C_Type *baseAddr)
Return the doze mode setting for the LPI2C master.
static bool LPI2C_HAL_SlaveGetSMBusAlertResponseEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an SMBus alert response.
#define LPI2C_SCFGR1_RXSTALL_MASK
#define LPI2C_SCFGR2_CLKHOLD_MASK
static bool LPI2C_HAL_SlaveGetTxDMA(const LPI2C_Type *baseAddr)
Check if slave transmit data DMA requests are enabled.
#define LPI2C_MFCR_TXWATER_SHIFT
static bool LPI2C_HAL_SlaveGetInt(const LPI2C_Type *baseAddr, uint32_t interrupts)
Return the state of the specified LPI2C slave interrupt.
#define LPI2C_MSR_PLTF_MASK
#define LPI2C_MCCR1_SETHOLD_MASK
static bool LPI2C_HAL_SlaveGetTransmitDataEvent(const LPI2C_Type *baseAddr)
Check if transmit data is requested.
#define LPI2C_MCCR1_CLKLO_SHIFT
#define LPI2C_SRDR_RXEMPTY_SHIFT
static bool LPI2C_HAL_SlaveGetSTOPDetectEvent(const LPI2C_Type *baseAddr)
Check the detection of a STOP condition.
#define LPI2C_MCR_RST_MASK
#define LPI2C_SSR_FEF_SHIFT
static bool LPI2C_HAL_MasterGetInt(const LPI2C_Type *baseAddr, uint32_t interrupts)
Return the state of the specified LPI2C master interrupt.
#define LPI2C_SCFGR1_TXCFG_SHIFT
#define LPI2C_SCFGR1_GCEN_MASK
#define LPI2C_MFSR_RXCOUNT_MASK
static void LPI2C_HAL_SlaveSetSMBusAlert(LPI2C_Type *baseAddr, bool enable)
Enable or disable match on SMBus Alert.
static void LPI2C_HAL_MasterSetPinLowTimeout(LPI2C_Type *baseAddr, uint32_t cycles)
Configure the pin low timeout.
static bool LPI2C_HAL_SlaveGetAddrDMA(const LPI2C_Type *baseAddr)
Check if slave address valid DMA requests are enabled.
#define LPI2C_MCR_DOZEN_MASK
#define LPI2C_MCCR1_DATAVD_SHIFT
#define LPI2C_MFSR_TXCOUNT_SHIFT
static bool LPI2C_HAL_MasterGetSoftwareReset(const LPI2C_Type *baseAddr)
Return the reset setting for the LPI2C master.
#define LPI2C_SRDR_SOF_SHIFT
#define LPI2C_SAMR_ADDR0_SHIFT
static void LPI2C_HAL_SlaveSetRXStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for data reception.
#define LPI2C_SSR_SDF_SHIFT
static void LPI2C_HAL_SlaveSetTxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable slave transmit data DMA requests.
#define LPI2C_PARAM_MTXFIFO_SHIFT
#define LPI2C_SASR_RADDR_SHIFT
#define LPI2C_SSR_SBF_MASK
#define LPI2C_SAMR_ADDR1_SHIFT
#define LPI2C_MCFGR0_HRSEL_MASK
lpi2c_match_config_t
Data match selection Implements : lpi2c_match_config_t_Class.
lpi2c_slave_addr_valid_t
Slave received address validity Implements : lpi2c_slave_addr_valid_t_Class.
#define LPI2C_MCCR1_SETHOLD(x)
#define LPI2C_MSR_MBF_SHIFT
#define LPI2C_SCFGR1_TXDSTALL_SHIFT
static void LPI2C_HAL_SlaveSetTransmitNACK(LPI2C_Type *baseAddr, lpi2c_slave_nack_transmit_t nack)
Configure the ACK/NACK transmission after a received byte.
#define LPI2C_MSR_TDF_MASK
#define LPI2C_MCCR1_CLKLO_MASK
static lpi2c_hreq_source_t LPI2C_HAL_MasterGetHreqSelect(const LPI2C_Type *baseAddr)
Return the source of the host request input.
static bool LPI2C_HAL_SlaveGetRxDMA(const LPI2C_Type *baseAddr)
Check if slave receive data DMA requests are enabled.
#define LPI2C_SSR_BBF_MASK
#define LPI2C_SSR_AM0F_MASK
#define LPI2C_SCFGR2_FILTSDA(x)
#define LPI2C_MDER_TDDE(x)
#define LPI2C_SSR_TDF_SHIFT
static bool LPI2C_HAL_SlaveGetAddrStall(const LPI2C_Type *baseAddr)
Return the configured state for clock stretching for valid address reception.
static void LPI2C_HAL_SlaveSetAddrStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for valid address reception.
static lpi2c_nack_config_t LPI2C_HAL_MasterGetNACKConfig(const LPI2C_Type *baseAddr)
Return the reaction of the module on NACK reception.
#define LPI2C_SCFGR1_RXCFG_SHIFT
static void LPI2C_HAL_SlaveSetSDAGlitchFilter(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the LPI2C slave SDA glitch filter.
#define LPI2C_MCFGR2_BUSIDLE(x)
static bool LPI2C_HAL_MasterGetEndPacketEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an end packet event.
static lpi2c_match_config_t LPI2C_HAL_MasterGetMatchConfig(const LPI2C_Type *baseAddr)
Return the match mode of the module.
#define LPI2C_SCFGR2_FILTSCL_SHIFT
static void LPI2C_HAL_MasterSetClockLowPeriod(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock low period.
static void LPI2C_HAL_MasterClearNACKDetectEvent(LPI2C_Type *baseAddr)
Clear the unexpected NACK event flag.
#define LPI2C_SSR_FEF_MASK
static bool LPI2C_HAL_MasterGetPinLowTimeoutEvent(const LPI2C_Type *baseAddr)
Check the occurrence of a pin low timeout event.
#define LPI2C_MCFGR1_AUTOSTOP_SHIFT
static void LPI2C_HAL_MasterClearSTOPDetectEvent(LPI2C_Type *baseAddr)
Clear the STOP detect event flag.
lpi2c_pin_config_t
Pin configuration selection Implements : lpi2c_pin_config_t_Class.
static void LPI2C_HAL_SlaveSetACKStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for the sending of the ACK bit.
#define LPI2C_MCFGR1_IGNACK_SHIFT
#define LPI2C_SSR_AM1F_SHIFT
static void LPI2C_HAL_MasterRxFIFOResetCmd(LPI2C_Type *baseAddr)
Reset the master receive FIFO.
static uint8_t LPI2C_HAL_SlaveGetSDAGlitchFilter(const LPI2C_Type *baseAddr)
Return the LPI2C slave SDA glitch filter configuration.
#define LPI2C_MCR_DOZEN_SHIFT
static void LPI2C_HAL_MasterSetPinConfig(LPI2C_Type *baseAddr, lpi2c_pin_config_t configuration)
Set the pin mode of the module.
#define LPI2C_SCR_RST_SHIFT
#define LPI2C_SCFGR2_FILTSDA_SHIFT
static bool LPI2C_HAL_SlaveGetGeneralCall(const LPI2C_Type *baseAddr)
Return the configured state for the general call address.
static uint8_t LPI2C_HAL_MasterGetMatch1(const LPI2C_Type *baseAddr)
Return the MATCH1 value for the data match feature.
#define LPI2C_SCFGR1_HSMEN(x)
#define LPI2C_SCR_RST_MASK
#define LPI2C_MSR_RDF_MASK
#define LPI2C_MDMR_MATCH1_SHIFT
#define LPI2C_VERID_MAJOR_MASK
#define LPI2C_SDER_RDDE(x)
#define LPI2C_MCCR1_DATAVD(x)
static bool LPI2C_HAL_MasterGetFIFOErrorEvent(const LPI2C_Type *baseAddr)
Check the occurrence of a FIFO error event.
#define LPI2C_MCFGR1_TIMECFG(x)
#define LPI2C_PARAM_MTXFIFO_MASK
#define LPI2C_STAR_TXNACK_SHIFT
static void LPI2C_HAL_MasterSetMatchConfig(LPI2C_Type *baseAddr, lpi2c_match_config_t configuration)
Set the match mode of the module.
static bool LPI2C_HAL_SlaveGetHighSpeedModeDetect(const LPI2C_Type *baseAddr)
Return the state of the High-speed Mode master code detection.
static bool LPI2C_HAL_SlaveGetSMBusAlert(const LPI2C_Type *baseAddr)
Return the configured state for the SMBus Alert match.
static bool LPI2C_HAL_SlaveGetGeneralCallEvent(const LPI2C_Type *baseAddr)
Check the detection of the general call address.
static void LPI2C_HAL_MasterSetMatch1(LPI2C_Type *baseAddr, uint8_t value)
Set the MATCH1 value for the data match feature.
#define LPI2C_SAMR_ADDR1(x)
static void LPI2C_HAL_SlaveSetDataValidDelay(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the SDA data valid delay time for the I2C slave.
#define LPI2C_MSR_ALF_MASK
#define LPI2C_SDER_RDDE_SHIFT
#define LPI2C_SCFGR1_IGNACK_SHIFT
#define LPI2C_MCFGR0_HRPOL_SHIFT
#define LPI2C_SCR_FILTEN_MASK
#define LPI2C_MCFGR1_MATCFG_SHIFT
#define LPI2C_MCFGR1_IGNACK(x)
static bool LPI2C_HAL_SlaveGetSoftwareReset(const LPI2C_Type *baseAddr)
Return the reset setting for the LPI2C slave.
#define LPI2C_MCR_MEN_MASK
#define LPI2C_SCFGR2_FILTSCL_MASK
#define LPI2C_VERID_FEATURE_SHIFT
static void LPI2C_HAL_MasterSetDozeMode(LPI2C_Type *baseAddr, bool enable)
Set the master behaviour in Doze mode.
static lpi2c_rx_data_match_t LPI2C_HAL_MasterGetRxDataMatch(const LPI2C_Type *baseAddr)
Return the current data match discarding policy.
static void LPI2C_HAL_MasterSetDataValidDelayHS(LPI2C_Type *baseAddr, uint8_t value)
Set the data hold time for SDA in high-speed mode.
#define LPI2C_MCCR0_CLKLO(x)
#define LPI2C_SCFGR1_RXCFG(x)
#define LPI2C_SCFGR1_SAEN_SHIFT
#define LPI2C_SDER_AVDE_SHIFT
#define LPI2C_MCFGR1_PRESCALE_MASK
#define LPI2C_SCFGR1_ACKSTALL_SHIFT
#define LPI2C_MDER_TDDE_SHIFT
static bool LPI2C_HAL_SlaveGetTransmitACKEvent(const LPI2C_Type *baseAddr)
Check if transmitting ACK response is required.
#define LPI2C_VERID_MINOR_SHIFT
#define LPI2C_VERID_MINOR_MASK
#define LPI2C_SCFGR1_HSMEN_SHIFT
static uint16_t LPI2C_HAL_SlaveGetReceivedAddr(const LPI2C_Type *baseAddr)
Return the received slave address.
static uint8_t LPI2C_HAL_MasterGetClockLowPeriod(const LPI2C_Type *baseAddr)
Return the configured minimum clock low period.
static void LPI2C_HAL_MasterSetRxDataMatch(LPI2C_Type *baseAddr, lpi2c_rx_data_match_t rxDataMatch)
Control the discarding of data that does not match the configured criteria.
static void LPI2C_HAL_SlaveSetAddrDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable slave address valid DMA requests.
#define LPI2C_SCFGR1_SAEN(x)
LPI2C module version number Implements : lpi2c_version_info_t_Class.
#define LPI2C_SCFGR2_FILTSDA_MASK
static bool LPI2C_HAL_MasterGetMasterBusyEvent(const LPI2C_Type *baseAddr)
Return the idle/busy state of the LPI2C master.
#define LPI2C_SCFGR1_IGNACK(x)
#define LPI2C_SSR_TDF_MASK
#define LPI2C_MCFGR0_CIRFIFO(x)
lpi2c_master_prescaler_t
LPI2C master prescaler options Implements : lpi2c_master_prescaler_t_Class.
static bool LPI2C_HAL_MasterGetDebugMode(const LPI2C_Type *baseAddr)
Return the debug mode setting for the LPI2C master.
lpi2c_hreq_polarity_t
Host request input polarity selection Implements : lpi2c_hreq_polarity_t_Class.
#define LPI2C_SCR_SEN_MASK
#define LPI2C_MDER_RDDE_MASK
#define LPI2C_SAMR_ADDR0_MASK
#define LPI2C_SCR_FILTEN(x)
#define LPI2C_MCFGR2_FILTSCL_SHIFT
static uint8_t LPI2C_HAL_MasterGetSetupHoldDelay(const LPI2C_Type *baseAddr)
Return the configured setup and hold time.
#define LPI2C_MCR_RTF_MASK
#define LPI2C_SDER_TDDE_MASK
#define LPI2C_SCFGR1_ADRSTALL(x)
#define LPI2C_SDER_AVDE(x)
static uint8_t LPI2C_HAL_MasterGetRxFIFOWatermark(const LPI2C_Type *baseAddr)
Return the configured receive FIFO watermark.
#define LPI2C_MCFGR0_RDMO_SHIFT
static void LPI2C_HAL_SlaveSetAddr1(LPI2C_Type *baseAddr, uint16_t addr)
Configure the ADDR1 address for slave address match.
static uint8_t LPI2C_HAL_MasterGetDataValidDelayHS(const LPI2C_Type *baseAddr)
Return the configured data hold time for SDA in high-speed mode.
#define LPI2C_MSR_MBF_MASK
static uint16_t LPI2C_HAL_MasterGetTxFIFOSize(const LPI2C_Type *baseAddr)
Get the size of the Master Transmit FIFO.
#define LPI2C_SCFGR1_RXCFG_MASK
static bool LPI2C_HAL_SlaveGetBusBusyEvent(const LPI2C_Type *baseAddr)
Check the busy state of the bus.
#define LPI2C_MSR_DMF_SHIFT
#define LPI2C_MCFGR1_PRESCALE_SHIFT
#define LPI2C_MCCR0_CLKLO_SHIFT
static void LPI2C_HAL_MasterSetRxFIFOWatermark(LPI2C_Type *baseAddr, uint8_t value)
Set the receive FIFO watermark.
static void LPI2C_HAL_SlaveSetAddr0(LPI2C_Type *baseAddr, uint16_t addr)
Configure the ADDR0 address for slave address match.
#define LPI2C_MSR_SDF_MASK
#define LPI2C_SSR_SDF_MASK
static void LPI2C_HAL_MasterSetHreqPolarity(LPI2C_Type *baseAddr, lpi2c_hreq_polarity_t polarity)
Set the polarity of the host request input pin.
#define LPI2C_VERID_FEATURE_MASK
#define LPI2C_MSR_DMF_MASK
static void LPI2C_HAL_MasterSetPrescaler(LPI2C_Type *baseAddr, lpi2c_master_prescaler_t prescaler)
Configure the LPI2C master prescaler.
static lpi2c_slave_addr_config_t LPI2C_HAL_SlaveGetAddrConfig(const LPI2C_Type *baseAddr)
Return the address match configuration.
static bool LPI2C_HAL_MasterGetRxEmpty(const LPI2C_Type *baseAddr)
Check if the master receive FIFO is empty.
lpi2c_master_command_t
LPI2C master commands Implements : lpi2c_master_command_t_Class.
#define LPI2C_SDER_TDDE(x)
static void LPI2C_HAL_SlaveSetTxFlagConfig(LPI2C_Type *baseAddr, lpi2c_slave_txflag_config_t configuration)
Control the conditions for setting the transmit data flag.
#define LPI2C_MDMR_MATCH0_SHIFT
#define LPI2C_MCCR0_DATAVD_MASK
#define LPI2C_MCFGR1_MATCFG_MASK
static void LPI2C_HAL_SlaveSetSCLGlitchFilter(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the LPI2C slave SCL glitch filter.
#define LPI2C_SCFGR1_GCEN(x)
#define LPI2C_SSR_RSF_MASK
#define LPI2C_MFCR_RXWATER_MASK
static void LPI2C_HAL_MasterSetSetupHoldDelay(LPI2C_Type *baseAddr, uint8_t value)
Set the setup and hold delay for a START / STOP condition.
#define LPI2C_SCFGR1_ADDRCFG(x)
#define LPI2C_SCR_FILTDZ_SHIFT
#define LPI2C_MFCR_TXWATER(x)
#define LPI2C_SCFGR1_ADDRCFG_MASK
#define LPI2C_MCFGR1_AUTOSTOP_MASK
static void LPI2C_HAL_SlaveSetFilterEnable(LPI2C_Type *baseAddr, bool enable)
Enable/disable the slave filter.
#define LPI2C_SCR_FILTDZ_MASK
static uint8_t LPI2C_HAL_SlaveGetData(const LPI2C_Type *baseAddr)
Return the data received by the LPI2C slave receiver.
static void LPI2C_HAL_MasterSetAutoStopConfig(LPI2C_Type *baseAddr, bool enable)
Configure the automatic generation of STOP condition.
static bool LPI2C_HAL_SlaveGetTXDStall(const LPI2C_Type *baseAddr)
Return the configured state for clock stretching for data transmission.
static void LPI2C_HAL_SlaveSetClockHoldTime(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the minimum clock hold time for the I2C slave.
void LPI2C_HAL_Init(LPI2C_Type *baseAddr)
Initializes the LPI2C module to a known state.
#define LPI2C_MCFGR1_TIMECFG_SHIFT
#define LPI2C_MCFGR0_HRSEL(x)
static void LPI2C_HAL_MasterSetDataValidDelay(LPI2C_Type *baseAddr, uint8_t value)
Set the data hold time for SDA.
static uint8_t LPI2C_HAL_MasterGetSetupHoldDelayHS(const LPI2C_Type *baseAddr)
Return the configured setup and hold time in high-speed mode.
static bool LPI2C_HAL_SlaveGetAddressValidEvent(const LPI2C_Type *baseAddr)
Check the validity of the Address Status Register.
#define LPI2C_SCFGR1_TXCFG_MASK
static lpi2c_slave_addr_valid_t LPI2C_HAL_SlaveGetAddrValid(const LPI2C_Type *baseAddr)
Check the validity of received address.
static void LPI2C_HAL_MasterSetTxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable transmit data DMA requests.
#define LPI2C_SCFGR1_IGNACK_MASK
static bool LPI2C_HAL_SlaveGetACKStall(const LPI2C_Type *baseAddr)
Return the configured state for clock stretching for the sending of the ACK bit.
#define LPI2C_MDER_TDDE_MASK
#define LPI2C_SSR_AVF_SHIFT
#define LPI2C_MSR_PLTF_SHIFT
static void LPI2C_HAL_SlaveSetAddrConfig(LPI2C_Type *baseAddr, lpi2c_slave_addr_config_t configuration)
Control address match configuration.
static void LPI2C_HAL_MasterTransmitCmd(LPI2C_Type *baseAddr, lpi2c_master_command_t cmd, uint8_t data)
Provide commands and data for the LPI2C master.
#define LPI2C_SCFGR2_DATAVD_SHIFT
#define LPI2C_MCCR1_CLKHI_SHIFT
static uint16_t LPI2C_HAL_MasterGetRxFIFOSize(const LPI2C_Type *baseAddr)
Get the size of the Master Receive FIFO.
#define LPI2C_SSR_AM1F_MASK
#define LPI2C_MSR_TDF_SHIFT
static lpi2c_slave_rxdata_config_t LPI2C_HAL_SlaveGetRxDataConfig(const LPI2C_Type *baseAddr)
Return the configured functionality of the receive data register.
#define LPI2C_MCFGR2_FILTSDA(x)
static uint8_t LPI2C_HAL_MasterGetSCLGlitchFilter(const LPI2C_Type *baseAddr)
Return the LPI2C SCL glitch filter configuration.
#define LPI2C_SSR_AVF_MASK
#define LPI2C_SSR_RDF_SHIFT
static lpi2c_slave_nack_transmit_t LPI2C_HAL_SlaveGetTransmitNACK(const LPI2C_Type *baseAddr)
Return the configured ACK/NACK transmission setting.
#define LPI2C_PARAM_MRXFIFO_SHIFT
#define LPI2C_MCFGR0_RDMO_MASK
static uint8_t LPI2C_HAL_MasterGetClockHighPeriod(const LPI2C_Type *baseAddr)
Return the configured minimum clock high period.
#define LPI2C_MCFGR2_BUSIDLE_SHIFT
#define LPI2C_MCR_RRF_MASK
#define LPI2C_SRDR_DATA_MASK
static void LPI2C_HAL_MasterSetDebugMode(LPI2C_Type *baseAddr, bool enable)
Set the master behaviour in Debug mode.
#define LPI2C_MCFGR1_AUTOSTOP(x)
static lpi2c_timeout_config_t LPI2C_HAL_MasterGetTimeoutConfig(const LPI2C_Type *baseAddr)
Return the timeout configuration of the module.
static bool LPI2C_HAL_MasterGetTransmitDataRequestEvent(const LPI2C_Type *baseAddr)
Indicate if the LPI2C master requests more data.
#define LPI2C_MCCR1_DATAVD_MASK
#define LPI2C_SCFGR2_FILTSCL(x)
#define LPI2C_SCFGR2_CLKHOLD(x)
#define LPI2C_SCFGR1_ACKSTALL(x)
#define LPI2C_SSR_RDF_MASK
#define LPI2C_MCFGR1_PRESCALE(x)
#define LPI2C_SSR_BBF_SHIFT
static void LPI2C_HAL_SlaveClearSTOPDetectEvent(LPI2C_Type *baseAddr)
Clear the STOP detect flag.
static lpi2c_pin_config_t LPI2C_HAL_MasterGetPinConfig(const LPI2C_Type *baseAddr)
Return the pin mode of the module.
static uint8_t LPI2C_HAL_MasterGetTxFIFOCount(const LPI2C_Type *baseAddr)
Return the number of words in the transmit FIFO.
#define LPI2C_MFCR_RXWATER_SHIFT
static void LPI2C_HAL_MasterSetHreqEnable(LPI2C_Type *baseAddr, bool enable)
Enable/disable the host request feature.
static void LPI2C_HAL_MasterTxFIFOResetCmd(LPI2C_Type *baseAddr)
Reset the master transmit FIFO.
static bool LPI2C_HAL_MasterGetArbitrationLostEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an arbitration lost event.
#define LPI2C_SCFGR1_RXSTALL_SHIFT
#define LPI2C_SDER_RDDE_MASK
#define LPI2C_SSR_SBF_SHIFT
#define LPI2C_MSR_FEF_SHIFT
static bool LPI2C_HAL_SlaveGetAddressMatch1Event(const LPI2C_Type *baseAddr)
Check the detection of an ADDR1 address match.
static void LPI2C_HAL_SlaveClearRepeatedStartEvent(LPI2C_Type *baseAddr)
Clear the repeated START detect flag.
static bool LPI2C_HAL_SlaveGetFilterEnable(const LPI2C_Type *baseAddr)
Check if the slave filter is enabled or disabled.
static void LPI2C_HAL_MasterSetSDAGlitchFilter(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the LPI2C SDA glitch filter.
static void LPI2C_HAL_SlaveSetEnable(LPI2C_Type *baseAddr, bool enable)
Enable or disable the LPI2C slave.
static bool LPI2C_HAL_MasterGetNACKDetectEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an unexpected NACK event.
#define LPI2C_MFCR_RXWATER(x)
#define LPI2C_MDMR_MATCH1(x)
static bool LPI2C_HAL_SlaveGetEnable(const LPI2C_Type *baseAddr)
Return the enable/disable setting for the LPI2C slave.
#define LPI2C_SSR_RSF_SHIFT
static void LPI2C_HAL_GetVersion(const LPI2C_Type *baseAddr, lpi2c_version_info_t *versionInfo)
Get the version of the LPI2C module.
static bool LPI2C_HAL_MasterGetRxDMA(const LPI2C_Type *baseAddr)
Check if receive data DMA requests are enabled.
#define LPI2C_MCFGR1_PINCFG_MASK
#define LPI2C_MSR_BBF_MASK
#define LPI2C_MCFGR2_FILTSDA_SHIFT
#define LPI2C_MSR_FEF_MASK
#define LPI2C_MCFGR2_BUSIDLE_MASK
static bool LPI2C_HAL_MasterGetTxDMA(const LPI2C_Type *baseAddr)
Check if transmit data DMA requests are enabled.
#define LPI2C_MDMR_MATCH1_MASK
#define LPI2C_SCR_SEN_SHIFT
#define LPI2C_SDER_AVDE_MASK
static void LPI2C_HAL_MasterSetRxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable receive data DMA requests.
#define LPI2C_MCFGR1_TIMECFG_MASK
#define LPI2C_STAR_TXNACK_MASK
#define LPI2C_SASR_ANV_SHIFT
static uint8_t LPI2C_HAL_MasterGetMatch0(const LPI2C_Type *baseAddr)
Return the MATCH0 value for the data match feature.
#define LPI2C_SCFGR1_TXCFG(x)
#define LPI2C_MSR_EPF_SHIFT
#define LPI2C_SSR_TAF_MASK
#define LPI2C_MDMR_MATCH0(x)
#define LPI2C_SDER_TDDE_SHIFT
lpi2c_slave_rxdata_config_t
Slave receive data register function configuration Implements : lpi2c_slave_rxdata_config_t_Class.
#define LPI2C_MCCR1_SETHOLD_SHIFT
#define LPI2C_MFCR_TXWATER_MASK
#define LPI2C_MDMR_MATCH0_MASK
static lpi2c_slave_txflag_config_t LPI2C_HAL_SlaveGetTxFlagConfig(const LPI2C_Type *baseAddr)
Return the configured settings for the transmit data flag.
#define LPI2C_MCFGR0_RDMO(x)
static void LPI2C_HAL_MasterSetSCLGlitchFilter(LPI2C_Type *baseAddr, uint8_t cycles)
Configure the LPI2C SCL glitch filter.
#define LPI2C_MCCR1_CLKHI(x)
static uint8_t LPI2C_HAL_MasterGetRxFIFOCount(const LPI2C_Type *baseAddr)
Return the number of words in the receive FIFO.
#define LPI2C_SSR_GCF_MASK
static bool LPI2C_HAL_SlaveGetAddressMatch0Event(const LPI2C_Type *baseAddr)
Check the detection of an ADDR0 address match.
#define LPI2C_MSR_BBF_SHIFT
#define LPI2C_SCFGR2_DATAVD_MASK
static void LPI2C_HAL_MasterSetMatch0(LPI2C_Type *baseAddr, uint8_t value)
Set the MATCH0 value for the data match feature.
static void LPI2C_HAL_SlaveTransmitData(LPI2C_Type *baseAddr, uint8_t data)
Provide data for the LPI2C slave transmitter.
static bool LPI2C_HAL_SlaveGetRepeatedStartEvent(const LPI2C_Type *baseAddr)
Check the detection of a repeated START condition.
static bool LPI2C_HAL_SlaveGetSlaveBusyEvent(const LPI2C_Type *baseAddr)
Check the busy state of the slave.
static uint8_t LPI2C_HAL_SlaveGetDataValidDelay(const LPI2C_Type *baseAddr)
Return the SDA data valid delay time configuration.
lpi2c_slave_addr_config_t
Slave address configuration Implements : lpi2c_slave_addr_config_t_Class.
static void LPI2C_HAL_MasterSetClockLowPeriodHS(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock low period in high-speed mode.
#define LPI2C_SSR_SARF_MASK
#define LPI2C_SSR_TAF_SHIFT
#define LPI2C_MCFGR0_HRPOL_MASK