118 #define FTM0_IDX (0U)
120 #define FTM1_IDX (1U)
122 #define FTM2_IDX (2U)
124 #define FTM3_IDX (3U)
130 #define FTM_RMW_SC(base, mask, value) (((base)->SC) = ((((base)->SC) & ~(mask)) | (value)))
135 #define FTM_RMW_CNT(base, mask, value) (((base)->CNT) = ((((base)->CNT) & ~(mask)) | (value)))
140 #define FTM_RMW_MOD(base, mask, value) (((base)->MOD) = ((((base)->MOD) & ~(mask)) | (value)))
145 #define FTM_RMW_CNTIN(base, mask, value) (((base)->CNTIN) = ((((base)->CNTIN) & ~(mask)) | (value)))
150 #define FTM_RMW_STATUS(base, mask, value) (((base)->STATUS) = ((((base)->STATUS) & ~(mask)) | (value)))
155 #define FTM_RMW_MODE(base, mask, value) (((base)->MODE) = ((((base)->MODE) & ~(mask)) | (value)))
160 #define FTM_RMW_CnSCV_REG(base, channel, mask, value) (((base)->CONTROLS[channel].CnSC) = ((((base)->CONTROLS[channel].CnSC) & ~(mask)) | (value)))
165 #define FTM_RMW_DEADTIME(base, mask, value) (((base)->DEADTIME) = ((((base)->DEADTIME) & ~(mask)) | (value)))
169 #define FTM_RMW_EXTTRIG_REG(base, mask, value) (((base)->EXTTRIG) = ((((base)->EXTTRIG) & ~(mask)) | (value)))
174 #define FTM_RMW_FLTCTRL(base, mask, value) (((base)->FLTCTRL) = ((((base)->FLTCTRL) & ~(mask)) | (value)))
179 #define FTM_RMW_FMS(base, mask, value) (((base)->FMS) = ((((base)->FMS) & ~(mask)) | (value)))
184 #define FTM_RMW_CONF(base, mask, value) (((base)->CONF) = ((((base)->CONF) & ~(mask)) | (value)))
189 #define FTM_RMW_POL(base, mask, value) (((base)->POL) = ((((base)->POL) & ~(mask)) | (value)))
194 #define FTM_RMW_FILTER(base, mask, value) (((base)->FILTER) = ((((base)->FILTER) & ~(mask)) | (value)))
199 #define FTM_RMW_SYNC(base, mask, value) (((base)->SYNC) = ((((base)->SYNC) & ~(mask)) | (value)))
204 #define FTM_RMW_QDCTRL(base, mask, value) (((base)->QDCTRL) = ((((base)->QDCTRL) & ~(mask)) | (value)))
209 #define FTM_RMW_PAIR0DEADTIME(base, mask, value) (((base)->PAIR0DEADTIME) = ((((base)->PAIR0DEADTIME) & ~(mask)) | (value)))
214 #define FTM_RMW_PAIR1DEADTIME(base, mask, value) (((base)->PAIR1DEADTIME) = ((((base)->PAIR1DEADTIME) & ~(mask)) | (value)))
219 #define FTM_RMW_PAIR2DEADTIME(base, mask, value) (((base)->PAIR2DEADTIME) = ((((base)->PAIR2DEADTIME) & ~(mask)) | (value)))
224 #define FTM_RMW_PAIR3DEADTIME(base, mask, value) (((base)->PAIR3DEADTIME) = ((((base)->PAIR3DEADTIME) & ~(mask)) | (value)))
227 #define CHAN0_IDX (0U)
229 #define CHAN1_IDX (1U)
231 #define CHAN2_IDX (2U)
233 #define CHAN3_IDX (3U)
235 #define CHAN4_IDX (4U)
237 #define CHAN5_IDX (5U)
239 #define CHAN6_IDX (6U)
241 #define CHAN7_IDX (7U)
404 #if defined(__cplusplus)
419 ((ftmBase)->HCR) = value;
431 uint8_t filterPrescale)
570 uint32_t regValue = ((ftmBase)->SC);
572 ((ftmBase)->SC) = (regValue);
827 ((ftmBase)->CONTROLS[channel].CnSC) = 0U;
1141 ((ftmBase)->CONTROLS[channel].CnV) = value;
1159 return (uint16_t)((ftmBase)->CONTROLS[channel].CnV);
1179 return (((ftmBase)->STATUS) & (1UL << channel)) != 0U;
1193 return ((ftmBase)->STATUS) & (0xFFU);
1209 ((ftmBase)->STATUS) &= (~(1UL << channel));
1229 ((ftmBase)->OUTMASK) = regVal;
1251 ((ftmBase)->OUTMASK) |= (1UL << channel);
1255 ((ftmBase)->OUTMASK) &= ~(1UL << channel);
1278 ((ftmBase)->OUTINIT) |= (1UL << channel);
1282 ((ftmBase)->OUTINIT) &= ~(1UL << channel);
1305 ((ftmBase)->POL) &= ~(1UL << channel);
1309 ((ftmBase)->POL) |= (1UL << channel);
1332 ((ftmBase)->FLTPOL) &= ~(1UL << fltChannel);
1336 ((ftmBase)->FLTPOL) |= (1UL << fltChannel);
1551 uint8_t trigger_num,
1643 uint8_t chnlPairNum,
1670 uint8_t chnlPairNum,
1697 uint8_t chnlPairNum,
1724 uint8_t chnlPairNum,
1751 uint8_t chnlPairNum,
1778 uint8_t chnlPairNum,
1806 uint8_t chnlPairNum)
1825 uint8_t chnlPairNum,
1852 uint8_t chnlPairNum,
1880 uint8_t chnlPairNum)
1900 uint8_t chnlPairNum)
2088 ((ftmBase)->FMS) &= (~(1UL << channel));
2295 ((ftmBase)->FLTCTRL) = 0U;
2317 ((ftmBase)->FLTCTRL) |= (1UL << inputNum);
2321 ((ftmBase)->FLTCTRL) &= ~(1UL << inputNum);
2360 uint8_t chnlPairNum,
2367 ((ftmBase)->INVCTRL) |= (1UL << chnlPairNum);
2371 ((ftmBase)->INVCTRL) &= ~(1UL << chnlPairNum);
2388 ((ftmBase)->INVCTRL) = regVal;
2410 ((ftmBase)->SWOCTRL) |= (1UL << channel);
2414 ((ftmBase)->SWOCTRL) &= ~(1UL << channel);
2429 uint8_t channelsMask)
2434 ((ftmBase)->SWOCTRL) = (((ftmBase)->SWOCTRL) & (~(mask))) | channelsMask;
2473 uint8_t channelsValues)
2478 ((ftmBase)->SWOCTRL) = (((ftmBase)->SWOCTRL) & (~(mask))) | ((uint32_t)channelsValues <<
FTM_SWOCTRL_CH0OCV_SHIFT);
2584 ((ftmBase)->PWMLOAD) |= (1UL << channel);
2588 ((ftmBase)->PWMLOAD) &= ~(1UL << channel);
2932 uint8_t channelPair,
2938 switch (channelPair)
2971 uint8_t channelPair,
2976 switch (channelPair)
3010 uint8_t channelPair,
3016 switch (channelPair)
3078 #if defined(__cplusplus)
static void FTM_HAL_SetGlobalTimeBaseOutputCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM global time base signal generation to other FTM's.
static bool FTM_HAL_IsFtmEnable(const FTM_Type *ftmBase)
Get status of the FTMEN bit in the FTM_MODE register.
#define FTM_QDCTRL_QUADEN_SHIFT
static void FTM_HAL_SetInitTriggerCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the generation of the trigger when the FTM counter is equal to the CNTIN register...
#define FTM_QDCTRL_TOFDIR_MASK
#define FTM_QDCTRL_QUADMODE_MASK
#define FTM_FMS_FAULTF0_MASK
static void FTM_HAL_SetDualChnPwmSyncCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disables the FTM peripheral timer channel pair counter PWM sync.
#define FTM_SYNCONF_HWINVC_MASK
#define FTM_SC_CLKS_SHIFT
#define FTM_CNTIN_INIT(x)
static void FTM_HAL_SetSwoctrlPwmSyncModeCmd(FTM_Type *const ftmBase, ftm_reg_update_t mode)
Sets the SWOCTRL register PWM synchronization mode.
static void FTM_HAL_ClearChnTriggerFlag(FTM_Type *const ftmBase)
Clear the channel trigger flag.
ftm_fault_mode_t
FlexTimer fault control.
static void FTM_HAL_SetExtDeadtimeValue(FTM_Type *const ftmBase, uint8_t value)
Sets the FTM extended dead-time value.
static void FTM_HAL_SetClockFilterPs(FTM_Type *const ftmBase, uint8_t filterPrescale)
Sets the filter Pre-scaler divider.
#define FTM_CONF_GTBEOUT_MASK
#define FTM_SWOCTRL_CH1OC_MASK
#define FTM_SYNCONF_HWTRIGMODE(x)
#define FTM_SYNCONF_HWOM(x)
static void FTM_HAL_SetQuadDecoderCmd(FTM_Type *const ftmBase, bool enable)
Enables the channel quadrature decoder.
#define FTM_SYNCONF_CNTINC_MASK
#define FTM_SC_TOIE_SHIFT
static void FTM_HAL_SetChnSoftwareCtrlVal(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Sets the channel software output control value.
static void FTM_HAL_SetChnOutputPolarityCmd(FTM_Type *const ftmBase, uint8_t channel, ftm_polarity_t polarity)
Sets the FTM peripheral timer channel output polarity.
static void FTM_HAL_DisableChnInt(FTM_Type *const ftmBase, uint8_t channel)
Disables the FTM peripheral timer channel(n) interrupt.
#define FTM_PWMLOAD_GLEN_SHIFT
static bool FTM_HAL_GetDetectedFaultInput(const FTM_Type *ftmBase)
Gets the FTM detected fault input.
static bool FTM_HAL_IsOverflowIntEnabled(const FTM_Type *ftmBase)
Reads the bit that controls enabling the FTM timer overflow interrupt.
ftm_polarity_t
FlexTimer PWM output pulse mode, high-true or low-true on match up.
#define FTM_RMW_SC(base, mask, value)
FTM_SC - Read and modify and write to Status And Control (RW)
#define FTM_CnSC_ELSB_SHIFT
static void FTM_HAL_SetDualChnMofCombineCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables the FTM peripheral timer channel modified combine mode.
#define FTM_FMS_FAULTF_MASK
#define FTM_PAIR3DEADTIME_DTVALEX_MASK
static void FTM_HAL_SetQuadPhaseAFilterCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the phase A input filter.
#define FTM_PWMLOAD_HCSEL_SHIFT
#define FTM_SYNCONF_SWINVC_MASK
#define FTM_COMBINE_COMBINE0_MASK
#define FTM_FMS_FAULTF1_MASK
static void FTM_HAL_SetOutmaskPwmSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Determines when the OUTMASK register is updated with the value of its buffer.
#define FTM_SYNCONF_SWINVC(x)
static void FTM_HAL_SetChnSoftwareCtrlCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the channel software output control.
#define FTM_SYNCONF_HWOM_MASK
#define FTM_COMBINE_FAULTEN0_MASK
static void FTM_HAL_SetPairDeadtimeCount(FTM_Type *const ftmBase, uint8_t channelPair, uint8_t count)
Sets the FTM dead-time value for the channel pair.
#define FTM_CONF_BDMMODE(x)
static void FTM_HAL_EnablePwmChannelOutputs(FTM_Type *const ftmBase, uint8_t channel)
Enable PWM channel Outputs.
void FTM_HAL_SetChnTriggerCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the generation of the FTM peripheral timer channel trigger when the FTM counter i...
#define FTM_SWOCTRL_CH0OCV_MASK
static void FTM_HAL_SetDualChnFaultCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables the FTM peripheral timer channel pair fault control.
#define FTM_SYNCONF_INVC_MASK
#define FTM_RMW_FLTCTRL(base, mask, value)
FTM_FLTCTRL - Read and modify and write Fault Control (RW)
#define FTM_RMW_CNT(base, mask, value)
FTM_CNT - Read and modify and write to Counter (RW)
static void FTM_HAL_SetPwmSyncMode(FTM_Type *const ftmBase, bool enable)
Sets the FTM peripheral timer sync mode.
#define FTM_MODE_FAULTM_MASK
static bool FTM_HAL_GetTriggerControled(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the trigger mode is enabled.
static void FTM_HAL_SetBdmMode(FTM_Type *const ftmBase, ftm_bdm_mode_t val)
Sets the BDM mode.
static void FTM_HAL_SetSwoctrlHardwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets the sync mode for the FTM SWOCTRL register when using a hardware trigger.
#define FTM_PAIR1DEADTIME_DTPS_MASK
static void FTM_HAL_SetChnEdgeLevel(FTM_Type *const ftmBase, uint8_t channel, uint8_t level)
Sets the FTM peripheral timer channel edge level.
#define FTM_COMBINE_SYNCEN0_MASK
#define FTM_RMW_CONF(base, mask, value)
FTM_CONF - Read and modify and write Configuration (RW)
#define FTM_DEADTIME_DTVALEX(x)
#define FTM_SC_FLTPS_MASK
static void FTM_HAL_Enable(FTM_Type *const ftmBase, bool enable)
Enables the FTM peripheral timer group.
#define FTM_SWOCTRL_CH0OCV_SHIFT
static void FTM_HAL_ClearFaultFlagDetected(FTM_Type *const ftmBase, uint8_t channel)
Clear a fault condition is detected at the fault input.
static uint32_t FTM_HAL_GetEventStatus(const FTM_Type *ftmBase)
Gets the FTM peripheral timer status info for all channels.
#define FTM_FMS_FAULTF3(x)
static void FTM_HAL_SetChnCountVal(FTM_Type *const ftmBase, uint8_t channel, uint16_t value)
Sets the FTM peripheral timer channel counter value.
static bool FTM_HAL_GetChInputState(const FTM_Type *ftmBase, uint8_t channel)
Get the state of channel input.
#define FTM_SWOCTRL_CH3OC_MASK
#define FTM_CONF_BDMMODE_MASK
static uint8_t FTM_HAL_GetChnEdgeLevel(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel edge level.
#define FTM_PAIR3DEADTIME_DTVAL(x)
#define FTM_EXTTRIG_INITTRIGEN(x)
static void FTM_HAL_SetChnOutputInitStateCmd(FTM_Type *const ftmBase, uint8_t channel, bool state)
Sets the FTM peripheral timer channel output initial state 0 or 1.
static void FTM_HAL_SetInvctrlReg(FTM_Type *const ftmBase, uint32_t regVal)
Writes the provided value to the Inverting control register.
static bool FTM_HAL_GetReloadFlag(const FTM_Type *ftmBase)
Get the state whether the FTM counter reached a reload point.
static void FTM_HAL_SetSwoctrlSoftwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM SWOCTRL register when using a software trigger.
static void FTM_HAL_ClearChSC(FTM_Type *const ftmBase, uint8_t channel)
Clears the content of Channel (n) Status And Control.
#define FTM_SYNCONF_HWSOC(x)
#define FTM_CONF_GTBEEN_MASK
static bool FTM_HAL_GetQuadTimerOverflowDir(const FTM_Type *ftmBase)
Gets the Timer overflow direction in quadrature mode.
#define FTM_PAIR3DEADTIME_DTPS_MASK
#define FTM_QDCTRL_PHAPOL(x)
#define FTM_SYNCONF_HWRSTCNT_MASK
#define FTM_SWOCTRL_CH4OCV_MASK
static void FTM_HAL_SetWriteProtectionCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM write protection.
static bool FTM_HAL_IsChnIcrst(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the FTM FTM counter is reset.
#define FTM_CnSC_TRIGMODE(x)
#define FTM_SWOCTRL_CH2OC_MASK
static bool FTM_HAL_IsChnTriggerGenerated(const FTM_Type *ftmBase)
Checks whether any channel trigger event has occurred.
#define FTM_SWOCTRL_CH5OC_MASK
#define FTM_SWOCTRL_CH3OCV_MASK
static void FTM_HAL_SetQuadPhaseBFilterCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the phase B input filter.
ftm_reg_update_t
FTM sync source.
#define FTM_CONF_GTBEOUT(x)
static bool FTM_HAL_GetCpwms(const FTM_Type *ftmBase)
Gets the FTM count direction bit.
#define FTM_CNTIN_INIT_MASK
#define FTM_PAIR2DEADTIME_DTVALEX_MASK
#define FTM_SYNC_SYNCHOM_MASK
#define FTM_CNTIN_INIT_SHIFT
#define FTM_SYNCONF_SWSOC(x)
#define FTM_MODE_FAULTIE_MASK
#define FTM_DEADTIME_DTPS_MASK
ftm_quad_phase_polarity_t
FlexTimer quadrature phase polarities, normal or inverted polarity.
static uint8_t FTM_HAL_GetClockFilterPs(const FTM_Type *ftmBase)
Reads the FTM filter clock divider.
#define FTM_MODE_PWMSYNC(x)
static void FTM_HAL_SetTimerOverflowInt(FTM_Type *const ftmBase, bool state)
Enables the FTM peripheral timer overflow interrupt.
#define FTM_RMW_PAIR3DEADTIME(base, mask, value)
FTM_PAIR3DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 3 (RW) ...
#define FTM_COMBINE_MCOMBINE0_MASK
static bool FTM_HAL_IsFaultFlagDetected(const FTM_Type *ftmBase, uint8_t channel)
Checks whether a fault condition is detected at the fault input.
static void FTM_HAL_DisablePwmChannelOutputs(FTM_Type *const ftmBase, uint8_t channel)
Disable PWM channel Outputs.
#define FTM_MODE_INIT_MASK
#define FTM_MODE_FAULTIE(x)
#define FTM_COMBINE_DTEN0_MASK
static void FTM_HAL_ClearChnEventStatus(FTM_Type *const ftmBase, uint8_t channel)
Clears the FTM peripheral timer all channel event status.
static bool FTM_HAL_HasTimerOverflowed(const FTM_Type *ftmBase)
Returns the FTM peripheral timer overflow interrupt flag.
#define FTM_RMW_QDCTRL(base, mask, value)
QDCTRL - Read and modify and write Quadrature Decoder Control And Status (RW)
static void FTM_HAL_SetFaultInputFilterCmd(FTM_Type *const ftmBase, uint8_t inputNum, bool enable)
Enables or disables the fault input filter.
static void FTM_HAL_SetTrigModeControlCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the trigger generation on FTM channel outputs.
#define FTM_MODE_PWMSYNC_MASK
#define FTM_SYNCONF_SWRSTCNT(x)
#define FTM_DEADTIME_DTVAL_MASK
static void FTM_HAL_SetFaultInt(FTM_Type *const ftmBase, bool state)
Enables/disables the FTM peripheral timer fault interrupt.
#define FTM_COMBINE_COMP0_MASK
static bool FTM_HAL_IsFaultInputEnabled(const FTM_Type *ftmBase)
Checks whether the logic OR of the fault inputs is enabled.
#define FTM_PAIR1DEADTIME_DTVAL(x)
static bool FTM_HAL_GetQuadDir(const FTM_Type *ftmBase)
Gets the FTM counter direction in quadrature mode.
#define FTM_PWMLOAD_GLDOK_SHIFT
static void FTM_HAL_ClearReloadFlag(FTM_Type *const ftmBase)
Clears the reload flag bit.
#define FTM_SYNCONF_HWTRIGMODE_MASK
static void FTM_HAL_SetHalfCycleValue(FTM_Type *const ftmBase, uint16_t value)
Sets the value for the half cycle reload register.
#define FTM_FMS_WPEN_MASK
#define FTM_PAIR1DEADTIME_DTPS(x)
#define FTM_SYNCONF_INVC(x)
#define FTM_SYNCONF_HWWRBUF(x)
#define FTM_PAIR1DEADTIME_DTVAL_MASK
#define FTM_CnSC_MSB_SHIFT
#define FTM_PAIR2DEADTIME_DTPS(x)
#define FTM_QDCTRL_QUADIR_MASK
static uint8_t FTM_HAL_GetChnMode(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel mode.
#define FTM_CnSC_ELSA_MASK
ftm_deadtime_ps_t
FlexTimer pre-scaler factor for the dead-time insertion.
#define FTM_QDCTRL_QUADMODE(x)
#define FTM_MODE_FAULTIE_SHIFT
static void FTM_HAL_SetDualChnDeadtimeCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disabled the FTM peripheral timer channel pair deadtime insertion.
static uint16_t FTM_HAL_GetCounterInitVal(const FTM_Type *ftmBase)
Returns the FTM peripheral counter initial value.
#define FTM_SYNC_CNTMIN_MASK
#define FTM_SYNC_CNTMAX(x)
static bool FTM_HAL_IsChnIntEnabled(const FTM_Type *ftmBase, uint8_t channel)
Get FTM channel(n) interrupt enabled or not.
static bool FTM_HAL_IsFaultIntEnabled(const FTM_Type *ftmBase)
Return true/false whether the Fault interrupt was enabled or not.
static void FTM_HAL_SetModCntinCvHardwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM MOD, CNTIN and CV registers when using a hardware trigger. ...
#define FTM_MODE_WPDIS(x)
#define FTM_RMW_PAIR1DEADTIME(base, mask, value)
FTM_PAIR1DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 1 (RW) ...
#define FTM_FMS_FAULTF0(x)
#define FTM_RMW_MOD(base, mask, value)
FTM_MOD - Read and modify and write Modulo (RW)
static void FTM_HAL_SetFaultInputFilterVal(FTM_Type *const ftmBase, uint32_t value)
Sets the fault input filter value.
#define FTM_EXTTRIG_TRIGF_MASK
#define FTM_PAIR0DEADTIME_DTVALEX_MASK
#define FTM_SYNC_SYNCHOM(x)
static void FTM_HAL_ClearFaultsIsr(FTM_Type *const ftmBase)
Clears all fault interrupt flags that are active.
#define FTM_COMBINE_DECAP0_MASK
#define FTM_CnSC_CHF_MASK
#define FTM_RMW_FMS(base, mask, value)
FTM_FMS - Read and modify and write Fault Mode Status (RW)
#define CHAN1_IDX
Channel number for CHAN2.
#define FTM_QDCTRL_PHBFLTREN_SHIFT
static void FTM_HAL_SetDualChnDecapCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disables the FTM peripheral timer channel dual edge capture.
#define FTM_FEATURE_OUTPUT_CHANNEL_OFFSET
#define FTM_MODE_WPDIS_MASK
static void FTM_HAL_SetChnDmaCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the FTM peripheral timer channel DMA.
#define FTM_DEADTIME_DTPS(x)
#define FEATURE_FTM_CHANNEL_COUNT
static void FTM_HAL_SetChnOutputMask(FTM_Type *const ftmBase, uint8_t channel, bool mask)
Sets the FTM peripheral timer channel output mask.
static void FTM_HAL_SetGlobalLoadCmd(FTM_Type *const ftmBase)
Set the global load mechanism.
#define FTM_MOD_MOD_SHIFT
static void FTM_HAL_SetInvctrlHardwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM INVCTRL register when using a hardware trigger.
#define FTM_CnSC_CHIE_MASK
static bool FTM_HAL_GetChOutputValue(const FTM_Type *ftmBase, uint8_t channel)
Get the value of channel output.
#define FTM_QDCTRL_PHAFLTREN_SHIFT
static void FTM_HAL_SetAllChnSoftwareCtrlCmd(FTM_Type *const ftmBase, uint8_t channelsMask)
Enables or disables the channel software output control.The main difference between this function and...
#define FTM_SC_CPWMS_MASK
static void FTM_HAL_DisableFaultInt(FTM_Type *const ftmBase)
Disables the FTM peripheral timer fault interrupt.
#define FTM_SYNCONF_SWWRBUF_MASK
#define FTM_CnSC_ELSB_MASK
#define FTM_SWOCTRL_CH2OCV_MASK
struct FTM_Type::@12 CONTROLS[FTM_CONTROLS_COUNT]
#define FTM_QDCTRL_PHBPOL_MASK
static void FTM_HAL_EnableChnInt(FTM_Type *const ftmBase, uint8_t channel)
Enables the FTM peripheral timer channel(n) interrupt.
#define FTM_SWOCTRL_CH1OCV_MASK
void FTM_HAL_SetChnInputCaptureFilter(FTM_Type *const ftmBase, uint8_t channel, uint8_t value)
Sets the FTM peripheral timer channel input capture filter value.
static void FTM_HAL_SetLoadCmd(FTM_Type *const ftmBase, bool enable)
Enable the global load.
#define FTM_MODE_CAPTEST_MASK
static void FTM_HAL_SetDualChnCombineCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disables the FTM peripheral timer channel pair output combine mode.
#define FTM_SWOCTRL_CH6OC_MASK
static void FTM_HAL_SetInitTrigOnReloadCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM initialization trigger on Reload Point.
static void FTM_HAL_SetCntinPwmSyncModeCmd(FTM_Type *const ftmBase, ftm_reg_update_t mode)
Sets the CNTIN register PWM synchronization mode.
static void FTM_HAL_SetGlobalTimeBaseCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM timer global time base.
#define CHAN4_IDX
Channel number for CHAN5.
static bool FTM_HAL_IsChnDma(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the FTM peripheral timer channel DMA is enabled.
#define FTM_FLTCTRL_FFLTR0EN_SHIFT
ftm_second_channel_polarity_t
FlexTimer PWM channel (n+1) polarity for combine mode.
static void FTM_HAL_SetPairDeadtimePrescale(FTM_Type *const ftmBase, uint8_t channelPair, ftm_deadtime_ps_t divider)
Sets the FTM dead time divider for the channel pair.
#define CHAN3_IDX
Channel number for CHAN4.
#define FTM_SYNC_TRIG0_MASK
#define FTM_FEATURE_COMBINE_CHAN_CTRL_WIDTH
static void FTM_HAL_SetPwmLoadCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the loading of MOD, CNTIN and CV with values of their write buffer.
static uint16_t FTM_HAL_GetMod(const FTM_Type *ftmBase)
Returns the FTM peripheral counter modulo value.
static void FTM_HAL_SetMinLoadingCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM peripheral timer minimum loading points.
static void FTM_HAL_SetCpwms(FTM_Type *const ftmBase, bool mode)
Sets the FTM count direction bit.
static void FTM_HAL_ClearChnEventFlag(FTM_Type *const ftmBase, uint8_t channel)
Clear the channel flag by writing a 0 to the CHF bit.
#define FTM_PAIR0DEADTIME_DTVAL_MASK
#define FTM_CONF_ITRIGR_MASK
#define FTM_SWOCTRL_CH6OCV_MASK
#define FTM_SWOCTRL_CH4OC_MASK
#define FTM_PAIR3DEADTIME_DTVAL_MASK
static void FTM_HAL_SetExtPairDeadtimeValue(FTM_Type *const ftmBase, uint8_t channelPair, uint8_t value)
Sets the FTM extended dead-time value for the channel pair.
#define FTM_CnSC_ELSA_SHIFT
#define FTM_PAIR0DEADTIME_DTPS_MASK
#define FTM_PAIR3DEADTIME_DTPS(x)
static void FTM_HAL_SetCaptureTestCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM peripheral timer capture test mode.
ftm_quad_decode_mode_t
FlexTimer quadrature decode modes, phase encode or count and direction mode.
#define FTM_RMW_CnSCV_REG(base, channel, mask, value)
FTM_CnSCV - Read and modify and write Channel (n) Status And Control (RW)
#define FTM_RMW_SYNC(base, mask, value)
SYNC - Read and modify and write Synchronization (RW)
static void FTM_HAL_SetDeadtimePrescale(FTM_Type *const ftmBase, ftm_deadtime_ps_t divider)
Sets the FTM dead time divider.
ftm_pwm_sync_mode_t
FTM update register.
#define FTM_FEATURE_FAULT_CHANNELS
static void FTM_HAL_SetHardwareSyncTriggerSrc(FTM_Type *const ftmBase, uint8_t trigger_num, bool enable)
Sets the FTM hardware synchronization trigger.
static void FTM_HAL_SetReIntEnabledCmd(FTM_Type *const ftmBase, bool enable)
Set the FTM reload interrupt enable.
#define FTM_SYNC_CNTMAX_MASK
static void FTM_HAL_SetCounterSoftwareSyncModeCmd(FTM_Type *const ftmBase, ftm_pwm_sync_mode_t update_mode)
Sets sync mode for FTM counter register when using a software trigger.
#define FTM_SYNCONF_SWOM(x)
#define FTM_PAIR1DEADTIME_DTVALEX(x)
static void FTM_HAL_SetPwmLoadChnSelCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Includes or excludes the channel in the matching process.
static void FTM_HAL_SetPwmFaultBehavior(FTM_Type *const ftmBase, bool enable)
Configures the behavior of the PWM outputs when a fault is detected.
static void FTM_HAL_SetInvctrlPwmSyncModeCmd(FTM_Type *const ftmBase, ftm_reg_update_t mode)
Sets the INVCTRL register PWM synchronization mode.
static void FTM_HAL_ClearTimerOverflow(FTM_Type *const ftmBase)
Clears the timer overflow interrupt flag.
#define FTM_QDCTRL_PHBPOL(x)
static bool FTM_HAL_GetDualChnCombineCmd(const FTM_Type *ftmBase, uint8_t chnlPairNum)
Verify if an channels pair is used in combine mode or not.
static void FTM_HAL_SetCountReinitSyncCmd(FTM_Type *const ftmBase, bool enable)
Determines if the FTM counter is re-initialized when the selected trigger for synchronization is dete...
#define FTM_SYNCONF_SWOC_MASK
#define FTM_SYNC_SWSYNC(x)
#define FTM_MODE_CAPTEST(x)
#define FTM_EXTTRIG_INITTRIGEN_MASK
ftm_bdm_mode_t
Options for the FlexTimer behavior in BDM Mode.
static void FTM_HAL_SetClockPs(FTM_Type *const ftmBase, ftm_clock_ps_t ps)
Sets the FTM clock divider.
#define FTM_SYNCONF_SYNCMODE_MASK
static void FTM_HAL_ClearFaultControl(FTM_Type *const ftmBase)
Clears the entire content value of the Fault control register.
#define FTM_PAIR3DEADTIME_DTVALEX(x)
#define FTM_CnSC_CHOV_MASK
#define FTM_SYNCONF_HWSOC_MASK
#define FTM_SYNCONF_SWOM_MASK
#define FTM_CnSC_MSA_SHIFT
void FTM_HAL_Init(FTM_Type *const ftmBase, ftm_clock_ps_t ftmClockPrescaler)
Initializes the FTM. This function will enable the flexTimer module and selects one pre-scale factor ...
static void FTM_HAL_SetFaultInputCmd(FTM_Type *const ftmBase, uint8_t inputNum, bool enable)
Enables or disables the fault input.
#define FTM_FMS_FAULTF2(x)
#define FTM_COMBINE_DECAPEN0_MASK
static bool FTM_HAL_GetDualEdgeCaptureBit(const FTM_Type *ftmBase, uint8_t chnlPairNum)
Enables the FTM peripheral timer dual edge capture mode.
#define FTM_SYNCONF_CNTINC(x)
#define FTM_SC_CPWMS_SHIFT
static void FTM_HAL_SetOutmaskReg(FTM_Type *const ftmBase, uint32_t regVal)
Writes the provided value to the OUTMASK register.
static void FTM_HAL_SetFaultControlMode(FTM_Type *const ftmBase, ftm_fault_mode_t mode)
Defines the FTM fault control mode.
static void FTM_HAL_SetDualChnInvertCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disables the channel invert for a channel pair.
#define FTM_SYNC_REINIT_MASK
#define FTM_SYNCONF_SWSOC_MASK
static void FTM_HAL_SetModCntinCvSoftwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM MOD, CNTIN and CV registers when using a software trigger. ...
static void FTM_HAL_SetLoadFreq(FTM_Type *const ftmBase, uint8_t val)
Sets the FTM timer TOF Frequency.
static void FTM_HAL_SetInvctrlSoftwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM INVCTRL register when using a software trigger.
#define FTM_FMS_FAULTF3_MASK
static void FTM_HAL_SetSoftwareTriggerCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM peripheral timer software trigger.
#define FTM_SYNC_CNTMIN(x)
#define FTM_FMS_FAULTF1(x)
#define FTM_CnSC_CHIS_MASK
#define FTM_PAIR0DEADTIME_DTPS(x)
#define FTM_CONF_GTBEEN(x)
static void FTM_HAL_SetMod(FTM_Type *const ftmBase, uint16_t value)
Sets the FTM peripheral timer modulo value.
#define FTM_SYNCONF_SWRSTCNT_MASK
#define FTM_CnSC_TRIGMODE_MASK
#define FTM_CONF_ITRIGR(x)
static void FTM_HAL_SetDualChnCompCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, ftm_second_channel_polarity_t polarity)
Enables or disables the FTM peripheral timer channel pair output complement mode. ...
static void FTM_HAL_SetCounterInitVal(FTM_Type *const ftmBase, uint16_t value)
Sets the FTM peripheral timer counter initial value.
static void FTM_HAL_SetCounterHardwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM counter register when using a hardware trigger.
static void FTM_HAL_SetChnMSnBAMode(FTM_Type *const ftmBase, uint8_t channel, uint8_t selection)
Sets the FTM peripheral timer channel mode.
static void FTM_HAL_SetOutmaskSoftwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM OUTMASK register when using a software trigger.
#define FTM_CONF_LDFQ_MASK
#define FTM_DEADTIME_DTVALEX_MASK
#define FTM_RMW_PAIR2DEADTIME(base, mask, value)
FTM_PAIR2DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 2 (RW) ...
static void FTM_HAL_SetQuadMode(FTM_Type *const ftmBase, ftm_quad_decode_mode_t quadMode)
Sets the encoding mode used in quadrature decoding mode.
#define FTM_FLTCTRL_FFVAL(x)
ftm_clock_source_t
FlexTimer clock source selection.
#define FTM_FMS_FAULTIN_MASK
#define FTM_CnSC_ICRST(x)
#define FTM_EXTTRIG_TRIGF(x)
static bool FTM_HAL_GetDualChnMofCombineCmd(const FTM_Type *ftmBase, uint8_t chnlPairNum)
Verify if an channels pair is used in the modified combine mode or not.
#define FTM_PAIR2DEADTIME_DTVAL(x)
#define FTM_SYNC_REINIT(x)
#define FTM_CnSC_ICRST_MASK
#define FTM_PAIR1DEADTIME_DTVALEX_MASK
#define FTM_MODE_FTMEN_SHIFT
static void FTM_HAL_SetChnIcrstCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Configure the feature of FTM counter reset by the selected input capture event.
static void FTM_HAL_SetDeadtimeCount(FTM_Type *const ftmBase, uint8_t count)
Sets the FTM deadtime value.
#define FTM_MODE_FAULTM(x)
static uint8_t FTM_HAL_GetClockSource(const FTM_Type *ftmBase)
Reads the FTM clock source.
static void FTM_HAL_SetChnFaultInputPolarityCmd(FTM_Type *const ftmBase, uint8_t fltChannel, ftm_polarity_t polarity)
Sets the FTM peripheral timer channel fault input polarity.
#define FTM_CnSC_DMA_MASK
#define FTM_SWOCTRL_CH7OCV_MASK
static bool FTM_HAL_GetChnEventStatus(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel event status.
#define FTM_CnSC_MSA_MASK
#define FTM_SWOCTRL_CH5OCV_MASK
static void FTM_HAL_SetOutmaskHardwareSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets sync mode for FTM OUTMASK register when using a hardware trigger.
void FTM_HAL_Reset(FTM_Type *const ftmBase)
Resets the FTM registers. All the register use in the driver should be reset to default value of each...
#define FTM_SYNCONF_SYNCMODE(x)
#define FTM_SYNCONF_HWRSTCNT(x)
#define FTM_PAIR2DEADTIME_DTVALEX(x)
#define FTM_DEADTIME_DTVAL(x)
#define FTM_RMW_EXTTRIG_REG(base, mask, value)
FTM_EXTTRIG - Read and modify and write External Trigger Control (RW)
#define FTM_FLTCTRL_FFVAL_MASK
static bool FTM_HAL_IsWriteProtectionEnabled(const FTM_Type *ftmBase)
Checks whether the write protection is enabled.
static void FTM_HAL_SetHalfCycleCmd(FTM_Type *const ftmBase, bool enable)
Enable the half cycle reload.
#define FTM_PAIR0DEADTIME_DTVAL(x)
#define FTM_RMW_DEADTIME(base, mask, value)
FTM_DEADTIME - Read and modify and write Dead-time Insertion Control (RW)
static void FTM_HAL_SetMaxLoadingCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM peripheral timer maximum loading points.
#define FTM_CNT_COUNT_SHIFT
#define FTM_RMW_PAIR0DEADTIME(base, mask, value)
FTM_PAIR0DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 0 (RW) ...
#define CHAN2_IDX
Channel number for CHAN3.
static void FTM_HAL_SetInitChnOutputCmd(FTM_Type *const ftmBase, bool enable)
Initializes the channels output.
#define FTM_QDCTRL_PHAPOL_MASK
#define FTM_SWOCTRL_CH0OC_MASK
#define FTM_PWMLOAD_LDOK_SHIFT
static void FTM_HAL_SetAllChnSoftwareCtrlVal(FTM_Type *const ftmBase, uint8_t channelsValues)
Sets the channel software output control value.
#define FTM_MODE_FTMEN_MASK
#define FTM_SWOCTRL_CH7OC_MASK
#define FTM_SYNCONF_HWINVC(x)
static void FTM_HAL_SetPwmSyncModeCmd(FTM_Type *const ftmBase, bool mode)
Sets the PWM synchronization mode to enhanced or legacy.
#define FTM_PAIR2DEADTIME_DTPS_MASK
static uint8_t FTM_HAL_GetClockPs(const FTM_Type *ftmBase)
Reads the FTM clock divider.
static uint16_t FTM_HAL_GetChnCountVal(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel counter value.
#define FTM_FLTCTRL_FSTATE_SHIFT
#define FTM_PAIR2DEADTIME_DTVAL_MASK
#define FTM_SYNCONF_HWWRBUF_MASK
static void FTM_HAL_SetHwTriggerSyncModeCmd(FTM_Type *const ftmBase, bool enable)
Sets hardware trigger mode.
#define FTM_RMW_MODE(base, mask, value)
FTM_MODE - Read and modify and write Counter Features Mode Selection (RW)
#define FTM_FMS_FAULTF(x)
#define CHAN0_IDX
Channel number for CHAN1.
static void FTM_HAL_SetQuadPhaseAPolarity(FTM_Type *const ftmBase, ftm_quad_phase_polarity_t mode)
Selects polarity for the quadrature decode phase A input.
#define FTM_CnSC_MSB_MASK
#define FTM_CNT_COUNT_MASK
#define FTM_MODE_FTMEN(x)
static bool FTM_HAL_HasChnEventOccurred(const FTM_Type *ftmBase, uint8_t channel)
Returns whether any event for the FTM peripheral timer channel has occurred.
#define FTM_RMW_CNTIN(base, mask, value)
FTM_CNTIN - Read and modify and write Counter Initial Value (RW)
static void FTM_HAL_SetQuadPhaseBPolarity(FTM_Type *const ftmBase, ftm_quad_phase_polarity_t mode)
Selects polarity for the quadrature decode phase B input.
static void FTM_HAL_SetClockSource(FTM_Type *const ftmBase, ftm_clock_source_t clock)
Sets the FTM clock source.
#define FTM_SC_FLTPS_SHIFT
static uint16_t FTM_HAL_GetCounter(const FTM_Type *ftmBase)
Returns the FTM peripheral current counter value.
#define FTM_SYNC_SWSYNC_MASK
#define FTM_SYNCONF_SWOC(x)
static void FTM_HAL_SetCounter(FTM_Type *const ftmBase, uint16_t value)
Sets the FTM peripheral current counter value.
ftm_clock_ps_t
FlexTimer pre-scaler factor selection for the clock source. In quadrature decoder mode set FTM_CLOCK_...
#define FTM_SYNCONF_SWWRBUF(x)
#define FTM_FMS_FAULTF2_MASK
static void FTM_HAL_SetDualEdgeCaptureCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables the FTM peripheral timer dual edge capture mode.
#define FTM_PAIR0DEADTIME_DTVALEX(x)