S32 SDK

#include <S32K144.h>

Data Fields

__IO uint32_t PCR [PORT_PCR_COUNT]
 
__O uint32_t GPCLR
 
__O uint32_t GPCHR
 
uint8_t RESERVED_0 [24]
 
__IO uint32_t ISFR
 
uint8_t RESERVED_1 [28]
 
__IO uint32_t DFER
 
__IO uint32_t DFCR
 
__IO uint32_t DFWR
 

Detailed Description

PORT - Register Layout Typedef

Definition at line 8549 of file S32K144.h.

Field Documentation

__IO uint32_t DFCR

Digital Filter Clock Register, offset: 0xC4

Definition at line 8557 of file S32K144.h.

__IO uint32_t DFER

Digital Filter Enable Register, offset: 0xC0

Definition at line 8556 of file S32K144.h.

__IO uint32_t DFWR

Digital Filter Width Register, offset: 0xC8

Definition at line 8558 of file S32K144.h.

__O uint32_t GPCHR

Global Pin Control High Register, offset: 0x84

Definition at line 8552 of file S32K144.h.

__O uint32_t GPCLR

Global Pin Control Low Register, offset: 0x80

Definition at line 8551 of file S32K144.h.

__IO uint32_t ISFR

Interrupt Status Flag Register, offset: 0xA0

Definition at line 8554 of file S32K144.h.

__IO uint32_t PCR[PORT_PCR_COUNT]

Pin Control Register n, array offset: 0x0, array step: 0x4

Definition at line 8550 of file S32K144.h.

uint8_t RESERVED_0[24]

Definition at line 8553 of file S32K144.h.

uint8_t RESERVED_1[28]

Definition at line 8555 of file S32K144.h.


The documentation for this struct was generated from the following file: