S32 SDK
lpuart_common.c
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1 /*
2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3  * Copyright 2016 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
51 #include "device_registers.h"
52 #include "clock_manager.h"
53 #include "interrupt_manager.h"
54 #if FEATURE_LPUART_HAS_DMA_ENABLE
55 #include "edma_driver.h"
56 #endif
57 
58 /*******************************************************************************
59  * Default interrupt handlers signatures
60  ******************************************************************************/
61 
62 #if (LPUART_INSTANCE_COUNT > 0U)
63 
64 extern void LPUART0_IrqHandler(void);
65 #endif
66 
67 #if (LPUART_INSTANCE_COUNT > 1U)
68 
69 extern void LPUART1_IrqHandler(void);
70 #endif
71 
72 #if (LPUART_INSTANCE_COUNT > 2U)
73 
74 extern void LPUART2_IrqHandler(void);
75 #endif
76 
77 #if (LPUART_INSTANCE_COUNT > 3U)
78 
79 extern void LPUART3_IrqHandler(void);
80 #endif
81 
82 /*******************************************************************************
83  * Variables
84  ******************************************************************************/
85 
86 /* Table of base addresses for lpuart instances. */
88 
89 /* Table to save LPUART enum numbers defined in CMSIS files. */
91 
92 /* Table to save LPUART clock names as defined in clock manager. */
95 
96 /* Table to save LPUART ISRs - to be used for interrupt service routing
97  * at runtime, parameter for INT_SYS_InstallHandler */
99 
100 /*******************************************************************************
101  * EOF
102  ******************************************************************************/
#define LPUART_BASE_PTRS
Definition: S32K144.h:6702
const clock_names_t g_lpuartClkNames[LPUART_INSTANCE_COUNT]
Table to save LPUART indexes in PCC register map for clock configuration.
Definition: lpuart_common.c:93
IRQn_Type
Defines the Interrupt Numbers definitions.
Definition: S32K144.h:269
const isr_t g_lpuartIsr[LPUART_INSTANCE_COUNT]
Table to save LPUART ISRs.
Definition: lpuart_common.c:98
void LPUART0_IrqHandler(void)
LPUART0 interrupt handler.
Definition: lpuart_irq.c:49
void LPUART1_IrqHandler(void)
LPUART1 interrupt handler.
Definition: lpuart_irq.c:57
LPUART_Type *const g_lpuartBase[LPUART_INSTANCE_COUNT]
Table of base addresses for LPUART instances.
Definition: lpuart_common.c:87
const IRQn_Type g_lpuartRxTxIrqId[LPUART_INSTANCE_COUNT]
Table to save LPUART IRQ enumeration numbers defined in the CMSIS header file.
Definition: lpuart_common.c:90
clock_names_t
Clock names.
void LPUART2_IrqHandler(void)
LPUART2 interrupt handler.
Definition: lpuart_irq.c:65
#define LPUART_INSTANCE_COUNT
Definition: S32K144.h:6683
void(* isr_t)(void)
Interrupt handler type.
#define LPUART_RX_TX_IRQS
Definition: S32K144.h:6708