S32 SDK
lpspi_hal.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
19 
51 #ifndef LPSPI_HAL_H
52 #define LPSPI_HAL_H
53 
54 #include <stdint.h>
55 #include <stdbool.h>
56 #include <stddef.h>
57 #include "status.h"
58 #include "device_registers.h"
59 
67 /*******************************************************************************
68  * Definitions
69  ******************************************************************************/
70 
71 
75 typedef enum
76 {
86 
90 typedef enum
91 {
101  LPSPI_ALL_STATUS = 0x00003F00U
103 
107 typedef enum
108 {
112 
116 typedef enum
117 {
121 
125 typedef enum
126 {
130 
134 typedef enum
135 {
139 
143 typedef enum
144 {
145  LPSPI_PCS0 = 0U,
146  LPSPI_PCS1 = 1U,
147  LPSPI_PCS2 = 2U,
150 
154 typedef enum
155 {
167 
171 typedef enum
172 {
178 
182 typedef enum
183 {
187 
191 typedef enum
192 {
196 
200 typedef enum
201 {
206 
215 typedef struct
216 {
217  uint32_t frameSize;
219  bool txMask;
220  bool rxMask;
221  bool contCmd;
223  bool byteSwap;
224  bool lsbFirst;
226  uint32_t preDiv;
230 
250 typedef struct
251 {
252  uint32_t lpspiSrcClk;
253  uint32_t baudRate;
257 
261 typedef enum
262 {
267 
268 /*******************************************************************************
269  * Variables
270  ******************************************************************************/
271 /* Defines constant value arrays for the baud rate pre-scalar values.*/
272 static const uint32_t s_baudratePrescaler[] = { 1, 2, 4, 8, 16, 32, 64, 128 };
273 
274 /*******************************************************************************
275  * API
276  ******************************************************************************/
277 
278 #if defined(__cplusplus)
279 extern "C" {
280 #endif
281 
297 void LPSPI_HAL_Init(LPSPI_Type * base);
298 
321  lpspi_tx_cmd_config_t * txCmdCfgSet, uint32_t * actualBaudRate);
322 
331 void LPSPI_HAL_GetVersionId(const LPSPI_Type * base, uint32_t * major, uint32_t * minor,
332  uint32_t * feature);
333 
340 static inline void LPSPI_HAL_Enable(LPSPI_Type * base)
341 {
342  (base->CR) |= (uint32_t)1U << LPSPI_CR_MEN_SHIFT;
343 }
344 
351 static inline bool LPSPI_HAL_IsModuleEnabled(const LPSPI_Type * base)
352 {
353  return (bool)(((base->CR) & LPSPI_CR_MEN_MASK) >> LPSPI_CR_MEN_SHIFT);
354 }
355 
364 
376 
384 static inline bool LPSPI_HAL_IsMaster(const LPSPI_Type * base)
385 {
386  return (bool)((base->CFGR1 >> LPSPI_CFGR1_MASTER_SHIFT) & 1U);
387 }
388 
396 void LPSPI_HAL_GetFifoSizes(const LPSPI_Type * base, uint8_t * txFifoSize, uint8_t * rxFifoSize);
397 
405 void LPSPI_HAL_SetFlushFifoCmd(LPSPI_Type * base, bool flushTxFifo, bool flushRxFifo);
406 
416 static inline void LPSPI_HAL_SetRxWatermarks(LPSPI_Type * base, uint32_t rxWater)
417 {
418  uint32_t lpspi_tmp = base->FCR;
419  lpspi_tmp &= ~(LPSPI_FCR_RXWATER_MASK);
420  lpspi_tmp |= (rxWater << LPSPI_FCR_RXWATER_SHIFT);
421  base->FCR = lpspi_tmp;
422 }
423 
433 static inline void LPSPI_HAL_SetTxWatermarks(LPSPI_Type * base, uint32_t txWater)
434 {
435  uint32_t lpspi_tmp = base->FCR;
436  lpspi_tmp &= ~(LPSPI_FCR_RXWATER_MASK);
437  lpspi_tmp |= (txWater << LPSPI_FCR_TXWATER_SHIFT);
438  base->FCR = lpspi_tmp;
439 }
440 
459 static inline bool LPSPI_HAL_GetStatusFlag(const LPSPI_Type * base,
460  lpspi_status_flag_t statusFlag)
461 {
462  return (bool)(((base->SR) >> (uint8_t)statusFlag) & 1U);
463 }
464 
483 
492 static inline void LPSPI_HAL_SetIntMode(LPSPI_Type * base,
493  lpspi_status_flag_t interruptSrc, bool enable)
494 {
495  if (enable == true)
496  {
497  base->IER |= (uint32_t)1U << (uint8_t)interruptSrc;
498  }
499  else
500  {
501  base->IER &= ~((uint32_t)1U << (uint8_t)interruptSrc);
502  }
503 }
504 
513 static inline bool LPSPI_HAL_GetIntMode(const LPSPI_Type * base,
514  lpspi_status_flag_t interruptSrc)
515 {
516  return (bool)(((base->IER) >> (uint8_t)interruptSrc) & 1U);
517 }
518 
533 static inline void LPSPI_HAL_SetTxDmaCmd(LPSPI_Type * base, bool enable)
534 {
535  base->DER = (base->DER & (~LPSPI_DER_TDDE_MASK)) | ((uint32_t)enable << LPSPI_DER_TDDE_SHIFT);
536 }
537 
545 static inline void LPSPI_HAL_SetRxDmaCmd(LPSPI_Type * base, bool enable)
546 {
547  (base->DER) = (base->DER & (~LPSPI_DER_RDDE_MASK)) | ((uint32_t)enable << LPSPI_DER_RDDE_SHIFT);
548 }
549 
571  lpspi_host_request_select_t hostReqInput,
572  lpspi_signal_polarity_t hostReqPol,
573  bool enable);
574 
588  lpspi_signal_polarity_t pcsPolarity);
589 
607  lpspi_match_config_t matchCondition,
608  bool rxDataMatchOnly,
609  uint32_t match0,
610  uint32_t match1);
611 
641  lpspi_pin_config_t pinCfg,
642  lpspi_data_out_config_t dataOutConfig,
643  bool pcs3and2Enable);
644 
667 uint32_t LPSPI_HAL_SetBaudRate(LPSPI_Type * base, uint32_t bitsPerSec,
668  uint32_t sourceClockInHz, uint32_t * tcrPrescaleValue);
669 
687 status_t LPSPI_HAL_SetBaudRateDivisor(LPSPI_Type * base, uint32_t divisor);
688 
715 status_t LPSPI_HAL_SetDelay(LPSPI_Type * base, lpspi_delay_type_t whichDelay, uint32_t delay);
716 
717 
741 void LPSPI_HAL_SetTxCommandReg(LPSPI_Type * base, const lpspi_tx_cmd_config_t * txCmdCfgSet);
742 
756 static inline void LPSPI_HAL_WriteData(LPSPI_Type * base, uint32_t data)
757 {
758  base->TDR = data;
759 }
760 
773 void LPSPI_HAL_WriteDataBlocking(LPSPI_Type * base, uint32_t data);
774 
785 static inline uint32_t LPSPI_HAL_ReadData(const LPSPI_Type * base)
786 {
787  return (uint32_t)base->RDR;
788 }
789 
802 uint32_t LPSPI_HAL_ReadDataBlocking(const LPSPI_Type * base);
803 
804 
814 static inline uint32_t LPSPI_HAL_ReadTxCount(const LPSPI_Type * base)
815 {
816  return (uint32_t)(((uint32_t)(base->FSR & LPSPI_FSR_TXCOUNT_MASK)) >> LPSPI_FSR_TXCOUNT_SHIFT);
817 }
818 
828 static inline uint32_t LPSPI_HAL_ReadRxCount(const LPSPI_Type * base)
829 {
830  return (uint32_t)((((uint32_t)base->FSR & (uint32_t)LPSPI_FSR_RXCOUNT_MASK)) >> (uint32_t)LPSPI_FSR_RXCOUNT_SHIFT);
831 }
832 
841 static inline void LPSPI_HAL_ClearContCBit(LPSPI_Type * base)
842 {
843  (base->TCR) = ((base->TCR) & (~LPSPI_TCR_CONTC_MASK));
844 }
845 
854 static inline void LPSPI_HAL_SetContCBit(LPSPI_Type * base)
855 {
856  (base->TCR) = ((base->TCR) | (LPSPI_TCR_CONTC_MASK));
857 }
858 
866 static inline void LPSPI_HAL_SetClockPrescaler (LPSPI_Type * base, lpspi_prescaler_t prescaler)
867 {
868  uint32_t lpspi_tmp = base->TCR;
869  lpspi_tmp &= ~(LPSPI_TCR_PRESCALE_MASK);
870  lpspi_tmp |= ((uint32_t)prescaler << LPSPI_TCR_PRESCALE_SHIFT);
871  base->TCR = lpspi_tmp;
872 }
873 
882 {
883  return (lpspi_prescaler_t)(((uint32_t)((base->TCR) & LPSPI_TCR_PRESCALE_MASK)) >> LPSPI_TCR_PRESCALE_SHIFT);
884 }
885 
886 
889 #if defined(__cplusplus)
890 }
891 #endif
892 
895 #endif /* LPSPI_HAL_H*/
896 
897 /*******************************************************************************
898  * EOF
899  ******************************************************************************/
900 
static uint32_t LPSPI_HAL_ReadRxCount(const LPSPI_Type *base)
Reads RX COUNT form the FIFO Status Register.
Definition: lpspi_hal.h:828
#define LPSPI_TCR_PRESCALE_MASK
Definition: S32K144.h:6496
static void LPSPI_HAL_SetTxWatermarks(LPSPI_Type *base, uint32_t txWater)
Sets the TX FIFO watermark values.
Definition: lpspi_hal.h:433
#define LPSPI_DER_TDDE_SHIFT
Definition: S32K144.h:6349
#define LPSPI_SR_TEF_SHIFT
Definition: S32K144.h:6299
void LPSPI_HAL_GetFifoSizes(const LPSPI_Type *base, uint8_t *txFifoSize, uint8_t *rxFifoSize)
Gets the TX and RX FIFO sizes of the LPSPI module.
Definition: lpspi_hal.c:230
#define LPSPI_SR_RDF_SHIFT
Definition: S32K144.h:6283
lpspi_clock_phase_t clkPhase
Definition: lpspi_hal.h:227
static const uint32_t s_baudratePrescaler[]
Definition: lpspi_hal.h:272
lpspi_transfer_width_t width
Definition: lpspi_hal.h:218
status_t LPSPI_HAL_Config(LPSPI_Type *base, const lpspi_init_config_t *config, lpspi_tx_cmd_config_t *txCmdCfgSet, uint32_t *actualBaudRate)
Configures the LPSPI registers to a user defined configuration.
Definition: lpspi_hal.c:107
static void LPSPI_HAL_ClearContCBit(LPSPI_Type *base)
Clear CONTC bit form TCR Register.
Definition: lpspi_hal.h:841
lpspi_signal_polarity_t
LPSPI Signal (PCS and Host Request) Polarity configuration. Implements : lpspi_signal_polarity_t_Clas...
Definition: lpspi_hal.h:116
#define LPSPI_CCR_SCKPCS_SHIFT
Definition: S32K144.h:6438
#define LPSPI_FCR_RXWATER_SHIFT
Definition: S32K144.h:6447
#define LPSPI_FSR_TXCOUNT_SHIFT
Definition: S32K144.h:6452
lpspi_signal_polarity_t pcsPol
Definition: lpspi_hal.h:255
void LPSPI_HAL_SetFlushFifoCmd(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)
Flushes the LPSPI FIFOs.
Definition: lpspi_hal.c:250
void LPSPI_HAL_GetVersionId(const LPSPI_Type *base, uint32_t *major, uint32_t *minor, uint32_t *feature)
Gets the Major, Minor and Feature ID of the LPSPI module.
Definition: lpspi_hal.c:165
status_t LPSPI_HAL_SetDelay(LPSPI_Type *base, lpspi_delay_type_t whichDelay, uint32_t delay)
Manually configures a specific LPSPI delay parameter (module must be disabled to change the delay val...
Definition: lpspi_hal.c:620
__IO uint32_t CR
Definition: S32K144.h:6172
static uint32_t LPSPI_HAL_ReadData(const LPSPI_Type *base)
Reads data from the data buffer.
Definition: lpspi_hal.h:785
lpspi_which_pcs_t
LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure). Implements : lpspi_which_p...
Definition: lpspi_hal.h:143
lpspi_prescaler_t
Prescaler values for LPSPI clock source. Implements : lpspi_prescaler_t_Class.
Definition: lpspi_hal.h:75
lpspi_sck_polarity_t
LPSPI Clock Signal (SCK) Polarity configuration. Implements : lpspi_sck_polarity_t_Class.
Definition: lpspi_hal.h:107
#define LPSPI_SR_FCF_SHIFT
Definition: S32K144.h:6291
status_t LPSPI_HAL_SetPinConfigMode(LPSPI_Type *base, lpspi_pin_config_t pinCfg, lpspi_data_out_config_t dataOutConfig, bool pcs3and2Enable)
Configures the LPSPI SDO/SDI pin configuration mode.
Definition: lpspi_hal.c:426
static void LPSPI_HAL_SetTxDmaCmd(LPSPI_Type *base, bool enable)
Sets the LPSPI Transmit Data DMA configuration (enable or disable).
Definition: lpspi_hal.h:533
lpspi_data_out_config_t
LPSPI data output configuration. Implements : lpspi_data_out_config_t_Class.
Definition: lpspi_hal.h:191
static bool LPSPI_HAL_IsMaster(const LPSPI_Type *base)
Returns whether the LPSPI module is in master mode.
Definition: lpspi_hal.h:384
lpspi_host_request_select_t
LPSPI Host Request select configuration. Implements : lpspi_host_request_select_t_Class.
Definition: lpspi_hal.h:125
LPSPI initialization configuration structure.
Definition: lpspi_hal.h:250
#define LPSPI_FCR_TXWATER_SHIFT
Definition: S32K144.h:6443
#define LPSPI_CCR_PCSSCK_SHIFT
Definition: S32K144.h:6434
uint32_t lpspiSrcClk
Definition: lpspi_hal.h:252
lpspi_status_flag_t
LPSPI status flags. Implements : lpspi_status_flag_t_Class.
Definition: lpspi_hal.h:90
#define LPSPI_SR_MBF_SHIFT
Definition: S32K144.h:6311
status_t LPSPI_HAL_SetBaudRateDivisor(LPSPI_Type *base, uint32_t divisor)
Configures the baud rate divisor manually (only the LPSPI_CCR[SCKDIV]).
Definition: lpspi_hal.c:571
#define LPSPI_FSR_RXCOUNT_MASK
Definition: S32K144.h:6455
status_t LPSPI_HAL_SetPcsPolarityMode(LPSPI_Type *base, lpspi_which_pcs_t whichPcs, lpspi_signal_polarity_t pcsPolarity)
Configures the desired LPSPI PCS polarity.
Definition: lpspi_hal.c:340
#define LPSPI_SR_TDF_SHIFT
Definition: S32K144.h:6279
static uint32_t LPSPI_HAL_ReadTxCount(const LPSPI_Type *base)
Reads TX COUNT form the FIFO Status Register.
Definition: lpspi_hal.h:814
#define LPSPI_SR_DMF_SHIFT
Definition: S32K144.h:6307
static void LPSPI_HAL_SetClockPrescaler(LPSPI_Type *base, lpspi_prescaler_t prescaler)
Configures the clock prescaler used for all LPSPI master logic.
Definition: lpspi_hal.h:866
__IO uint32_t IER
Definition: S32K144.h:6174
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
#define LPSPI_CCR_DBT_SHIFT
Definition: S32K144.h:6430
uint32_t LPSPI_HAL_SetBaudRate(LPSPI_Type *base, uint32_t bitsPerSec, uint32_t sourceClockInHz, uint32_t *tcrPrescaleValue)
Sets the LPSPI baud rate in bits per second.
Definition: lpspi_hal.c:472
__IO uint32_t TCR
Definition: S32K144.h:6186
#define LPSPI_CR_MEN_SHIFT
Definition: S32K144.h:6254
static void LPSPI_HAL_Enable(LPSPI_Type *base)
Enables the LPSPI module.
Definition: lpspi_hal.h:340
#define LPSPI_DER_RDDE_SHIFT
Definition: S32K144.h:6353
#define LPSPI_DER_RDDE_MASK
Definition: S32K144.h:6352
#define LPSPI_FSR_RXCOUNT_SHIFT
Definition: S32K144.h:6456
#define LPSPI_SR_REF_SHIFT
Definition: S32K144.h:6303
lpspi_transfer_width_t
LPSPI transfer width configuration. Implements : lpspi_transfer_width_t_Class.
Definition: lpspi_hal.h:200
void LPSPI_HAL_WriteDataBlocking(LPSPI_Type *base, uint32_t data)
Writes a data into the TX data buffer and waits till complete to return.
Definition: lpspi_hal.c:692
#define LPSPI_FSR_TXCOUNT_MASK
Definition: S32K144.h:6451
static bool LPSPI_HAL_GetIntMode(const LPSPI_Type *base, lpspi_status_flag_t interruptSrc)
Returns if the LPSPI interrupt request is enabled or disabled.
Definition: lpspi_hal.h:513
__IO uint32_t SR
Definition: S32K144.h:6173
#define LPSPI_TCR_PRESCALE_SHIFT
Definition: S32K144.h:6497
static void LPSPI_HAL_SetRxDmaCmd(LPSPI_Type *base, bool enable)
Sets the LPSPI Receive Data DMA configuration (enable or disable).
Definition: lpspi_hal.h:545
static void LPSPI_HAL_SetIntMode(LPSPI_Type *base, lpspi_status_flag_t interruptSrc, bool enable)
Configures the LPSPI interrupts.
Definition: lpspi_hal.h:492
static lpspi_prescaler_t LPSPI_HAL_GetClockPrescaler(const LPSPI_Type *base)
Get the clock prescaler used for all LPSPI master logic.
Definition: lpspi_hal.h:881
lpspi_which_pcs_t whichPcs
Definition: lpspi_hal.h:225
void LPSPI_HAL_Init(LPSPI_Type *base)
Resets the LPSPI internal logic and registers to their default settings.
Definition: lpspi_hal.c:84
status_t LPSPI_HAL_ClearStatusFlag(LPSPI_Type *base, lpspi_status_flag_t statusFlag)
Clears the LPSPI status flag.
Definition: lpspi_hal.c:278
static void LPSPI_HAL_SetRxWatermarks(LPSPI_Type *base, uint32_t rxWater)
Sets the RX FIFO watermark values.
Definition: lpspi_hal.h:416
__IO uint32_t FCR
Definition: S32K144.h:6184
LPSPI Transmit Command Register configuration structure.
Definition: lpspi_hal.h:215
lpspi_master_slave_mode_t
LPSPI master or slave configuration. Implements : lpspi_master_slave_mode_t_Class.
Definition: lpspi_hal.h:134
#define LPSPI_SR_WCF_SHIFT
Definition: S32K144.h:6287
lpspi_pin_config_t
LPSPI pin (SDO and SDI) configuration. Implements : lpspi_pin_config_t_Class.
Definition: lpspi_hal.h:171
status_t LPSPI_HAL_SetMatchConfigMode(LPSPI_Type *base, lpspi_match_config_t matchCondition, bool rxDataMatchOnly, uint32_t match0, uint32_t match1)
Configures the LPSPI data match configuration mode.
Definition: lpspi_hal.c:375
__IO uint32_t DER
Definition: S32K144.h:6175
static void LPSPI_HAL_SetContCBit(LPSPI_Type *base)
Set CONTC bit form TCR Register.
Definition: lpspi_hal.h:854
lpspi_master_slave_mode_t lpspiMode
Definition: lpspi_hal.h:254
__O uint32_t TDR
Definition: S32K144.h:6187
uint32_t LPSPI_HAL_ReadDataBlocking(const LPSPI_Type *base)
Reads data from the data buffer but first waits till data is ready.
Definition: lpspi_hal.c:717
#define LPSPI_CFGR1_MASTER_SHIFT
Definition: S32K144.h:6379
lpspi_delay_type_t
LPSPI delay type selection Implements : lpspi_delay_type_t_Class.
Definition: lpspi_hal.h:261
static bool LPSPI_HAL_IsModuleEnabled(const LPSPI_Type *base)
Check if LPSPI module is enabled.
Definition: lpspi_hal.h:351
#define LPSPI_SR_TCF_SHIFT
Definition: S32K144.h:6295
#define LPSPI_DER_TDDE_MASK
Definition: S32K144.h:6348
lpspi_sck_polarity_t clkPolarity
Definition: lpspi_hal.h:228
void LPSPI_HAL_SetTxCommandReg(LPSPI_Type *base, const lpspi_tx_cmd_config_t *txCmdCfgSet)
Sets the Transmit Command Register (TCR) parameters.
Definition: lpspi_hal.c:663
lpspi_clock_phase_t
LPSPI clock phase configuration. Implements : lpspi_clock_phase_t_Class.
Definition: lpspi_hal.h:182
__I uint32_t RDR
Definition: S32K144.h:6190
status_t LPSPI_HAL_Disable(LPSPI_Type *base)
Disables the LPSPI module.
Definition: lpspi_hal.c:183
__I uint32_t FSR
Definition: S32K144.h:6185
#define LPSPI_FCR_RXWATER_MASK
Definition: S32K144.h:6446
status_t LPSPI_HAL_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)
Configures the LPSPI for master or slave.
Definition: lpspi_hal.c:208
#define LPSPI_CR_MEN_MASK
Definition: S32K144.h:6253
void LPSPI_HAL_SetHostRequestMode(LPSPI_Type *base, lpspi_host_request_select_t hostReqInput, lpspi_signal_polarity_t hostReqPol, bool enable)
Configures the LPSPI Host Request input.
Definition: lpspi_hal.c:313
__IO uint32_t CFGR1
Definition: S32K144.h:6177
#define LPSPI_TCR_CONTC_MASK
Definition: S32K144.h:6476
static bool LPSPI_HAL_GetStatusFlag(const LPSPI_Type *base, lpspi_status_flag_t statusFlag)
Gets the LPSPI status flag state.
Definition: lpspi_hal.h:459
lpspi_match_config_t
LPSPI Match configuration options. Implements : lpspi_match_config_t_Class.
Definition: lpspi_hal.h:154
static void LPSPI_HAL_WriteData(LPSPI_Type *base, uint32_t data)
Writes data into the TX data buffer.
Definition: lpspi_hal.h:756