101 #define CLKHI_MIN_VALUE 1U
102 #define CLKLO_MIN_VALUE 3U
103 #define CLKHI_MAX_VALUE (((1U << LPI2C_MCCR0_CLKHI_WIDTH) - 1U) >> 1U)
104 #define CLKLO_MAX_VALUE (CLKHI_MAX_VALUE << 1U)
105 #define DATAVD_MIN_VALUE 1U
106 #define SETHOLD_MIN_VALUE 2U
133 } lpi2c_transfer_direction_t;
146 uint32_t i2cDataRegAddr;
147 uint8_t *bufferTransfer;
148 uint32_t transferSize;
149 lpi2c_transfer_direction_t transferDirection;
169 return (master->cmdQueue.writeIdx == master->cmdQueue.readIdx);
183 master->cmdQueue.readIdx = 0U;
184 master->cmdQueue.writeIdx = 0U;
206 if ((uint16_t)txFIFOCount < txFIFOSize)
213 DEV_ASSERT(master->cmdQueue.writeIdx < LPI2C_MASTER_CMD_QUEUE_SIZE);
215 master->cmdQueue.cmd[master->cmdQueue.writeIdx] = cmd;
216 master->cmdQueue.data[master->cmdQueue.writeIdx] = data;
217 master->cmdQueue.writeIdx++;
239 master->cmdQueue.cmd[master->cmdQueue.readIdx],
240 master->cmdQueue.data[master->cmdQueue.readIdx]);
241 master->cmdQueue.readIdx++;
271 #if(LPI2C_HAS_HIGH_SPEED_MODE)
272 if ((master->operatingMode == LPI2C_HIGHSPEED_MODE) && (master->highSpeedInProgress ==
false))
276 master->highSpeedInProgress =
true;
279 if (master->highSpeedInProgress ==
true)
291 if (master->is10bitAddr)
295 addrByte = (uint8_t)(0xF0U + ((master->slaveAddress >> 7U) & 0x6U) + (uint8_t)0U);
298 addrByte = (uint8_t)(master->slaveAddress & 0xFFU);
304 addrByte = (uint8_t)(0xF0U + ((master->slaveAddress >> 7U) & 0x6U) + (uint8_t)1U);
312 addrByte = (uint8_t)((master->slaveAddress << 1U) + (uint8_t)receive);
336 while ((master->txSize > 0U) && ((uint16_t)txFIFOCount < txFifoSize))
370 if (resetFIFO ==
true)
378 if (sendStop ==
true)
381 #if(LPI2C_HAS_HIGH_SPEED_MODE)
382 master->highSpeedInProgress =
false;
389 if (master->rxSize != (uint16_t)0)
399 master->txBuff = NULL;
401 master->rxBuff = NULL;
403 master->i2cIdle =
true;
433 if (slave->rxSize != (uint16_t)0)
446 slave->isTransferInProgress =
false;
447 slave->rxBuff = NULL;
449 slave->txBuff = NULL;
465 baseAddr = g_lpi2cBase[instance];
466 master = g_lpi2cMasterStatePtr[instance];
469 #if(LPI2C_HAS_ULTRA_FAST_MODE)
470 if (operatingMode == LPI2C_ULTRAFAST_MODE)
482 master->operatingMode = operatingMode;
497 baseAddr = g_lpi2cBase[instance];
498 slave = g_lpi2cSlaveStatePtr[instance];
501 #if(LPI2C_HAS_ULTRA_FAST_MODE)
502 if (operatingMode == LPI2C_ULTRAFAST_MODE)
524 #if(LPI2C_HAS_HIGH_SPEED_MODE)
525 if (operatingMode == LPI2C_HIGHSPEED_MODE)
537 slave->operatingMode = operatingMode;
553 if (dmaTransParams->transferDirection == LPI2C_TX_REQ)
580 bool receive =
false;
582 dmaTransParams.dmaChannel = master->dmaChannel;
583 if (master->txSize > 0U)
587 if (txBytes > master->txSize)
589 txBytes = master->txSize;
594 dmaTransParams.i2cDataRegAddr = (uint32_t)(&(baseAddr->
MTDR));
595 dmaTransParams.bufferTransfer = (uint8_t *)master->txBuff;
596 dmaTransParams.transferDirection = LPI2C_TX_REQ;
597 dmaTransParams.transferSize = master->txSize;
608 dmaTransParams.i2cDataRegAddr = (uint32_t)(&(baseAddr->
MRDR));
609 dmaTransParams.bufferTransfer = master->rxBuff;
610 dmaTransParams.transferDirection = LPI2C_RX_REQ;
611 dmaTransParams.transferSize = master->rxSize;
628 if (master->txSize > (uint32_t)0U)
652 if (slave->txSize > (uint32_t)0U)
654 dmaTransParams.dmaChannel = slave->dmaChannel;
656 dmaTransParams.i2cDataRegAddr = (uint32_t)(&(baseAddr->
STDR));
657 dmaTransParams.bufferTransfer = (uint8_t*)slave->txBuff;
658 dmaTransParams.transferDirection = LPI2C_TX_REQ;
659 dmaTransParams.transferSize = slave->txSize;
663 dmaTransParams.dmaChannel = slave->dmaChannel;
665 dmaTransParams.i2cDataRegAddr = (uint32_t)(&(baseAddr->
SRDR));
666 dmaTransParams.bufferTransfer = slave->rxBuff;
667 dmaTransParams.transferDirection = LPI2C_RX_REQ;
668 dmaTransParams.transferSize = slave->rxSize;
679 if (slave->txSize > (uint32_t)0U)
705 uint32_t instance = (uint32_t)parameter;
707 baseAddr = g_lpi2cBase[instance];
708 master = g_lpi2cMasterStatePtr[instance];
713 if (master->blocking ==
true)
734 baseAddr = g_lpi2cBase[instance];
735 master = g_lpi2cMasterStatePtr[instance];
738 osifError =
OSIF_SemaWait(&(master->idleSemaphore), timeout);
747 master->blocking =
false;
748 return master->status;
764 baseAddr = g_lpi2cBase[instance];
765 slave = g_lpi2cSlaveStatePtr[instance];
777 slave->blocking =
false;
778 return slave->status;
796 else if (master->txBuff != NULL)
799 if (master->txSize == 0U)
805 if (master->blocking ==
true)
812 if (master->masterCallback != NULL)
849 if (master->rxSize == 0U)
855 if (master->blocking ==
true)
862 if (master->masterCallback != NULL)
887 uint16_t receivedAddr;
890 if ((receivedAddr & 1U) != (uint16_t)0U)
893 if ((slave->slaveCallback != NULL) && slave->slaveListening)
898 #if defined(ERRATA_E10792)
905 slave->txUnderrunWarning =
false;
916 if ((slave->slaveCallback != NULL) && slave->slaveListening)
939 if (slave->txUnderrunWarning ==
true)
945 if (slave->txSize == 0U)
948 if (slave->slaveCallback != NULL)
954 if (slave->txSize == 0U)
962 slave->txUnderrunWarning =
true;
982 if (slave->rxSize == 0U)
985 if (slave->slaveCallback != NULL)
991 if (slave->rxSize == 0U)
1024 uint32_t inputClock;
1032 DEV_ASSERT(g_lpi2cMasterStatePtr[instance] == NULL);
1039 baseAddr = g_lpi2cBase[instance];
1040 g_lpi2cMasterStatePtr[instance] = master;
1043 master->rxBuff = NULL;
1044 master->rxSize = 0U;
1045 master->txBuff = NULL;
1046 master->txSize = 0U;
1048 master->i2cIdle =
true;
1053 master->dmaChannel = userConfigPtr->
dmaChannel;
1056 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1057 master->masterCode = userConfigPtr->masterCode;
1058 master->highSpeedInProgress =
false;
1060 master->blocking =
false;
1076 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1077 baudRate.baudRateHS = userConfigPtr->baudRateHS;
1107 baseAddr = g_lpi2cBase[instance];
1108 master = g_lpi2cMasterStatePtr[instance];
1114 g_lpi2cMasterStatePtr[instance] = NULL;
1141 uint32_t inputClock;
1145 baseAddr = g_lpi2cBase[instance];
1146 master = g_lpi2cMasterStatePtr[instance];
1161 baudRate->
baudRate = inputClock / (((uint32_t)1U << prescaler) * (clkLo + clkHi + (uint32_t)2U));
1163 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1164 if (master->operatingMode == LPI2C_HIGHSPEED_MODE)
1169 baudRate->baudRateHS = inputClock / (((uint32_t)1U << prescaler) * (clkLo + clkHi + (uint32_t)2U));
1192 uint32_t inputClock;
1193 uint32_t minPrescaler;
1203 baseAddr = g_lpi2cBase[instance];
1204 master = g_lpi2cMasterStatePtr[instance];
1223 minPrescaler = ((inputClock - 1U) / (baudRate.
baudRate * (CLKHI_MAX_VALUE + CLKLO_MAX_VALUE + 2U))) + (uint32_t)1U;
1224 for (prescaler = 0U; prescaler < 7U; prescaler++)
1226 if (((uint32_t)1U << prescaler) >= minPrescaler)
1233 clkTotal = (inputClock + ((baudRate.
baudRate << prescaler) >> 1U)) / (baudRate.
baudRate << prescaler);
1234 if (clkTotal > (CLKHI_MAX_VALUE + CLKLO_MAX_VALUE + 2U))
1236 clkTotal = (CLKHI_MAX_VALUE + CLKLO_MAX_VALUE + 2U);
1251 clkHi = (clkTotal - 2U) / 3U;
1252 clkLo = clkTotal - 2U - clkHi;
1255 if (clkHi < CLKHI_MIN_VALUE)
1257 clkHi = CLKHI_MIN_VALUE;
1259 if (clkLo < CLKLO_MIN_VALUE)
1261 clkLo = CLKLO_MIN_VALUE;
1266 dataVd = clkHi >> 1U;
1267 if (setHold < SETHOLD_MIN_VALUE)
1269 setHold = SETHOLD_MIN_VALUE;
1271 if (dataVd < DATAVD_MIN_VALUE)
1273 dataVd = DATAVD_MIN_VALUE;
1283 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1284 if (operatingMode == LPI2C_HIGHSPEED_MODE)
1288 clkTotal = (inputClock + ((baudRate.baudRateHS << prescaler) >> 1U)) / (baudRate.baudRateHS << prescaler);
1289 if (clkTotal > (CLKHI_MAX_VALUE + CLKLO_MAX_VALUE + 2U))
1291 clkTotal = (CLKHI_MAX_VALUE + CLKLO_MAX_VALUE + 2U);
1294 clkHi = (clkTotal - 2U) / 3U;
1295 clkLo = clkTotal - 2U - clkHi;
1296 if (clkHi < CLKHI_MIN_VALUE)
1298 clkHi = CLKHI_MIN_VALUE;
1300 if (clkLo < CLKLO_MIN_VALUE)
1302 clkLo = CLKLO_MIN_VALUE;
1307 dataVd = clkHi >> 1U;
1308 if (setHold < SETHOLD_MIN_VALUE)
1310 setHold = SETHOLD_MIN_VALUE;
1312 if (dataVd < DATAVD_MIN_VALUE)
1314 dataVd = DATAVD_MIN_VALUE;
1349 master = g_lpi2cMasterStatePtr[instance];
1352 master->slaveAddress = address;
1353 master->is10bitAddr = is10bitAddr;
1365 const uint8_t * txBuff,
1376 baseAddr = g_lpi2cBase[instance];
1377 master = g_lpi2cMasterStatePtr[instance];
1384 master->txBuff = txBuff;
1385 master->txSize = txSize;
1386 master->sendStop = sendStop;
1387 master->i2cIdle =
false;
1411 #if(LPI2C_HAS_ULTRA_FAST_MODE)
1412 if (master->operatingMode == LPI2C_ULTRAFAST_MODE)
1443 const uint8_t * txBuff,
1458 master->blocking =
true;
1463 master->blocking =
false;
1486 baseAddr = g_lpi2cBase[instance];
1487 master = g_lpi2cMasterStatePtr[instance];
1492 if (master->rxBuff != NULL)
1529 baseAddr = g_lpi2cBase[instance];
1530 master = g_lpi2cMasterStatePtr[instance];
1536 #if(LPI2C_HAS_ULTRA_FAST_MODE)
1537 if (master->operatingMode == LPI2C_ULTRAFAST_MODE)
1545 master->rxSize = rxSize;
1546 master->i2cIdle =
false;
1547 master->sendStop = sendStop;
1548 master->rxBuff = rxBuff;
1569 if (rxBytes > rxSize)
1571 rxBytes = (uint8_t)rxSize;
1623 master->blocking =
true;
1628 master->blocking =
false;
1649 uint32_t *bytesRemaining)
1656 baseAddr = g_lpi2cBase[instance];
1657 master = g_lpi2cMasterStatePtr[instance];
1662 if (master->txSize > 0U)
1668 else if (master->rxSize > 0U)
1676 *bytesRemaining = 0U;
1680 return master->status;
1697 baseAddr = g_lpi2cBase[instance];
1698 master = g_lpi2cMasterStatePtr[instance];
1717 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1719 master->highSpeedInProgress =
false;
1728 if (master->blocking ==
true)
1733 if (master->masterCallback != NULL)
1749 if (master->blocking ==
true)
1756 if (master->masterCallback != NULL)
1767 #if(LPI2C_HAS_ULTRA_FAST_MODE)
1769 if (master->operatingMode != LPI2C_ULTRAFAST_MODE)
1773 if (master->blocking ==
true)
1778 #if(LPI2C_HAS_HIGH_SPEED_MODE)
1780 master->highSpeedInProgress =
false;
1788 if (master->masterCallback != NULL)
1792 #if(LPI2C_HAS_ULTRA_FAST_MODE)
1812 uint32_t inputClock;
1818 DEV_ASSERT(g_lpi2cSlaveStatePtr[instance] == NULL);
1828 baseAddr = g_lpi2cBase[instance];
1829 g_lpi2cSlaveStatePtr[instance] = slave;
1836 slave->txBuff = NULL;
1837 slave->rxBuff = NULL;
1842 slave->dmaChannel = userConfigPtr->
dmaChannel;
1843 slave->isTransferInProgress =
false;
1844 slave->blocking =
false;
1885 #if defined(ERRATA_E10792)
1931 baseAddr = g_lpi2cBase[instance];
1938 if ((slave->transferType ==
LPI2C_USING_DMA) && slave->slaveListening)
1945 g_lpi2cSlaveStatePtr[instance] = NULL;
1965 const uint8_t * txBuff,
1974 slave = g_lpi2cSlaveStatePtr[instance];
1977 slave->txBuff = txBuff;
1978 slave->txSize = txSize;
2001 slave = g_lpi2cSlaveStatePtr[instance];
2004 slave->rxBuff = rxBuff;
2005 slave->rxSize = rxSize;
2019 const uint8_t * txBuff,
2030 baseAddr = g_lpi2cBase[instance];
2031 slave = g_lpi2cSlaveStatePtr[instance];
2038 DEV_ASSERT(slave->isTransferInProgress ==
false);
2040 slave->txBuff = txBuff;
2041 slave->txSize = txSize;
2057 slave->isTransferInProgress =
true;
2064 #if defined(ERRATA_E10792)
2087 slave->isTransferInProgress =
true;
2102 const uint8_t * txBuff,
2116 slave->blocking =
true;
2147 baseAddr = g_lpi2cBase[instance];
2148 slave = g_lpi2cSlaveStatePtr[instance];
2155 DEV_ASSERT(slave->isTransferInProgress ==
false);
2157 slave->rxBuff = rxBuff;
2158 slave->rxSize = rxSize;
2174 slave->isTransferInProgress =
true;
2180 slave->isTransferInProgress =
true;
2221 slave->blocking =
true;
2246 uint32_t *bytesRemaining)
2252 slave = g_lpi2cSlaveStatePtr[instance];
2257 if (slave->txSize > 0U)
2260 *bytesRemaining = slave->txSize;
2262 else if (slave->rxSize > 0U)
2265 *bytesRemaining = slave->rxSize;
2269 *bytesRemaining = 0U;
2273 return slave->status;
2291 baseAddr = g_lpi2cBase[instance];
2292 slave = g_lpi2cSlaveStatePtr[instance];
2295 if (!slave->slaveListening)
2297 DEV_ASSERT(slave->isTransferInProgress ==
true);
2317 bool stopDetect =
false, repeatStartDetect =
false;
2321 baseAddr = g_lpi2cBase[instance];
2322 slave = g_lpi2cSlaveStatePtr[instance];
2349 if ((stopDetect ==
true) || (repeatStartDetect ==
true))
2355 #if defined(ERRATA_E10792)
2371 if (!slave->slaveListening)
2376 if (slave->blocking ==
true)
2382 if(slave->slaveCallback != NULL)
2393 #if defined(ERRATA_E10792)
2402 if (!slave->slaveListening){
2407 if (slave->blocking ==
true)
2413 if(slave->slaveCallback != NULL)
2426 #if defined(ERRATA_E10792)
2435 if (!slave->slaveListening)
2440 if (slave->blocking ==
true)
2446 if(slave->slaveCallback != NULL)
static void LPI2C_DRV_SlaveSetOperatingMode(uint32_t instance, lpi2c_mode_t operatingMode)
status_t LPI2C_DRV_SlaveGetTransferStatus(uint32_t instance, uint32_t *bytesRemaining)
Return the current status of the I2C slave transfer.
static void LPI2C_HAL_SlaveSetHighSpeedModeDetect(LPI2C_Type *baseAddr, bool enable)
Control detection of the High-speed Mode master code.
static void LPI2C_DRV_MasterEndTransfer(LPI2C_Type *baseAddr, lpi2c_master_state_t *master, bool sendStop, bool resetFIFO)
static uint8_t LPI2C_HAL_MasterGetClockLowPeriodHS(const LPI2C_Type *baseAddr)
Return the configured minimum clock low period in high-speed mode.
static bool LPI2C_HAL_MasterGetReceiveDataReadyEvent(const LPI2C_Type *baseAddr)
Indicate the availability of receive data.
static void LPI2C_HAL_SlaveClearFIFOErrorEvent(LPI2C_Type *baseAddr)
Clear the FIFO overflow or underflow flag.
#define LPI2C_HAL_SLAVE_STOP_DETECT_INT
static void LPI2C_HAL_MasterSetEnable(LPI2C_Type *baseAddr, bool enable)
Enable or disable the LPI2C master.
lpi2c_mode_t operatingMode
static bool LPI2C_HAL_SlaveGetReceiveDataEvent(const LPI2C_Type *baseAddr)
Check the availability of receive data.
DMAMUX_Type *const g_dmamuxBase[DMAMUX_INSTANCE_COUNT]
Array for DMAMUX module register base address.
static void LPI2C_HAL_MasterSetClockHighPeriodHS(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock high period in high-speed mode.
static bool LPI2C_HAL_SlaveGetBitErrorEvent(const LPI2C_Type *baseAddr)
Check the detection of a bit error.
static void LPI2C_HAL_MasterSetClockHighPeriod(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock high period.
static void LPI2C_HAL_MasterSetSetupHoldDelayHS(LPI2C_Type *baseAddr, uint8_t value)
Set the setup and hold time for a START / STOP condition in high-speed mode.
static void LPI2C_HAL_SlaveSetIgnoreNACK(LPI2C_Type *baseAddr, lpi2c_slave_nack_config_t nack_config)
Control slave behaviour when NACK is detected.
lpi2c_slave_callback_t slaveCallback
status_t LPI2C_DRV_MasterGetTransferStatus(uint32_t instance, uint32_t *bytesRemaining)
Return the current status of the I2C master transfer.
status_t OSIF_SemaDestroy(const semaphore_t *const pSem)
Destroys a previously created semaphore.
static void LPI2C_DRV_MasterHandleTransmitDataRequest(uint32_t instance, LPI2C_Type *baseAddr, lpi2c_master_state_t *master)
status_t LPI2C_DRV_MasterAbortTransferData(uint32_t instance)
Abort a non-blocking I2C Master transmission or reception.
static lpi2c_master_prescaler_t LPI2C_HAL_MasterGetPrescaler(const LPI2C_Type *baseAddr)
Return the LPI2C master prescaler.
edma_transfer_type_t
A type for the DMA transfer. Implements : edma_transfer_type_t_Class.
static void LPI2C_DRV_MasterQueueCmd(LPI2C_Type *baseAddr, lpi2c_master_state_t *master, lpi2c_master_command_t cmd, uint8_t data)
static bool LPI2C_DRV_MasterCmdQueueEmpty(const lpi2c_master_state_t *master)
static bool LPI2C_HAL_SlaveGetFIFOErrorEvent(const LPI2C_Type *baseAddr)
Check the detection of a FIFO overflow or underflow.
static status_t LPI2C_DRV_SlaveWaitTransferEnd(uint32_t instance, uint32_t timeout)
lpi2c_transfer_type_t transferType
static void LPI2C_DRV_MasterQueueData(LPI2C_Type *baseAddr, lpi2c_master_state_t *master)
static void LPI2C_HAL_SlaveSetRxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable slave receive data DMA requests.
static void LPI2C_DRV_SlaveStartDmaTransfer(uint32_t instance)
static void LPI2C_HAL_MasterClearFIFOErrorEvent(LPI2C_Type *baseAddr)
Clear the FIFO error event flag.
static void LPI2C_HAL_SlaveClearBitErrorEvent(LPI2C_Type *baseAddr)
Clear bit error flag.
static void EDMA_HAL_TCDSetSrcLastAdjust(DMA_Type *base, uint32_t channel, int32_t size)
Configures the last source address adjustment for the TCD.
static uint8_t LPI2C_HAL_MasterGetRxData(const LPI2C_Type *baseAddr)
Return the received data.
status_t EDMA_DRV_StopChannel(uint8_t channel)
Stops the eDMA channel.
lpi2c_master_callback_t masterCallback
static void LPI2C_DRV_SlaveHandleTransmitDataEvent(uint32_t instance, LPI2C_Type *baseAddr, lpi2c_slave_state_t *slave)
status_t LPI2C_DRV_SlaveReceiveData(uint32_t instance, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking receive transaction on the I2C bus.
IRQn_Type
Defines the Interrupt Numbers definitions.
void EDMA_HAL_TCDSetMajorCount(DMA_Type *base, uint32_t channel, uint32_t count)
Sets the major iteration count according to minor loop channel link setting.
static void LPI2C_DRV_SlaveHandleAddressValidEvent(uint32_t instance, const LPI2C_Type *baseAddr, lpi2c_slave_state_t *slave)
static void LPI2C_DRV_MasterSendQueuedCmd(LPI2C_Type *baseAddr, lpi2c_master_state_t *master)
#define LPI2C_HAL_MASTER_TRANSMIT_DATA_INT
static void LPI2C_HAL_SlaveSetInt(LPI2C_Type *baseAddr, uint32_t interrupts, bool enable)
Enable or disable specified LPI2C slave interrupts.
status_t LPI2C_DRV_SlaveSendDataBlocking(uint32_t instance, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking send transaction on the I2C bus.
static void LPI2C_HAL_MasterSetTxFIFOWatermark(LPI2C_Type *baseAddr, uint8_t value)
Set the transmit FIFO watermark.
static uint8_t LPI2C_HAL_MasterGetClockHighPeriodHS(const LPI2C_Type *baseAddr)
Return the configured minimum clock high period in high-speed mode.
status_t OSIF_SemaCreate(semaphore_t *const pSem, const uint8_t initValue)
Creates a semaphore with a given value.
static void LPI2C_DRV_MasterCompleteDMATransfer(void *parameter, edma_chn_status_t status)
static void LPI2C_HAL_MasterSetInt(LPI2C_Type *baseAddr, uint32_t interrupts, bool enable)
Enable or disable specified LPI2C master interrupts.
static void LPI2C_HAL_SlaveSetTXDStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for data transmission.
lpi2c_transfer_type_t transferType
lpi2c_mode_t
I2C operating modes Implements : lpi2c_mode_t_Class.
static void LPI2C_HAL_MasterClearArbitrationLostEvent(LPI2C_Type *baseAddr)
Clear the arbitration lost event flag.
static void LPI2C_HAL_MasterSetNACKConfig(LPI2C_Type *baseAddr, lpi2c_nack_config_t configuration)
Configure the reaction of the module on NACK reception.
#define LPI2C_HAL_SLAVE_ADDRESS_VALID_INT
void LPI2C_DRV_MasterSetSlaveAddr(uint32_t instance, const uint16_t address, const bool is10bitAddr)
Set the slave address for any subsequent I2C communication.
#define LPI2C_MASTER_IRQS
status_t LPI2C_DRV_SlaveSetRxBuffer(uint32_t instance, uint8_t *rxBuff, uint32_t rxSize)
Provide a buffer for receiving data.
static void LPI2C_DRV_ConfigureDmaTransfer(uint32_t instance, const lpi2c_dma_transfer_params_t *dmaTransParams)
static bool LPI2C_HAL_SlaveGetInt(const LPI2C_Type *baseAddr, uint32_t interrupts)
Return the state of the specified LPI2C slave interrupt.
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
static bool LPI2C_HAL_SlaveGetTransmitDataEvent(const LPI2C_Type *baseAddr)
Check if transmit data is requested.
static bool LPI2C_HAL_SlaveGetSTOPDetectEvent(const LPI2C_Type *baseAddr)
Check the detection of a STOP condition.
void LPI2C_DRV_MasterGetBaudRate(uint32_t instance, lpi2c_baud_rate_params_t *baudRate)
Get the currently configured baud rate.
status_t LPI2C_DRV_MasterReceiveDataBlocking(uint32_t instance, uint8_t *rxBuff, uint32_t rxSize, bool sendStop, uint32_t timeout)
Perform a blocking receive transaction on the I2C bus.
static void LPI2C_DRV_MasterHandleReceiveDataReadyEvent(uint32_t instance, LPI2C_Type *baseAddr, lpi2c_master_state_t *master)
status_t LPI2C_DRV_MasterSendData(uint32_t instance, const uint8_t *txBuff, uint32_t txSize, bool sendStop)
Perform a non-blocking send transaction on the I2C bus.
static void LPI2C_DRV_MasterResetQueue(lpi2c_master_state_t *master)
static void LPI2C_HAL_SlaveSetRXStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for data reception.
status_t LPI2C_DRV_SlaveSetTxBuffer(uint32_t instance, const uint8_t *txBuff, uint32_t txSize)
Provide a buffer for transmitting data.
edma_chn_status_t
Channel status for eDMA channel.
static void LPI2C_HAL_SlaveSetTxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable slave transmit data DMA requests.
Slave configuration structure.
Slave internal context structure.
static void LPI2C_HAL_SlaveSetTransmitNACK(LPI2C_Type *baseAddr, lpi2c_slave_nack_transmit_t nack)
Configure the ACK/NACK transmission after a received byte.
static void LPI2C_DRV_MasterStartDmaTransfer(uint32_t instance)
status_t LPI2C_DRV_SlaveSendData(uint32_t instance, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking send transaction on the I2C bus.
status_t LPI2C_DRV_SlaveAbortTransferData(uint32_t instance)
Abort a non-blocking I2C Master transmission or reception.
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
static void LPI2C_HAL_SlaveSetAddrStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for valid address reception.
static void LPI2C_HAL_MasterSetClockLowPeriod(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock low period.
static void LPI2C_HAL_MasterClearNACKDetectEvent(LPI2C_Type *baseAddr)
Clear the unexpected NACK event flag.
static void LPI2C_DRV_MasterSendAddress(LPI2C_Type *baseAddr, lpi2c_master_state_t *master, bool receive)
void LPI2C_DRV_MasterIRQHandler(uint32_t instance)
Handle master operation when I2C interrupt occurs.
static void LPI2C_HAL_SlaveSetACKStall(LPI2C_Type *baseAddr, bool enable)
Enable or disable clock stretching for the sending of the ACK bit.
static void LPI2C_HAL_MasterRxFIFOResetCmd(LPI2C_Type *baseAddr)
Reset the master receive FIFO.
static void LPI2C_HAL_MasterSetPinConfig(LPI2C_Type *baseAddr, lpi2c_pin_config_t configuration)
Set the pin mode of the module.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
status_t LPI2C_DRV_MasterInit(uint32_t instance, const lpi2c_master_user_config_t *userConfigPtr, lpi2c_master_state_t *master)
Initialize the LPI2C master mode driver.
static bool LPI2C_HAL_MasterGetFIFOErrorEvent(const LPI2C_Type *baseAddr)
Check the occurrence of a FIFO error event.
#define LPI2C_HAL_MASTER_RECEIVE_DATA_INT
status_t LPI2C_DRV_MasterDeinit(uint32_t instance)
De-initialize the LPI2C master mode driver.
#define LPI2C_DMA_INSTANCE
void LPI2C_DRV_SlaveIRQHandler(uint32_t instance)
Handle slave operation when I2C interrupt occurs.
Master configuration structure.
static void LPI2C_HAL_MasterSetDataValidDelayHS(LPI2C_Type *baseAddr, uint8_t value)
Set the data hold time for SDA in high-speed mode.
static uint16_t LPI2C_HAL_SlaveGetReceivedAddr(const LPI2C_Type *baseAddr)
Return the received slave address.
static uint8_t LPI2C_HAL_MasterGetClockLowPeriod(const LPI2C_Type *baseAddr)
Return the configured minimum clock low period.
lpi2c_master_prescaler_t
LPI2C master prescaler options Implements : lpi2c_master_prescaler_t_Class.
static void EDMA_HAL_TCDSetDisableDmaRequestAfterTCDDoneCmd(DMA_Type *base, uint32_t channel, bool disable)
Disables/Enables the DMA request after the major loop completes for the TCD.
#define LPI2C_HAL_SLAVE_RECEIVE_DATA_INT
status_t OSIF_SemaWait(semaphore_t *const pSem, const uint32_t timeout)
Decrement a semaphore with timeout.
status_t EDMA_DRV_StartChannel(uint8_t channel)
Starts an eDMA channel.
clock_names_t
Clock names.
static uint8_t LPI2C_HAL_MasterGetRxFIFOWatermark(const LPI2C_Type *baseAddr)
Return the configured receive FIFO watermark.
static uint16_t LPI2C_HAL_MasterGetTxFIFOSize(const LPI2C_Type *baseAddr)
Get the size of the Master Transmit FIFO.
static void LPI2C_DRV_SlaveHandleReceiveDataEvent(uint32_t instance, const LPI2C_Type *baseAddr, lpi2c_slave_state_t *slave)
static void LPI2C_HAL_MasterSetRxFIFOWatermark(LPI2C_Type *baseAddr, uint8_t value)
Set the receive FIFO watermark.
status_t LPI2C_DRV_SlaveDeinit(uint32_t instance)
De-initialize the I2C slave mode driver.
static void LPI2C_HAL_SlaveSetAddr0(LPI2C_Type *baseAddr, uint16_t addr)
Configure the ADDR0 address for slave address match.
static void LPI2C_HAL_MasterSetPrescaler(LPI2C_Type *baseAddr, lpi2c_master_prescaler_t prescaler)
Configure the LPI2C master prescaler.
#define LPI2C_HAL_SLAVE_FIFO_ERROR_INT
static status_t LPI2C_DRV_MasterWaitTransferEnd(uint32_t instance, uint32_t timeout)
status_t OSIF_SemaPost(semaphore_t *const pSem)
Increment a semaphore.
lpi2c_master_command_t
LPI2C master commands Implements : lpi2c_master_command_t_Class.
static void LPI2C_HAL_MasterSetSetupHoldDelay(LPI2C_Type *baseAddr, uint8_t value)
Set the setup and hold delay for a START / STOP condition.
lpi2c_mode_t operatingMode
static uint8_t LPI2C_HAL_SlaveGetData(const LPI2C_Type *baseAddr)
Return the data received by the LPI2C slave receiver.
DMA_Type *const g_edmaBase[DMA_INSTANCE_COUNT]
Array for the eDMA module register base address.
void LPI2C_HAL_Init(LPI2C_Type *baseAddr)
Initializes the LPI2C module to a known state.
static void LPI2C_HAL_MasterSetDataValidDelay(LPI2C_Type *baseAddr, uint8_t value)
Set the data hold time for SDA.
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
static bool LPI2C_HAL_SlaveGetAddressValidEvent(const LPI2C_Type *baseAddr)
Check the validity of the Address Status Register.
static void LPI2C_HAL_MasterSetTxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable transmit data DMA requests.
#define LPI2C_HAL_SLAVE_BIT_ERROR_INT
static void LPI2C_HAL_SlaveSetAddrConfig(LPI2C_Type *baseAddr, lpi2c_slave_addr_config_t configuration)
Control address match configuration.
static void LPI2C_HAL_MasterTransmitCmd(LPI2C_Type *baseAddr, lpi2c_master_command_t cmd, uint8_t data)
Provide commands and data for the LPI2C master.
static void DMAMUX_HAL_SetChannelSource(DMAMUX_Type *base, uint32_t channel, uint8_t source)
Configures the DMA request for the DMAMUX channel.
void LPI2C_DRV_MasterSetBaudRate(uint32_t instance, const lpi2c_mode_t operatingMode, const lpi2c_baud_rate_params_t baudRate)
Set the baud rate for any subsequent I2C communication.
static uint16_t LPI2C_HAL_MasterGetRxFIFOSize(const LPI2C_Type *baseAddr)
Get the size of the Master Receive FIFO.
lpi2c_dma_transfer_params_t
Master internal context structure.
status_t LPI2C_DRV_MasterReceiveData(uint32_t instance, uint8_t *rxBuff, uint32_t rxSize, bool sendStop)
Perform a non-blocking receive transaction on the I2C bus.
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t channel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
static uint8_t LPI2C_HAL_MasterGetClockHighPeriod(const LPI2C_Type *baseAddr)
Return the configured minimum clock high period.
static bool LPI2C_HAL_MasterGetTransmitDataRequestEvent(const LPI2C_Type *baseAddr)
Indicate if the LPI2C master requests more data.
static void LPI2C_HAL_SlaveClearSTOPDetectEvent(LPI2C_Type *baseAddr)
Clear the STOP detect flag.
static uint8_t LPI2C_HAL_MasterGetTxFIFOCount(const LPI2C_Type *baseAddr)
Return the number of words in the transmit FIFO.
static void LPI2C_HAL_MasterTxFIFOResetCmd(LPI2C_Type *baseAddr)
Reset the master transmit FIFO.
static bool LPI2C_HAL_MasterGetArbitrationLostEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an arbitration lost event.
static void LPI2C_HAL_SlaveClearRepeatedStartEvent(LPI2C_Type *baseAddr)
Clear the repeated START detect flag.
static void LPI2C_HAL_SlaveSetEnable(LPI2C_Type *baseAddr, bool enable)
Enable or disable the LPI2C slave.
static bool LPI2C_HAL_MasterGetNACKDetectEvent(const LPI2C_Type *baseAddr)
Check the occurrence of an unexpected NACK event.
status_t LPI2C_DRV_SlaveReceiveDataBlocking(uint32_t instance, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking receive transaction on the I2C bus.
status_t LPI2C_DRV_SlaveInit(uint32_t instance, const lpi2c_slave_user_config_t *userConfigPtr, lpi2c_slave_state_t *slave)
Initialize the I2C slave mode driver.
static void LPI2C_DRV_MasterSetOperatingMode(uint32_t instance, lpi2c_mode_t operatingMode)
status_t LPI2C_DRV_MasterSendDataBlocking(uint32_t instance, const uint8_t *txBuff, uint32_t txSize, bool sendStop, uint32_t timeout)
Perform a blocking send transaction on the I2C bus.
static void LPI2C_HAL_MasterSetRxDMA(LPI2C_Type *baseAddr, bool enable)
Enable/disable receive data DMA requests.
status_t EDMA_DRV_InstallCallback(uint8_t channel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
#define LPI2C_INSTANCE_COUNT
#define LPI2C_HAL_SLAVE_TRANSMIT_DATA_INT
static uint8_t LPI2C_HAL_MasterGetRxFIFOCount(const LPI2C_Type *baseAddr)
Return the number of words in the receive FIFO.
#define LPI2C_HAL_MASTER_ARBITRATION_LOST_INT
static void LPI2C_DRV_SlaveEndTransfer(LPI2C_Type *baseAddr, lpi2c_slave_state_t *slave)
#define LPI2C_HAL_MASTER_FIFO_ERROR_INT
#define LPI2C_HAL_MASTER_NACK_DETECT_INT
static bool LPI2C_HAL_SlaveGetRepeatedStartEvent(const LPI2C_Type *baseAddr)
Check the detection of a repeated START condition.
static void LPI2C_HAL_SlaveTransmitData(LPI2C_Type *baseAddr, uint8_t data)
Provide data for the LPI2C slave transmitter.
#define LPI2C_HAL_SLAVE_REPEATED_START_INT
static void LPI2C_HAL_MasterSetClockLowPeriodHS(LPI2C_Type *baseAddr, uint8_t value)
Set the minimum clock low period in high-speed mode.