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S32 SDK
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#define LPSPI_CCR_DBT | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CCR_DBT_SHIFT))&LPSPI_CCR_DBT_MASK) |
#define LPSPI_CCR_PCSSCK | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CCR_PCSSCK_SHIFT))&LPSPI_CCR_PCSSCK_MASK) |
#define LPSPI_CCR_SCKDIV | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CCR_SCKDIV_SHIFT))&LPSPI_CCR_SCKDIV_MASK) |
#define LPSPI_CCR_SCKPCS | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CCR_SCKPCS_SHIFT))&LPSPI_CCR_SCKPCS_MASK) |
#define LPSPI_CFGR0_CIRFIFO | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR0_CIRFIFO_SHIFT))&LPSPI_CFGR0_CIRFIFO_MASK) |
#define LPSPI_CFGR0_HREN | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR0_HREN_SHIFT))&LPSPI_CFGR0_HREN_MASK) |
#define LPSPI_CFGR0_HRPOL | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR0_HRPOL_SHIFT))&LPSPI_CFGR0_HRPOL_MASK) |
#define LPSPI_CFGR0_HRSEL | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR0_HRSEL_SHIFT))&LPSPI_CFGR0_HRSEL_MASK) |
#define LPSPI_CFGR0_RDMO | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR0_RDMO_SHIFT))&LPSPI_CFGR0_RDMO_MASK) |
#define LPSPI_CFGR1_AUTOPCS | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_AUTOPCS_SHIFT))&LPSPI_CFGR1_AUTOPCS_MASK) |
#define LPSPI_CFGR1_MASTER | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_MASTER_SHIFT))&LPSPI_CFGR1_MASTER_MASK) |
#define LPSPI_CFGR1_MATCFG | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_MATCFG_SHIFT))&LPSPI_CFGR1_MATCFG_MASK) |
#define LPSPI_CFGR1_NOSTALL | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_NOSTALL_SHIFT))&LPSPI_CFGR1_NOSTALL_MASK) |
#define LPSPI_CFGR1_OUTCFG | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_OUTCFG_SHIFT))&LPSPI_CFGR1_OUTCFG_MASK) |
#define LPSPI_CFGR1_PCSCFG | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_PCSCFG_SHIFT))&LPSPI_CFGR1_PCSCFG_MASK) |
#define LPSPI_CFGR1_PCSPOL | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_PCSPOL_SHIFT))&LPSPI_CFGR1_PCSPOL_MASK) |
#define LPSPI_CFGR1_PINCFG | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_PINCFG_SHIFT))&LPSPI_CFGR1_PINCFG_MASK) |
#define LPSPI_CFGR1_SAMPLE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CFGR1_SAMPLE_SHIFT))&LPSPI_CFGR1_SAMPLE_MASK) |
#define LPSPI_CR_DBGEN | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_DBGEN_SHIFT))&LPSPI_CR_DBGEN_MASK) |
#define LPSPI_CR_DOZEN | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_DOZEN_SHIFT))&LPSPI_CR_DOZEN_MASK) |
#define LPSPI_CR_MEN | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_MEN_SHIFT))&LPSPI_CR_MEN_MASK) |
#define LPSPI_CR_RRF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_RRF_SHIFT))&LPSPI_CR_RRF_MASK) |
#define LPSPI_CR_RST | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_RST_SHIFT))&LPSPI_CR_RST_MASK) |
#define LPSPI_CR_RTF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_CR_RTF_SHIFT))&LPSPI_CR_RTF_MASK) |
#define LPSPI_DER_RDDE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_DER_RDDE_SHIFT))&LPSPI_DER_RDDE_MASK) |
#define LPSPI_DER_TDDE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_DER_TDDE_SHIFT))&LPSPI_DER_TDDE_MASK) |
#define LPSPI_DMR0_MATCH0 | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_DMR0_MATCH0_SHIFT))&LPSPI_DMR0_MATCH0_MASK) |
#define LPSPI_DMR1_MATCH1 | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_DMR1_MATCH1_SHIFT))&LPSPI_DMR1_MATCH1_MASK) |
#define LPSPI_FCR_RXWATER | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_FCR_RXWATER_SHIFT))&LPSPI_FCR_RXWATER_MASK) |
#define LPSPI_FCR_TXWATER | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_FCR_TXWATER_SHIFT))&LPSPI_FCR_TXWATER_MASK) |
#define LPSPI_FSR_RXCOUNT | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_FSR_RXCOUNT_SHIFT))&LPSPI_FSR_RXCOUNT_MASK) |
#define LPSPI_FSR_TXCOUNT | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_FSR_TXCOUNT_SHIFT))&LPSPI_FSR_TXCOUNT_MASK) |
#define LPSPI_IER_DMIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_DMIE_SHIFT))&LPSPI_IER_DMIE_MASK) |
#define LPSPI_IER_FCIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_FCIE_SHIFT))&LPSPI_IER_FCIE_MASK) |
#define LPSPI_IER_RDIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_RDIE_SHIFT))&LPSPI_IER_RDIE_MASK) |
#define LPSPI_IER_REIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_REIE_SHIFT))&LPSPI_IER_REIE_MASK) |
#define LPSPI_IER_TCIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_TCIE_SHIFT))&LPSPI_IER_TCIE_MASK) |
#define LPSPI_IER_TDIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_TDIE_SHIFT))&LPSPI_IER_TDIE_MASK) |
#define LPSPI_IER_TEIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_TEIE_SHIFT))&LPSPI_IER_TEIE_MASK) |
#define LPSPI_IER_WCIE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_IER_WCIE_SHIFT))&LPSPI_IER_WCIE_MASK) |
#define LPSPI_PARAM_RXFIFO | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_PARAM_RXFIFO_SHIFT))&LPSPI_PARAM_RXFIFO_MASK) |
#define LPSPI_PARAM_TXFIFO | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_PARAM_TXFIFO_SHIFT))&LPSPI_PARAM_TXFIFO_MASK) |
#define LPSPI_RDR_DATA | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_RDR_DATA_SHIFT))&LPSPI_RDR_DATA_MASK) |
#define LPSPI_RSR_RXEMPTY | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_RSR_RXEMPTY_SHIFT))&LPSPI_RSR_RXEMPTY_MASK) |
#define LPSPI_RSR_SOF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_RSR_SOF_SHIFT))&LPSPI_RSR_SOF_MASK) |
#define LPSPI_SR_DMF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_DMF_SHIFT))&LPSPI_SR_DMF_MASK) |
#define LPSPI_SR_FCF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_FCF_SHIFT))&LPSPI_SR_FCF_MASK) |
#define LPSPI_SR_MBF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_MBF_SHIFT))&LPSPI_SR_MBF_MASK) |
#define LPSPI_SR_RDF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_RDF_SHIFT))&LPSPI_SR_RDF_MASK) |
#define LPSPI_SR_REF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_REF_SHIFT))&LPSPI_SR_REF_MASK) |
#define LPSPI_SR_TCF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_TCF_SHIFT))&LPSPI_SR_TCF_MASK) |
#define LPSPI_SR_TDF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_TDF_SHIFT))&LPSPI_SR_TDF_MASK) |
#define LPSPI_SR_TEF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_TEF_SHIFT))&LPSPI_SR_TEF_MASK) |
#define LPSPI_SR_WCF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_SR_WCF_SHIFT))&LPSPI_SR_WCF_MASK) |
#define LPSPI_TCR_BYSW | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_BYSW_SHIFT))&LPSPI_TCR_BYSW_MASK) |
#define LPSPI_TCR_CONT | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_CONT_SHIFT))&LPSPI_TCR_CONT_MASK) |
#define LPSPI_TCR_CONTC | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_CONTC_SHIFT))&LPSPI_TCR_CONTC_MASK) |
#define LPSPI_TCR_CPHA | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_CPHA_SHIFT))&LPSPI_TCR_CPHA_MASK) |
#define LPSPI_TCR_CPOL | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_CPOL_SHIFT))&LPSPI_TCR_CPOL_MASK) |
#define LPSPI_TCR_FRAMESZ | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_FRAMESZ_SHIFT))&LPSPI_TCR_FRAMESZ_MASK) |
#define LPSPI_TCR_LSBF | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_LSBF_SHIFT))&LPSPI_TCR_LSBF_MASK) |
#define LPSPI_TCR_PCS | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_PCS_SHIFT))&LPSPI_TCR_PCS_MASK) |
#define LPSPI_TCR_PRESCALE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_PRESCALE_SHIFT))&LPSPI_TCR_PRESCALE_MASK) |
#define LPSPI_TCR_RXMSK | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_RXMSK_SHIFT))&LPSPI_TCR_RXMSK_MASK) |
#define LPSPI_TCR_TXMSK | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_TXMSK_SHIFT))&LPSPI_TCR_TXMSK_MASK) |
#define LPSPI_TCR_WIDTH | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TCR_WIDTH_SHIFT))&LPSPI_TCR_WIDTH_MASK) |
#define LPSPI_TDR_DATA | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_TDR_DATA_SHIFT))&LPSPI_TDR_DATA_MASK) |
#define LPSPI_VERID_FEATURE | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_VERID_FEATURE_SHIFT))&LPSPI_VERID_FEATURE_MASK) |
#define LPSPI_VERID_MAJOR | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_VERID_MAJOR_SHIFT))&LPSPI_VERID_MAJOR_MASK) |
#define LPSPI_VERID_MINOR | ( | x | ) | (((uint32_t)(((uint32_t)(x))<<LPSPI_VERID_MINOR_SHIFT))&LPSPI_VERID_MINOR_MASK) |