77 #ifdef DEV_ERROR_DETECT
101 #ifdef DEV_ERROR_DETECT
107 DEV_ASSERT((edmaState != NULL) && (userConfig != NULL));
112 #ifdef DEV_ERROR_DETECT
128 volatile uint8_t *clearStructPtr = (
volatile uint8_t *)s_edma;
130 while (clearSize > 0U)
144 #if (FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U)
145 EDMA_HAL_SetGroupArbitrationMode(edmaRegBase, userConfig->groupArbitration);
146 EDMA_HAL_SetGroupPriority(edmaRegBase, userConfig->groupPriority);
152 #if defined FEATURE_EDMA_HAS_ERROR_IRQ
177 if ((chnStateArray != NULL) && (chnConfigArray != NULL))
179 for (i = 0U; i < chnCount; i++)
184 edmaStatus = chnInitStatus;
206 #if defined FEATURE_EDMA_HAS_ERROR_IRQ
220 chn = s_edma->
chn[i];
252 DEV_ASSERT((edmaChannelState != NULL) && (edmaChannelConfig != NULL));
323 s_edma->
chn[requestedChannel] = chn;
326 uint8_t *clearStructPtr = (uint8_t *)chn;
328 while (clearSize > 0U)
336 chn->
channel = requestedChannel;
378 uint8_t *clearStructPtr = (uint8_t *)chnState;
380 while (clearSize > 0U)
387 s_edma->
chn[channel] = NULL;
413 uint8_t *byteAccess = (uint8_t *)stcd;
415 while (clearSize > 0U)
450 uint8_t channel = 0U;
462 chn = s_edma->
chn[channel];
488 uint32_t srcAddr, uint32_t destAddr,
500 #ifdef DEV_ERROR_DETECT
502 DEV_ASSERT(EDMA_DRV_ValidTransferSize(transferSize));
506 uint8_t transferOffset;
515 transferOffset = (uint8_t) (1U << ((uint8_t)transferSize));
520 if ((dataBufferSize % transferOffset) != 0U)
629 DEV_ASSERT((stcd != NULL) && (srcList != NULL) && (destList != NULL));
631 #ifdef DEV_ERROR_DETECT
633 DEV_ASSERT(EDMA_DRV_ValidTransferSize(transferSize));
637 uint16_t transferOffset;
638 uint32_t stcdAlignedAddr =
STCD_ADDR(stcd);
650 transferOffset = (uint16_t) (1UL << ((uint16_t)transferSize));
655 if ((bytesOnEachRequest % transferOffset) != 0U)
661 uint8_t *clearStructPtr = (uint8_t *)(&config);
663 while (clearSize > 0U)
670 clearStructPtr = (uint8_t *)(&loopConfig);
672 while (clearSize > 0U)
700 if ((srcList[i].length != destList[i].length) || (srcList[i].
type != destList[i].
type))
707 switch (srcList[i].type)
717 config.
srcOffset = (int16_t) transferOffset;
723 config.
srcOffset = (int16_t) transferOffset;
733 if (i == ((uint8_t)(tcdCount - 1U)))
817 if ((config != NULL) && (stcd != NULL))
919 #ifdef DEV_ERROR_DETECT
void EDMA_DRV_PushConfigToSTCD(const edma_transfer_config_t *config, edma_software_tcd_t *stcd)
Copies the channel configuration to the software TCD structure.
void DMAMUX_HAL_Init(DMAMUX_Type *base)
Initializes the DMAMUX module to the reset state.
edma_chn_state_t *volatile chn[FEATURE_EDMA_MODULE_CHANNELS]
static void EDMA_HAL_TCDSetSrcAddr(DMA_Type *base, uint32_t channel, uint32_t address)
Configures the source address for the hardware TCD.
static void EDMA_HAL_TCDSetChannelMajorLink(DMA_Type *base, uint32_t channel, uint32_t majorLinkChannel, bool enable)
Configures the major channel link the TCD.
eDMA TCD Implements : edma_software_tcd_t_Class
void EDMA_HAL_TCDSetScatterGatherLink(DMA_Type *base, uint32_t channel, uint32_t nextTCDAddr)
Configures the memory address for the next transfer TCD for the TCD.
uint32_t minorByteTransferCount
#define DMAMUX_INSTANCE_COUNT
DMAMUX_Type *const g_dmamuxBase[DMAMUX_INSTANCE_COUNT]
Array for DMAMUX module register base address.
static status_t EDMA_DRV_RequestChannel(uint8_t requestedChannel, dma_request_source_t source, edma_chn_state_t *chn)
uint8_t minorLoopChnLinkNumber
void EDMA_HAL_TCDClearReg(DMA_Type *base, uint32_t channel)
Clears all registers to 0 for the hardware TCD.
The user configuration structure for the eDMA driver.
edma_transfer_type_t
A type for the DMA transfer. Implements : edma_transfer_type_t_Class.
static void EDMA_HAL_TCDSetDestMinorLoopOffsetCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/disables the destination minor loop offset feature for the TCD.
The user configuration structure for the an eDMA driver channel.
#define FEATURE_EDMA_MODULE_CHANNELS
status_t EDMA_DRV_ReleaseChannel(uint8_t channel)
Releases an eDMA channel.
static void EDMA_HAL_TCDSetSrcLastAdjust(DMA_Type *base, uint32_t channel, int32_t size)
Configures the last source address adjustment for the TCD.
status_t EDMA_DRV_StopChannel(uint8_t channel)
Stops the eDMA channel.
IRQn_Type
Defines the Interrupt Numbers definitions.
void EDMA_HAL_TCDSetMajorCount(DMA_Type *base, uint32_t channel, uint32_t count)
Sets the major iteration count according to minor loop channel link setting.
uint8_t majorLoopChnLinkNumber
status_t EDMA_DRV_Deinit(void)
De-initializes the eDMA module.
status_t EDMA_DRV_Init(edma_state_t *edmaState, const edma_user_config_t *userConfig, edma_chn_state_t *const chnStateArray[], const edma_channel_config_t *const chnConfigArray[], uint8_t chnCount)
Initializes the eDMA module.
edma_channel_priority_t priority
static void EDMA_HAL_TCDSetSrcMinorLoopOffsetCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/disables the source minor loop offset feature for the TCD.
void EDMA_DRV_IRQHandler(uint8_t channel)
static void DMAMUX_HAL_SetChannelCmd(DMAMUX_Type *base, uint32_t channel, bool enable)
Enables/Disables the DMAMUX channel.
static void EDMA_HAL_ClearIntStatusFlag(DMA_Type *base, uint8_t channel)
Clears the interrupt status for the eDMA channel or all channels.
const clock_names_t g_edmaClockNames[DMA_INSTANCE_COUNT]
Array for eDMA clock sources.
dma_request_source_t
Structure for the DMA hardware request.
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
static void EDMA_HAL_TCDSetScatterGatherCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables the scatter/gather feature for the TCD.
void EDMA_HAL_SetErrorIntCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the error interrupt for channels.
const IRQn_Type g_edmaIrqId[FEATURE_CHANNEL_INTERRUPT_LINES]
Array for eDMA channel interrupt vector number.
uint32_t scatterGatherNextDescAddr
status_t EDMA_DRV_ConfigLoopTransfer(uint8_t channel, const edma_transfer_config_t *transferConfig)
Configures the DMA transfer in loop mode.
#define STCD_ADDR(address)
status_t EDMA_DRV_ChannelInit(edma_chn_state_t *edmaChannelState, const edma_channel_config_t *edmaChannelConfig)
Initializes an eDMA channel.
void EDMA_DRV_ErrorIRQHandler(void)
Runtime state structure for the eDMA driver.
static void EDMA_HAL_TCDSetSrcOffset(DMA_Type *base, uint32_t channel, int16_t offset)
Configures the source address signed offset for the hardware TCD.
edma_chn_status_t
Channel status for eDMA channel.
static void EDMA_HAL_TCDSetDestAddr(DMA_Type *base, uint32_t channel, uint32_t address)
Configures the destination address for the TCD.
edma_transfer_size_t destTransferSize
#define DMA_TCD_ATTR_DMOD_SHIFT
static void EDMA_HAL_SetHaltCmd(DMA_Type *base, bool halt)
Halts/Un-halts the DMA Operations.
bool majorLoopChnLinkEnable
int32_t srcLastAddrAdjust
static void EDMA_HAL_TCDSetDestLastAdjust(DMA_Type *base, uint32_t channel, int32_t adjust)
Configures the last source address adjustment.
#define DMA_TCD_CSR_ESG_SHIFT
static void EDMA_HAL_SetChannelPriority(DMA_Type *base, uint32_t channel, edma_channel_priority_t priority)
Sets the eDMA channel priority.
void EDMA_DRV_PushConfigToReg(uint8_t channel, const edma_transfer_config_t *tcd)
Copies the channel configuration to the TCD registers.
static void EDMA_HAL_SetHaltOnErrorCmd(DMA_Type *base, bool haltOnError)
Halts or does not halt the eDMA module when an error occurs.
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
static edma_state_t * s_edma
EDMA global structure to maintain eDMA state.
edma_arbitration_algorithm_t chnArbitration
uint32_t majorLoopIterationCount
void EDMA_HAL_TCDSetMinorLoopOffset(DMA_Type *base, uint32_t channel, int32_t offset)
Configures the minor loop offset for the TCD.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
void EDMA_HAL_TCDSetChannelMinorLink(DMA_Type *base, uint32_t channel, uint32_t linkChannel, bool enable)
Sets the channel minor link for the TCD.
static void EDMA_HAL_SetMinorLoopMappingCmd(DMA_Type *base, bool enable)
Enables/Disables the minor loop mapping.
static void EDMA_DRV_ClearIntStatus(uint8_t channel)
void EDMA_HAL_TCDSetAttribute(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo, edma_transfer_size_t srcTransferSize, edma_transfer_size_t destTransferSize)
Configures the transfer attribute for the eDMA channel.
status_t EDMA_DRV_ConfigScatterGatherTransfer(uint8_t channel, edma_software_tcd_t *stcd, edma_transfer_size_t transferSize, uint32_t bytesOnEachRequest, const edma_scatter_gather_list_t *srcList, const edma_scatter_gather_list_t *destList, uint8_t tcdCount)
Configures the DMA transfer in a scatter-gather mode.
#define DMA_TCD_ATTR_SMOD_SHIFT
#define EDMA_ERR_LSB_MASK
Macro for accessing the least significant bit of the ERR register.
edma_transfer_size_t srcTransferSize
Data structure for configuring a discrete memory transfer. Implements : edma_scatter_gather_list_t_Cl...
#define FEATURE_CHANNEL_INTERRUPT_LINES
volatile edma_chn_status_t status
edma_transfer_size_t
eDMA transfer configuration Implements : edma_transfer_size_t_Class
static void EDMA_HAL_ClearErrorIntStatusFlag(DMA_Type *base, uint8_t channel)
Clears the error interrupt status for the eDMA channel or channels.
edma_chn_status_t EDMA_DRV_GetChannelStatus(uint8_t channel)
Gets the eDMA channel status.
edma_transfer_type_t type
status_t EDMA_DRV_StartChannel(uint8_t channel)
Starts an eDMA channel.
const IRQn_Type g_edmaErrIrqId[FEATURE_ERROR_INTERRUPT_LINES]
Array for eDMA module's error interrupt vector number.
#define FEATURE_DMAMUX_REQ_SRC_TO_CHN(x)
static void EDMA_HAL_TCDSetDestOffset(DMA_Type *base, uint32_t channel, int16_t offset)
Configures the destination address signed offset for the TCD.
#define FEATURE_ERROR_INTERRUPT_LINES
static uint32_t EDMA_HAL_GetErrorIntStatusFlag(const DMA_Type *base)
Gets the eDMA error interrupt status.
DMA_Type *const g_edmaBase[DMA_INSTANCE_COUNT]
Array for the eDMA module register base address.
int32_t destLastAddrAdjust
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
void EDMA_HAL_SetDmaRequestCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the DMA request for the channel or all channels.
#define DMA_TCD_CSR_INTMAJOR_SHIFT
static void EDMA_HAL_TCDSetIntCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables the interrupt after the major loop completes for the TCD.
static void EDMA_HAL_ClearDoneStatusFlag(DMA_Type *base, uint8_t channel)
Clears the done status for a channel or all channels.
static void DMAMUX_HAL_SetChannelSource(DMAMUX_Type *base, uint32_t channel, uint8_t source)
Configures the DMA request for the DMAMUX channel.
#define DMA_TCD_ATTR_SSIZE_SHIFT
bool minorLoopChnLinkEnable
void(* edma_callback_t)(void *parameter, edma_chn_status_t status)
Definition for the eDMA channel callback function.
dma_request_source_t source
static edma_arbitration_algorithm_t EDMA_HAL_GetChannelArbitrationMode(const DMA_Type *base)
Gets the channel arbitration algorithm.
void EDMA_HAL_Init(DMA_Type *base)
Initializes eDMA module to known state.
void EDMA_HAL_TCDSetNbytes(DMA_Type *base, uint32_t channel, uint32_t nbytes)
Configures the nbytes for the eDMA channel.
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t channel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
static void EDMA_DRV_ClearSoftwareTCD(edma_software_tcd_t *stcd)
#define FEATURE_DMAMUX_CHN_FOR_EDMA_CHN(x)
eDMA loop transfer configuration.
#define FEATURE_DMAMUX_REQ_SRC_TO_INSTANCE(x)
eDMA transfer size configuration.
edma_loop_transfer_config_t * loopTransferConfig
static void EDMA_HAL_SetChannelArbitrationMode(DMA_Type *base, edma_arbitration_algorithm_t channelArbitration)
Sets the channel arbitration algorithm.
status_t EDMA_DRV_InstallCallback(uint8_t channel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
const clock_names_t g_dmamuxClockNames[DMAMUX_INSTANCE_COUNT]
#define DMA_TCD_ATTR_DSIZE_SHIFT
Data structure for the eDMA channel state. Implements : edma_chn_state_t_Class.