S32 SDK
clock_S32K144.c
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1 /*
2  * Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
49 #include "clock_S32K144.h"
50 #include "clock_manager.h"
51 #include "device_registers.h"
52 #include <stddef.h> /* This header is included for bool type */
53 /*
54  * README:
55  * This file provides these APIs:
56  * 1. APIs to get the frequency of output clocks in Reference Manual ->
57  * Chapter Clock Distribution -> Figure Clocking diagram.
58  * 2. APIs for IP modules listed in Reference Manual -> Chapter Clock Distribution
59  * -> Module clocks.
60  */
61 
62 /*******************************************************************************
63  * Definitions
64  ******************************************************************************/
65 /* This frequency values should be set by different boards. */
66 /* SIM */
67 uint32_t g_TClkFreq[NUMBER_OF_TCLK_INPUTS]; /* TCLKx clocks */
68 
69 /* RTC */
70 uint32_t g_RtcClkInFreq; /* RTC CLKIN clock */
71 
72 /* SCG */
73 uint32_t g_xtal0ClkFreq; /* EXTAL0 clock */
74 
75 /*******************************************************************************
76  * INTERNAL FUNCTIONS
77  ******************************************************************************/
78 
79 static status_t CLOCK_SYS_GetScgClockFreq(clock_names_t clockName, uint32_t * frequency);
80 static status_t CLOCK_SYS_GetSimClockFreq(clock_names_t clockName, uint32_t * frequency);
81 static status_t CLOCK_SYS_GetPccClockFreq(clock_names_t clockName, uint32_t * frequency);
82 static uint32_t CLOCK_SYS_GetPeripheralClock(clock_names_t clockName, scg_async_clock_type_t divider);
85 static uint32_t CLOCK_SYS_GetSimClkOutFreq(const SIM_Type * base);
86 static uint32_t CLOCK_SYS_GetScgClkOutFreq(const SCG_Type * base);
87 static uint32_t CLOCK_SYS_GetSimRtcClkFreq(const SIM_Type * base);
90 static status_t CLOCK_SYS_ConfigureSIRC(const scg_sirc_config_t *sircConfig);
91 static status_t CLOCK_SYS_ConfigureFIRC(const scg_firc_config_t *fircConfig);
92 static status_t CLOCK_SYS_ConfigureSOSC(const scg_sosc_config_t *soscConfig);
93 static status_t CLOCK_SYS_ConfigureSPLL(const scg_spll_config_t *spllConfig);
94 
95 /*******************************************************************************
96  * Code
97  ******************************************************************************/
98 
99 
100 /*FUNCTION**********************************************************************
101  *
102  * Function Name : CLOCK_SYS_SetConfiguration
103  * Description : This function sets the system to target configuration, it
104  * only sets the clock modules registers for clock mode change, but not send
105  * notifications to drivers.
106  *
107  * Implements CLOCK_SYS_SetConfiguration_Activity
108  *END**************************************************************************/
110 {
111  status_t result;
112  DEV_ASSERT(config != NULL);
113 
114  /* Set SCG settings. */
115  result = CLOCK_SYS_SetScgConfiguration(&config->scgConfig);
116 
117  if (STATUS_SUCCESS == result)
118  {
119  /* Set PCC settings. */
121 
122  /* Set SIM settings. */
124 
125  /* Set PMC settings. */
127  }
128 
129  return result;
130 }
131 
132 /*FUNCTION**********************************************************************
133  *
134  * Function Name : CLOCK_SYS_SetScgConfiguration
135  * Description : This function configures the SCG blocks
136  *
137  * Implements CLOCK_SYS_SetScgConfiguration_Activity
138  *END**************************************************************************/
140 {
141  status_t status = STATUS_SUCCESS;
142  DEV_ASSERT(scgConfig != NULL);
143 
144  if (scgConfig != NULL)
145  {
146  /* Configure a temporary system clock source: FIRC */
148 
149  if (status == STATUS_SUCCESS)
150  {
151  /* Configure clock sources from SCG */
152  status = CLOCK_SYS_ConfigureModulesFromScg(scgConfig);
153  }
154 
155  if (status == STATUS_SUCCESS)
156  {
157  /* Configure RTC. */
158  if (scgConfig->rtcConfig.initialize )
159  {
160  /* RTC Clock settings. */
162  }
163 
164  /* Configure SCG ClockOut. */
165  if (scgConfig->clockOutConfig.initialize)
166  {
167  /* ClockOut settings. */
169  }
170 
171  /* Configure SCG clock modes. */
172  if (scgConfig->clockModeConfig.initialize)
173  {
174  /* Configure SCG clock modes */
176  if (status == STATUS_SUCCESS)
177  {
179  }
180  if (status == STATUS_SUCCESS)
181  {
183  }
184  }
185  }
186  }
187 
188  return status;
189 }
190 
191 /*FUNCTION**********************************************************************
192  *
193  * Function Name : CLOCK_SYS_SetPccConfiguration
194  * Description : This function configures the PCC block
195  *
196  * Implements CLOCK_SYS_SetPccConfiguration_Activity
197  *END**************************************************************************/
198 void CLOCK_SYS_SetPccConfiguration(const pcc_config_t *peripheralClockConfig)
199 {
200  DEV_ASSERT(peripheralClockConfig != NULL);
201  PCC_HAL_SetPeripheralClockConfig(PCC, peripheralClockConfig);
202 }
203 
204 /*FUNCTION**********************************************************************
205  *
206  * Function Name : CLOCK_SYS_SetSimConfiguration
207  * Description : This function configures the SIM block
208  *
209  * Implements CLOCK_SYS_SetSimConfiguration_Activity
210  *END**************************************************************************/
212 {
213  DEV_ASSERT(simClockConfig != NULL);
214  uint8_t i;
215 
216  /* ClockOut settings. */
217  if (simClockConfig->clockOutConfig.initialize)
218  {
219  SIM_HAL_InitClkout(SIM, &(simClockConfig->clockOutConfig));
220  }
221 
222  /* Low Power Clock settings from SIM. */
223  if (simClockConfig->lpoClockConfig.initialize)
224  {
225  SIM_HAL_SetLpoClocks(SIM, simClockConfig->lpoClockConfig);
226  }
227 
228  /* Platform Gate Clock settings. */
229  if (simClockConfig->platGateConfig.initialize)
230  {
236  }
237 
238  /* TCLK Clock settings. */
239  if (simClockConfig->tclkConfig.initialize)
240  {
241  for( i = 0; i< NUMBER_OF_TCLK_INPUTS; i++)
242  {
243  SIM_HAL_SetTClkFreq(SIM, i, simClockConfig->tclkConfig.tclkFreq[i]);
244  }
245  }
246 
247  /* Debug trace Clock settings. */
248  if (simClockConfig->traceClockConfig.initialize)
249  {
250  SIM_HAL_InitTraceClock(SIM, &(simClockConfig->traceClockConfig));
251  }
252 }
253 
254 
255 /*FUNCTION**********************************************************************
256  *
257  * Function Name : CLOCK_SYS_SetPmcConfiguration
258  * Description : This function configures the PMC block
259  *
260  * Implements CLOCK_SYS_SetPmcConfiguration_Activity
261  *END**************************************************************************/
263 {
264  DEV_ASSERT(pmcConfig != NULL);
265 
266  /* Low Power Clock settings from PMC. */
267  if (pmcConfig->lpoClockConfig.initialize)
268  {
269  /* Enable/disable the low power oscillator. */
271 
272  /* Write trimming value. */
274  }
275 }
276 
277 
278 /*FUNCTION**********************************************************************
279  *
280  * Function Name : CLOCK_SYS_GetScgClockFreq
281  * Description : This function returns the frequency of a given clock from SCG
282  *
283  *END**************************************************************************/
285  uint32_t *frequency)
286 {
287  status_t returnCode = STATUS_SUCCESS;
288  uint32_t freq = 0U;
289 
290  switch (clockName)
291  {
292  /* Main clocks */
293  case CORE_CLOCK:
295  break;
296  case BUS_CLOCK:
298  break;
299  case SLOW_CLOCK:
301  break;
302  case CLKOUT_CLOCK:
304  break;
305 
306  /* Other internal clocks used by peripherals. */
307  case SIRC_CLOCK:
308  freq = SCG_HAL_GetSircFreq(SCG);
309  break;
310  case FIRC_CLOCK:
311  freq = SCG_HAL_GetFircFreq(SCG);
312  break;
313  case SOSC_CLOCK:
314  freq = SCG_HAL_GetSysOscFreq(SCG);
315  break;
316  case SPLL_CLOCK:
317  freq = SCG_HAL_GetSysPllFreq(SCG);
318  break;
319  case RTC_CLKIN_CLOCK:
321  break;
322  case SCG_CLKOUT_CLOCK:
324  break;
325  default:
326  returnCode = STATUS_UNSUPPORTED;
327  break;
328  }
329 
330  if (frequency != NULL)
331  {
332  *frequency = freq;
333  }
334 
335  return returnCode;
336 }
337 
338 /*FUNCTION**********************************************************************
339  *
340  * Function Name : CLOCK_SYS_GetSimClockFreq
341  * Description : This function returns the frequency of a given clock from SIM
342  *
343  *END**************************************************************************/
345  uint32_t *frequency)
346 {
347  status_t returnCode = STATUS_SUCCESS;
348  uint32_t freq = 0U;
349 
350  switch (clockName)
351  {
352  /* SIM clocks */
353  case SIM_FTM0_CLOCKSEL:
355  break;
356  case SIM_FTM1_CLOCKSEL:
358  break;
359  case SIM_FTM2_CLOCKSEL:
361  break;
362  case SIM_FTM3_CLOCKSEL:
364  break;
365  case SIM_CLKOUTSELL:
367  break;
368  case SIM_RTCCLK_CLOCK:
370  break;
371  case SIM_LPO_CLOCK:
372  if (PMC_HAL_GetLpoMode(PMC))
373  {
374  freq = SIM_HAL_GetLpoFreq(SIM);
375  }
376  break;
377  case SIM_LPO_1K_CLOCK:
378  if (PMC_HAL_GetLpoMode(PMC))
379  {
380  freq = SIM_HAL_GetLpo1KFreq(SIM);
381  }
382  break;
383  case SIM_LPO_32K_CLOCK:
384  if (PMC_HAL_GetLpoMode(PMC))
385  {
386  freq = SIM_HAL_GetLpo32KFreq(SIM);
387  }
388  break;
389  case SIM_LPO_128K_CLOCK:
390  if (PMC_HAL_GetLpoMode(PMC))
391  {
392  freq = SIM_HAL_GetLpo128KFreq(SIM);
393  }
394  break;
395  case SIM_EIM_CLOCK:
397  {
398  /* EIM is not clocked. */
399  returnCode = STATUS_MCU_GATED_OFF;
400  }
401  break;
402  case SIM_ERM_CLOCK:
404  {
405  /* ERM is not clocked. */
406  returnCode = STATUS_MCU_GATED_OFF;
407  }
408  break;
409  case SIM_DMA_CLOCK:
411  {
412  /* DMA is not clocked. */
413  returnCode = STATUS_MCU_GATED_OFF;
414  }
415  break;
416  case SIM_MPU_CLOCK:
418  {
419  /* MPU is not clocked. */
420  returnCode = STATUS_MCU_GATED_OFF;
421  }
422  break;
423  case SIM_MSCM_CLOCK:
425  {
426  /* MSCM is not clocked. */
427  returnCode = STATUS_MCU_GATED_OFF;
428  }
429  break;
430  default:
431  returnCode = STATUS_UNSUPPORTED;
432  break;
433  }
434 
435  if (frequency != NULL)
436  {
437  *frequency = freq;
438  }
439 
440  return returnCode;
441 }
442 
443 /*FUNCTION**********************************************************************
444  *
445  * Function Name : CLOCK_SYS_GetPccClockFreq
446  * Description : This function returns the clock frequency of peripheral functional clock.
447  *END**************************************************************************/
449  uint32_t *frequency)
450 { bool clockMode;
451  status_t returnCode = STATUS_SUCCESS;
452  uint32_t freq = 0U;
453 
454 
455 
456  /* Invalid PCC clock names */
457  if ((clockName <= SIM_END_OF_CLOCKS) ||
458  (clockName == PCC_END_OF_BUS_CLOCKS) ||
459  (clockName == PCC_END_OF_SYS_CLOCKS) ||
460  (clockName == PCC_END_OF_SLOW_CLOCKS) ||
461  (clockName == PCC_END_OF_ASYNCH_DIV1_CLOCKS) ||
462  (clockName == PCC_END_OF_ASYNCH_DIV2_CLOCKS))
463  {
464  returnCode = STATUS_UNSUPPORTED;
465  }
466  else
467  {
468  clockMode = PCC_HAL_GetClockMode(PCC,clockName);
469  if (!clockMode)
470  {
471  /* Module is not clocked. */
472  returnCode = STATUS_MCU_GATED_OFF;
473  }
474  /* Interface clock is BUS CLOCK (peripheral is clocked by BUS CLOCK). */
475  else if (clockName < PCC_END_OF_BUS_CLOCKS)
476  {
477  /* Check whether BUS CLOCK is clocked. */
479  }
480  /* Interface clock is SYS CLOCK (peripheral is clocked by SYS CLOCK). */
481  else if (clockName < PCC_END_OF_SYS_CLOCKS)
482  {
483  /* Check whether SYS CLOCK is clocked. */
485  }
486  /* Interface clock is SLOW CLOCK (peripheral is clocked by SLOW CLOCK). */
487  else if (clockName < PCC_END_OF_SLOW_CLOCKS)
488  {
489  /* Check whether SLOW CLOCK is clocked. */
491  }
492  /* Peripheral supports functional clock that is clocked by asynchronous source 1th divider */
493  else if (clockName < PCC_END_OF_ASYNCH_DIV1_CLOCKS)
494  {
495  /* Interface clock is SYS_CLK. Check whether SYS CLOCK is clocked. */
497  {
498  /* Check whether the functional clock is clocked */
500  if (freq == 0U)
501  {
502  returnCode = STATUS_MCU_GATED_OFF;
503  }
504  }
505  else
506  {
507  returnCode = STATUS_MCU_GATED_OFF;
508  }
509  }
510  /* Peripheral supports functional clock that is clocked by asynchronous source 2nd divider */
511  else /* clockName < PCC_END_OF_ASYNCH_DIV2_CLOCKS */
512  {
513  /* Interface clock is BUS_CLK. Check whether BUS CLOCK is clocked. */
515  {
516  /* Check whether the functional clock is clocked */
518  if (freq == 0U)
519  {
520  returnCode = STATUS_MCU_GATED_OFF;
521  }
522  }
523  else
524  {
525  returnCode = STATUS_MCU_GATED_OFF;
526  }
527  }
528  }
529 
530  /* If frequency reference is provided, write this value */
531  if (frequency != NULL)
532  {
533  *frequency = freq;
534  }
535 
536  return returnCode;
537 }
538 
539 
540 
541 
542 /*FUNCTION**********************************************************************
543  *
544  * Function Name : CLOCK_SYS_GetFreq
545  * Description : This function returns the frequency of a given clock
546  *
547  * Implements CLOCK_SYS_GetFreq_Activity
548  *END**************************************************************************/
550  uint32_t *frequency)
551 {
552  status_t returnCode;
553 
554  /* Frequency of the clock name from SCG */
555  if (clockName < SCG_END_OF_CLOCKS)
556  {
557  returnCode = CLOCK_SYS_GetScgClockFreq(clockName, frequency);
558  }
559  /* Frequency of the clock name from SIM */
560  else if (clockName < SIM_END_OF_CLOCKS)
561  {
562  returnCode = CLOCK_SYS_GetSimClockFreq(clockName, frequency);
563  }
564  /* Frequency of the clock name from PCC */
565  else if (clockName < PCC_END_OF_CLOCKS)
566  {
567  returnCode = CLOCK_SYS_GetPccClockFreq(clockName, frequency);
568  }
569  /* Invalid clock name */
570  else
571  {
572  returnCode = STATUS_UNSUPPORTED;
573  }
574  return returnCode;
575 }
576 
577 /*FUNCTION**********************************************************************
578  * Function Name : CLOCK_SYS_GetPeripheralClock
579  * Description : Internal function used by CLOCK_SYS_GetFreq function
580  *END**************************************************************************/
581 
583 {
584  uint32_t frequency = 0;
585  peripheral_clock_frac_t fracValue = PCC_HAL_GetFracValueSel(PCC,clockName);
587 
588  /* Check division factor */
589  if (((uint32_t)fracValue) <= ((uint32_t)divValue))
590  {
591  /* Check clock gate */
592  if (PCC_HAL_GetClockMode(PCC,clockName))
593  {
594  /* Check clock source */
595  switch (PCC_HAL_GetClockSourceSel(PCC,clockName))
596  {
597  case CLK_SRC_SOSC:
598  frequency = SCG_HAL_GetSysOscAsyncFreq(SCG,divider);
599  break;
600  case CLK_SRC_SIRC:
601  frequency = SCG_HAL_GetSircAsyncFreq(SCG,divider);
602  break;
603  case CLK_SRC_FIRC:
604  frequency = SCG_HAL_GetFircAsyncFreq(SCG,divider);
605  break;
606  case CLK_SRC_SPLL:
607  frequency = SCG_HAL_GetSysPllAsyncFreq(SCG,divider);
608  break;
609  default:
610  frequency = 0;
611  break;
612  }
613  frequency = frequency / (((uint32_t)divValue)+1U);
614  frequency = frequency * (((uint32_t)fracValue)+1U);
615  }
616  }
617  return frequency;
618 }
619 
620 /*FUNCTION**********************************************************************
621  * Function Name : CLOCK_SYS_GetCurrentRunMode
622  * Description : Internal function used by CLOCK_SYS_SetScgConfiguration function
623  *END**************************************************************************/
625 {
627 
628  /* Read and convert from SMC run mode to SCG defines*/
629  switch (SMC_HAL_GetPowerModeStatus(smc_base))
630  {
631  /* High speed run mode */
632  case STAT_HSRUN:
634  break;
635  /* Run mode */
636  case STAT_RUN:
638  break;
639  /* Very low power run mode */
640  case STAT_VLPR:
642  break;
643  /* This should never happen - core has to be in some run mode to execute code */
644  default:
646  break;
647  }
648 
649  return mode;
650 }
651 
652 /*FUNCTION**********************************************************************
653  * Function Name : CLOCK_SYS_TransitionSystemClock
654  * Description : Internal function used by CLOCK_SYS_ConfigureTemporarySystemClock and
655  * CLOCK_SYS_ConfigureModulesFromScg functions
656  *END**************************************************************************/
658 {
660  scg_system_clock_mode_t run_mode;
661  status_t retValue = STATUS_SUCCESS;
662  uint32_t timeout;
663 
664  /* Check destination clock */
665  DEV_ASSERT(to_clk != NULL);
667 
668  /* Get & Convert Run mode from SMC to SCG defines*/
669  run_mode = CLOCK_SYS_GetCurrentRunMode(SMC);
670 
671  /* Check the current mode */
673 
674  /* Update run mode configuration */
675  retValue = SCG_HAL_SetSystemClockConfig(SCG, run_mode, to_clk);
676 
677  if (retValue == STATUS_SUCCESS)
678  {
679  /* Wait for system clock to transition. */
680  timeout = 100U;
681  do {
682  /* Read the new system clock configuration. */
684  timeout--;
685 
686  } while ((timeout > 0U) && (config.src != to_clk->src));
687 
688  if ( timeout == 0U )
689  {
690  retValue = STATUS_TIMEOUT;
691  }
692  }
693 
694  return retValue;
695 }
696 /*FUNCTION**********************************************************************
697  * Function Name : CLOCK_SYS_GetSimClkOutFreq
698  * Description : Internal function used by CLOCK_SYS_GetFreq function
699  *END**************************************************************************/
700 static uint32_t CLOCK_SYS_GetSimClkOutFreq(const SIM_Type * base)
701 {
702  uint32_t frequency;
703 
704  /* Check CLKOUT Select */
705  sim_clock_out_config_t sim_clkout_config;
706  SIM_HAL_GetClkoutConfig(base, &sim_clkout_config);
707 
708  if (sim_clkout_config.enable)
709  {
710  switch (sim_clkout_config.source)
711  {
713  frequency = CLOCK_SYS_GetScgClkOutFreq(SCG);
714  break;
717  break;
720  break;
723  break;
726  break;
728  frequency = SIM_HAL_GetLpo128KFreq(SIM);
729  break;
731  frequency = SIM_HAL_GetLpoFreq(SIM);;
732  break;
734  frequency = CLOCK_SYS_GetSimRtcClkFreq(SIM);
735  break;
736  default:
737  /* Invalid SIM CLKOUT selection.*/
738  frequency = 0U;
739  break;
740  }
741 
742  /* Apply Divide Ratio */
743  frequency /= (((uint32_t)sim_clkout_config.divider) + 1U);
744  }
745  else
746  {
747  /* Output disabled. */
748  frequency = 0U;
749  }
750 
751  return frequency;
752 }
753 /*FUNCTION**********************************************************************
754  * Function Name : CLOCK_SYS_GetScgClkOutFreq
755  * Description : Internal function used by CLOCK_SYS_GetFreq function
756  *END**************************************************************************/
757 static uint32_t CLOCK_SYS_GetScgClkOutFreq(const SCG_Type * base)
758 {
759  uint32_t frequency;
760 
761  switch (SCG_HAL_GetClockoutSourceSel(base))
762  {
765  break;
767  frequency = SCG_HAL_GetSysOscFreq(SCG);
768  break;
770  frequency = SCG_HAL_GetSircFreq(SCG);
771  break;
773  frequency = SCG_HAL_GetFircFreq(SCG);
774  break;
776  frequency = SCG_HAL_GetSysPllFreq(SCG);
777  break;
778  default:
779  /* Invalid SCG CLKOUT selection.*/
780  frequency = 0U;
781  break;
782  }
783 
784  return frequency;
785 }
786 
787 /*FUNCTION**********************************************************************
788  * Function Name : CLOCK_SYS_GetSimRtcClkFreq
789  * Description : Internal function used by CLOCK_SYS_GetFreq function
790  *END**************************************************************************/
791 static uint32_t CLOCK_SYS_GetSimRtcClkFreq(const SIM_Type * base)
792 {
793  uint32_t frequency;
794 
795  /* Check RTCCLK Select */
796  switch (SIM_HAL_GetRtcClkSrc(base))
797  {
800  break;
802  frequency = SIM_HAL_GetLpo32KFreq(SIM);
803  break;
805  frequency = SCG_HAL_GetRtcClkInFreq(SCG);
806  break;
809  break;
810  default:
811  /* Invalid RTCCLK selection.*/
812  frequency = 0U;
813  break;
814  }
815 
816  return frequency;
817 }
818 
819 /*FUNCTION**********************************************************************
820  * Function Name : CLOCK_SYS_ConfigureSIRC
821  * Description : Configures SIRC module based on provided configuration.
822  *END**************************************************************************/
824 {
825  status_t status = STATUS_SUCCESS;
826  scg_sirc_config_t sircDefaultConfig;
827  const scg_sirc_config_t *sircCfg;
828  uint32_t timeout;
829 
830  if (sircConfig == NULL)
831  {
832  SCG_HAL_GetSircDefaultConfig(&sircDefaultConfig);
833  sircCfg = &sircDefaultConfig;
834  }
835  else
836  {
837  sircCfg = sircConfig;
838  }
839 
840  /* Disable SIRC */
841  status = SCG_HAL_DeinitSirc(SCG);
842 
843  /* Configure SIRC. */
844  if (sircCfg->initialize && (status == STATUS_SUCCESS))
845  {
846  /* Setup SIRC. */
847  status = SCG_HAL_InitSirc(SCG, sircCfg);
848 
849  if (status == STATUS_SUCCESS)
850  {
851  /* Wait for SIRC to initialize */
852  timeout = SIRC_STABILIZATION_TIMEOUT;
853  while((SCG_HAL_GetSircFreq(SCG) == 0U) && (timeout > 0U))
854  {
855  timeout--;
856  }
857  if (timeout == 0U)
858  {
859  status = STATUS_TIMEOUT;
860  }
861  }
862  }
863 
864  return status;
865 }
866 
867 
868 /*FUNCTION**********************************************************************
869  * Function Name : CLOCK_SYS_ConfigureFIRC
870  * Description : Configures FIRC module based on provided configuration.
871  *END**************************************************************************/
873 {
874  status_t status = STATUS_SUCCESS;
875  scg_firc_config_t fircDefaultConfig;
876  const scg_firc_config_t *fircCfg;
877  uint32_t timeout;
878 
879  if (fircConfig == NULL)
880  {
881  SCG_HAL_GetFircDefaultConfig(&fircDefaultConfig);
882  fircCfg = &fircDefaultConfig;
883  }
884  else
885  {
886  fircCfg = fircConfig;
887  }
888 
889 
890  /* Disable FIRC */
891  status = SCG_HAL_DeinitFirc(SCG);
892 
893  /* Configure FIRC. */
894  if (fircCfg->initialize && (status == STATUS_SUCCESS))
895  {
896  /* Setup FIRC. */
897  status = SCG_HAL_InitFirc(SCG, fircCfg);
898  if (status == STATUS_SUCCESS)
899  {
900  /* Wait for FIRC to initialize */
901  timeout = FIRC_STABILIZATION_TIMEOUT;
902  while((SCG_HAL_GetFircFreq(SCG) == 0U) && (timeout > 0U))
903  {
904  timeout--;
905  }
906  if (timeout == 0U)
907  {
908  status = STATUS_TIMEOUT;
909  }
910  }
911  }
912 
913  return status;
914 }
915 
916 
917 /*FUNCTION**********************************************************************
918  * Function Name : CLOCK_SYS_ConfigureSOSC
919  * Description : Configures SOSC module based on provided configuration.
920  *END**************************************************************************/
922 {
923  status_t status = STATUS_SUCCESS;
924  scg_sosc_config_t soscDefaultConfig;
925  const scg_sosc_config_t *soscCfg;
926  uint32_t timeout;
927 
928  if (soscConfig == NULL)
929  {
930  SCG_HAL_GetSysOscDefaultConfig(&soscDefaultConfig);
931  soscCfg = &soscDefaultConfig;
932  }
933  else
934  {
935  soscCfg = soscConfig;
936  }
937 
938  /* Disable SOSC */
939  status = SCG_HAL_DeinitSysOsc(SCG);
940 
941  /* Configure SOSC. */
942  if (soscCfg->initialize && (status == STATUS_SUCCESS))
943  {
944  /* Setup SOSC. */
945  status = SCG_HAL_InitSysOsc(SCG, soscCfg);
946  if (status == STATUS_SUCCESS)
947  {
948  /* Wait for System OSC to initialize */
949  timeout = SOSC_STABILIZATION_TIMEOUT;
950  while((SCG_HAL_GetSysOscFreq(SCG) == 0U) && (timeout > 0U))
951  {
952  timeout--;
953  }
954  if (timeout == 0U)
955  {
956  status = STATUS_TIMEOUT;
957  }
958  }
959  }
960 
961  return status;
962 }
963 
964 
965 /*FUNCTION**********************************************************************
966  * Function Name : CLOCK_SYS_ConfigureSPLL
967  * Description : Configures SPLL module based on provided configuration.
968  *END**************************************************************************/
970 {
971  status_t status = STATUS_SUCCESS;
972  scg_spll_config_t spllDefaultConfig;
973  const scg_spll_config_t *spllCfg;
974  uint32_t timeout;
975 
976  if (spllConfig == NULL)
977  {
978  SCG_HAL_GetSysPllDefaultConfig(&spllDefaultConfig);
979  spllCfg = &spllDefaultConfig;
980  }
981  else
982  {
983  spllCfg = spllConfig;
984  }
985 
986  /* Disable the SPLL. */
987  status = SCG_HAL_DeinitSysPll(SCG);
988 
989  /* Configure SPLL. */
990  if (spllCfg->initialize && (status == STATUS_SUCCESS))
991  {
992  /* Setup SPLL. */
993  status = SCG_HAL_InitSysPll(SCG, spllCfg);
994 
995  if (status == STATUS_SUCCESS)
996  {
997  /* Wait for System PLL to initialize */
998  timeout = SPLL_STABILIZATION_TIMEOUT;
999  while((SCG_HAL_GetSysPllFreq(SCG) == 0U) && (timeout > 0U))
1000  {
1001  timeout--;
1002  }
1003  if (timeout == 0U)
1004  {
1005  status = STATUS_TIMEOUT;
1006  }
1007  }
1008 
1009 
1010  }
1011 
1012  return status;
1013 }
1014 
1015 /*FUNCTION**********************************************************************
1016  * Function Name : CLOCK_SYS_ConfigureTemporarySystemClock
1017  * Description : Configures and transitions to a temporary system clock source: FIRC
1018  *END**************************************************************************/
1020 {
1021  status_t status = STATUS_SUCCESS;
1022  scg_system_clock_config_t current_config, sysClockConfig;
1024 
1025  /* Get CURRENT mode configuration. */
1027 
1028 
1029  /* If the current system clock source is not FIRC:
1030  * 1. Enable FIRC (if it's not enabled)
1031  * 2. Switch to FIRC.
1032  */
1033  if (current_config.src != SCG_SYSTEM_CLOCK_SRC_FIRC)
1034  {
1035  /* If FIRC is not on, then FIRC is configured
1036  * with the default configuration */
1037  if (SCG_HAL_GetFircFreq(SCG) == 0UL)
1038  {
1039  status = CLOCK_SYS_ConfigureFIRC(NULL);
1040  }
1041 
1042  /* FIRC is enabled, transition the system clock source to FIRC. */
1043  if (status == STATUS_SUCCESS)
1044  {
1045  sysClockConfig.src = SCG_SYSTEM_CLOCK_SRC_FIRC;
1046  sysClockConfig.divCore = tmpSysClk[TMP_FIRC_CLK][TMP_SYS_DIV];
1047  sysClockConfig.divBus = tmpSysClk[TMP_FIRC_CLK][TMP_BUS_DIV];
1048  sysClockConfig.divSlow = tmpSysClk[TMP_FIRC_CLK][TMP_SLOW_DIV];
1049  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1050  }
1051  }
1052  return status;
1053 }
1054 
1055 /*FUNCTION**********************************************************************
1056  * Function Name : CLOCK_SYS_ConfigureModulesFromScg
1057  * Description : Configures all modules from SCG (SIRC, FIRC, SOSC and SPLL)
1058  *END**************************************************************************/
1060 {
1061  status_t status = STATUS_SUCCESS;
1062  scg_system_clock_config_t sysClockConfig;
1063  const scg_system_clock_config_t * nextSysClockConfig;
1065 
1066  /* Configure all clock sources that are different from the
1067  * current system clock source FIRC (SIRC, SOSC, SPLL). */
1068  status = CLOCK_SYS_ConfigureSIRC(&scgConfig->sircConfig);
1069  if (status == STATUS_SUCCESS)
1070  {
1071  status = CLOCK_SYS_ConfigureSOSC(&scgConfig->soscConfig);
1072  if (status == STATUS_SUCCESS)
1073  {
1074  status = CLOCK_SYS_ConfigureSPLL(&scgConfig->spllConfig);
1075  }
1076  }
1077 
1078  /* Get the next system clock source */
1080  {
1082  {
1083  nextSysClockConfig = &scgConfig->clockModeConfig.rccrConfig;
1084  }
1085  break;
1087  {
1088  nextSysClockConfig = &scgConfig->clockModeConfig.vccrConfig;
1089  }
1090  break;
1092  {
1093  nextSysClockConfig = &scgConfig->clockModeConfig.hccrConfig;
1094  }
1095  break;
1096  default:
1097  DEV_ASSERT(false);
1098  nextSysClockConfig = NULL;
1099  break;
1100  }
1101 
1102  if (status == STATUS_SUCCESS)
1103  {
1104  /* The current system clock source is FIRC.
1105  * Verify whether the next system clock source is FIRC. */
1106  if (nextSysClockConfig->src == SCG_SYSTEM_CLOCK_SRC_FIRC)
1107  {
1108  /* If they are the same, search for a temporary system clock source
1109  * (use one of the following sources: SPLL, SOSC, SIRC)
1110  * Assume that a temporary clock is not found status = ERROR. */
1111  status = STATUS_ERROR;
1112 
1113  /* SPLL is enabled */
1114  if (scgConfig->spllConfig.initialize /* && (status == STATUS_ERROR) */)
1115  {
1116  sysClockConfig.src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL;
1117  sysClockConfig.divCore = tmpSysClk[TMP_SPLL_CLK][TMP_SYS_DIV];
1118  sysClockConfig.divBus = tmpSysClk[TMP_SPLL_CLK][TMP_BUS_DIV];
1119  sysClockConfig.divSlow = tmpSysClk[TMP_SPLL_CLK][TMP_SLOW_DIV];
1120  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1121  }
1122 
1123  /* SOSC is enabled and SPLL configuration for system clock source is not valid */
1124  if (scgConfig->soscConfig.initialize && (status == STATUS_ERROR))
1125  {
1126  sysClockConfig.src = SCG_SYSTEM_CLOCK_SRC_SYS_OSC;
1127  sysClockConfig.divCore = tmpSysClk[TMP_SOSC_CLK][TMP_SYS_DIV];
1128  sysClockConfig.divBus = tmpSysClk[TMP_SOSC_CLK][TMP_BUS_DIV];
1129  sysClockConfig.divSlow = tmpSysClk[TMP_SOSC_CLK][TMP_SLOW_DIV];
1130  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1131  }
1132 
1133  /* SIRC is enabled and SOSC configuration for system clock source is not valid */
1134  if (scgConfig->sircConfig.initialize && (status == STATUS_ERROR))
1135  {
1136  sysClockConfig.src = SCG_SYSTEM_CLOCK_SRC_SIRC;
1137  sysClockConfig.divCore = tmpSysClk[TMP_SIRC_CLK][TMP_SYS_DIV];
1138  sysClockConfig.divBus = tmpSysClk[TMP_SIRC_CLK][TMP_BUS_DIV];
1139  sysClockConfig.divSlow = tmpSysClk[TMP_SIRC_CLK][TMP_SLOW_DIV];
1140  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1141  }
1142 
1143  /* Transitioned to a temporary system clock source. */
1144  if (status == STATUS_SUCCESS)
1145  {
1146  /* Configure the remaining clock source (FIRC). */
1147  status = CLOCK_SYS_ConfigureFIRC(&scgConfig->fircConfig);
1148 
1149  if (status == STATUS_SUCCESS)
1150  {
1151  /* Transition to the next system clock source. */
1152  sysClockConfig.src = nextSysClockConfig->src;
1153  sysClockConfig.divCore = nextSysClockConfig->divCore;
1154  sysClockConfig.divBus = nextSysClockConfig->divBus;
1155  sysClockConfig.divSlow = nextSysClockConfig->divSlow;
1156  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1157  }
1158  }
1159  }
1160  else
1161  { /* Transition to the next system clock source. */
1162  sysClockConfig.src = nextSysClockConfig->src;
1163  sysClockConfig.divCore = nextSysClockConfig->divCore;
1164  sysClockConfig.divBus = nextSysClockConfig->divBus;
1165  sysClockConfig.divSlow = nextSysClockConfig->divSlow;
1166  status = CLOCK_SYS_TransitionSystemClock(&sysClockConfig);
1167 
1168  if (status == STATUS_SUCCESS)
1169  {
1170  /* Configure the remaining clock source (FIRC) */
1171  status = CLOCK_SYS_ConfigureFIRC(&scgConfig->fircConfig);
1172  }
1173  }
1174  }
1175 
1176  return status;
1177 }
1178 
1179 
1180 
1181 /*******************************************************************************
1182  * EOF
1183  ******************************************************************************/
status_t SCG_HAL_InitSirc(SCG_Type *base, const scg_sirc_config_t *config)
Initialize SCG slow IRC clock.
static void SIM_HAL_SetDmaClockGate(SIM_Type *base, bool enable)
Set the DMA Clock Gate from the Platform Clock Gating Control Register.
uint32_t SIM_HAL_GetLpo1KFreq(const SIM_Type *base)
Get SIM LPO 1KHz clock frequency (LPO_1K_CLOCK).
static status_t CLOCK_SYS_GetSimClockFreq(clock_names_t clockName, uint32_t *frequency)
void SCG_HAL_GetSystemClockConfig(const SCG_Type *base, scg_system_clock_mode_t mode, scg_system_clock_config_t *config)
Get the system clock configuration for specified mode.
#define SMC
Definition: S32K144.h:11066
status_t SCG_HAL_InitSysOsc(SCG_Type *base, scg_sosc_config_t const *config)
Initialize SCG system OSC.
static bool SIM_HAL_GetDmaClockGate(const SIM_Type *base)
Gets the DMA Clock Gate from the Platform Clock Gating Control Register.
sim_tclk_config_t tclkConfig
static void SIM_HAL_SetTClkFreq(SIM_Type *base, uint8_t index, uint32_t frequency)
Sets the TClk Frequency.
scg_system_clock_mode_t
SCG system clock modes. Implements scg_system_clock_mode_t_Class.
Definition: scg_hal.h:87
scg_rtc_config_t rtcConfig
Definition: scg_hal.h:384
status_t CLOCK_SYS_SetScgConfiguration(const scg_config_t *scgConfig)
Configures SCG module.
status_t SCG_HAL_DeinitFirc(SCG_Type *base)
De-initialize SCG fast IRC.
#define TMP_SYS_CLK_NO
uint32_t SCG_HAL_GetRtcClkInFreq(SCG_Type *base)
Get SCG RTC CLKIN clock frequency.
void SCG_HAL_SetRtcClkInFreq(SCG_Type *base, uint32_t frequency)
Set SCG RTC CLKIN clock frequency.
status_t SCG_HAL_InitFirc(SCG_Type *base, const scg_firc_config_t *config)
Initialize SCG fast IRC clock.
uint32_t SCG_HAL_GetFircFreq(const SCG_Type *base)
Get SCG FIRC clock frequency.
#define TMP_SYS_DIV
SCG configure structure. Implements scg_config_t_Class.
Definition: scg_hal.h:378
#define SIM
Definition: S32K144.h:10739
scg_system_clock_config_t vccrConfig
Definition: scg_hal.h:358
static bool SIM_HAL_GetMpuClockGate(const SIM_Type *base)
Gets the MPU Clock Gating from the Platform Clock Gating Control Register.
sim_ftm_clk_sel_t SIM_HAL_GetFtmExternalClkPinMode(const SIM_Type *base, uint32_t instance)
Gets the FlexTimer x external clock pin select setting.
uint32_t g_TClkFreq[NUMBER_OF_TCLK_INPUTS]
Definition: clock_S32K144.c:67
void SIM_HAL_GetClkoutConfig(const SIM_Type *base, sim_clock_out_config_t *config)
Get the SIM CLKOUT clock configuration.
uint32_t rtcClkInFreq
Definition: scg_hal.h:347
static peripheral_clock_divider_t PCC_HAL_GetDividerSel(const PCC_Type *const base, const clock_names_t clockName)
Gets the selection of the divider value for a specific peripheral.
Definition: pcc_hal.h:518
SIM configure structure. Implements sim_clock_config_t_Class.
void SCG_HAL_GetSircDefaultConfig(scg_sirc_config_t *config)
Get the default slow IRC clock configuration.
uint32_t tclkFreq[NUMBER_OF_TCLK_INPUTS]
static sim_rtc_clk_sel_src_t SIM_HAL_GetRtcClkSrc(const SIM_Type *base)
Get the clock selection of RTCCLKSEL.
static status_t CLOCK_SYS_GetScgClockFreq(clock_names_t clockName, uint32_t *frequency)
static bool SIM_HAL_GetEimClockGate(const SIM_Type *base)
Gets the EIM Clock Gate from the Platform Clock Gating Control Register.
scg_firc_config_t fircConfig
Definition: scg_hal.h:381
static power_mode_stat_t SMC_HAL_GetPowerModeStatus(const SMC_Type *const baseAddr)
Gets the current power mode stat.
Definition: smc_hal.h:510
sim_clkout_div_t divider
status_t SCG_HAL_DeinitSirc(SCG_Type *base)
De-initialize SCG slow IRC.
scg_sosc_config_t soscConfig
Definition: scg_hal.h:382
#define PMC
Definition: S32K144.h:8447
static void SIM_HAL_SetMpuClockGate(SIM_Type *base, bool enable)
Configure the MPU Clock Gating from the Platform Clock Gating Control Register.
static bool SIM_HAL_GetErmClockGate(const SIM_Type *base)
Gets the ERM Clock Gate from the Platform Clock Gating Control Register.
sim_trace_clock_config_t traceClockConfig
uint32_t SCG_HAL_GetSysOscAsyncFreq(const SCG_Type *base, scg_async_clock_type_t type)
Get SCG asynchronous clock frequency from system OSC.
void SCG_HAL_GetSysPllDefaultConfig(scg_spll_config_t *config)
Get the default system PLL configuration.
#define SPLL_STABILIZATION_TIMEOUT
uint32_t SCG_HAL_GetSircFreq(const SCG_Type *base)
Get SCG SIRC clock frequency.
uint32_t SIM_HAL_GetLpoFreq(const SIM_Type *base)
Get SIM LPO clock frequency (LPO_CLOCK).
#define DEV_ASSERT(x)
Definition: devassert.h:78
uint32_t SCG_HAL_GetSysOscFreq(const SCG_Type *base)
Get SCG system OSC clock frequency (SYSOSC).
#define TMP_SIRC_CLK
Temporary system clock source configurations. Each line represents the SYS(CORE), BUS and SLOW(FLASH)...
#define NUMBER_OF_TCLK_INPUTS
#define TMP_SYS_DIV_NO
SCG system PLL configuration. Implements scg_spll_config_t_Class.
Definition: scg_hal.h:324
SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class.
Definition: scg_hal.h:262
#define TMP_FIRC_CLK
SCG fast IRC clock configuration. Implements scg_firc_config_t_Class.
Definition: scg_hal.h:292
sim_plat_gate_config_t platGateConfig
status_t CLOCK_SYS_SetConfiguration(clock_manager_user_config_t const *config)
Set system clock configuration.
static status_t CLOCK_SYS_ConfigureSPLL(const scg_spll_config_t *spllConfig)
scg_clockout_config_t clockOutConfig
Definition: scg_hal.h:385
#define PCC
Definition: S32K144.h:8141
static scg_system_clock_mode_t CLOCK_SYS_GetCurrentRunMode(const SMC_Type *smc_base)
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
status_t SCG_HAL_DeinitSysPll(SCG_Type *base)
De-initialize SCG system PLL.
status_t SCG_HAL_SetSystemClockConfig(SCG_Type *base, scg_system_clock_mode_t mode, scg_system_clock_config_t const *config)
Set the system clock configuration in specified mode.
static void SIM_HAL_SetMscmClockGate(SIM_Type *base, bool enable)
Configure the MSCM Clock Gating from the Platform Clock Gating Control Register.
sim_clkout_src_t source
scg_spll_config_t spllConfig
Definition: scg_hal.h:383
scg_clockout_src_t source
Definition: scg_hal.h:370
#define SOSC_STABILIZATION_TIMEOUT
scg_clock_mode_config_t clockModeConfig
Definition: scg_hal.h:386
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
scg_sirc_config_t sircConfig
Definition: scg_hal.h:380
pmc_lpo_clock_config_t lpoClockConfig
Definition: pmc_hal.h:72
static bool PCC_HAL_GetClockMode(const PCC_Type *const base, const clock_names_t clockName)
Gets the clock gate control mode.
Definition: pcc_hal.h:405
void SCG_HAL_GetFircDefaultConfig(scg_firc_config_t *config)
Get the default fast IRC clock configuration.
static status_t CLOCK_SYS_ConfigureFIRC(const scg_firc_config_t *fircConfig)
SCG system clock configuration. Implements scg_system_clock_config_t_Class.
Definition: scg_hal.h:124
uint32_t SCG_HAL_GetSysPllAsyncFreq(const SCG_Type *base, scg_async_clock_type_t type)
Get SCG asynchronous clock frequency from system PLL.
#define TMP_BUS_DIV
void CLOCK_SYS_SetSimConfiguration(const sim_clock_config_t *simClockConfig)
Configures SIM module.
sim_clock_config_t simConfig
Definition: clock_manager.h:70
scg_system_clock_div_t divCore
Definition: scg_hal.h:128
scg_system_clock_div_t divSlow
Definition: scg_hal.h:126
peripheral_clock_divider_t
PCC divider value select Implements peripheral_clock_divider_t_Class.
Definition: pcc_hal.h:141
status_t SCG_HAL_InitSysPll(SCG_Type *base, scg_spll_config_t const *config)
Initialize SCG system PLL.
sim_clock_out_config_t clockOutConfig
status_t SCG_HAL_DeinitSysOsc(SCG_Type *base)
De-initialize SCG system OSC.
clock_names_t
Clock names.
scg_async_clock_type_t
SCG asynchronous clock type. Implements scg_async_clock_type_t_Class.
Definition: scg_hal.h:156
uint32_t SIM_HAL_GetLpo128KFreq(const SIM_Type *base)
Get SIM LPO 128KHz clock frequency (LPO_128K_CLOCK).
static status_t CLOCK_SYS_ConfigureModulesFromScg(const scg_config_t *scgConfig)
static status_t CLOCK_SYS_ConfigureTemporarySystemClock(void)
static void SIM_HAL_SetLpoClocks(SIM_Type *base, sim_lpo_clock_config_t setting)
Set the clock selection of LPOCLKSEL.
static uint32_t CLOCK_SYS_GetSimClkOutFreq(const SIM_Type *base)
static void SIM_HAL_SetErmClockGate(SIM_Type *base, bool enable)
Set the ERM Clock Gate from the Platform Clock Gating Control Register.
static void PMC_HAL_SetLpoTrimValue(PMC_Type *const baseAddr, const int8_t decimalValue)
Low Power Oscillator Trimming Value.
Definition: pmc_hal.h:254
#define SCG
Definition: S32K144.h:10398
uint32_t SCG_HAL_GetSysPllFreq(const SCG_Type *base)
Get SCG system PLL clock frequency.
static peripheral_clock_source_t PCC_HAL_GetClockSourceSel(const PCC_Type *const base, const clock_names_t clockName)
Gets the selection of a clock source for a specific peripheral.
Definition: pcc_hal.h:431
static status_t CLOCK_SYS_TransitionSystemClock(const scg_system_clock_config_t *to_clk)
uint32_t SCG_HAL_GetSircAsyncFreq(const SCG_Type *base, scg_async_clock_type_t type)
Get SCG asynchronous clock frequency from SIRC.
static status_t CLOCK_SYS_ConfigureSOSC(const scg_sosc_config_t *soscConfig)
static peripheral_clock_frac_t PCC_HAL_GetFracValueSel(const PCC_Type *const base, const clock_names_t clockName)
Gets the selection of the fractional value for a specific peripheral.
Definition: pcc_hal.h:476
SIM ClockOut configuration. Implements sim_clock_out_config_t_Class.
static uint32_t SIM_HAL_GetTClkFreq(SIM_Type *base, uint8_t index)
Gets the TClk Frequency.
SCG system OSC configuration. Implements scg_sosc_config_t_Class.
Definition: scg_hal.h:226
static void SIM_HAL_SetEimClockGate(SIM_Type *base, bool enable)
Set the EIM Clock Gate from the Platform Clock Gating Control Register.
void SIM_HAL_InitTraceClock(SIM_Type *base, const sim_trace_clock_config_t *config)
Initialize SIM Debug Trace.
sim_lpo_clock_config_t lpoClockConfig
uint32_t g_xtal0ClkFreq
Definition: clock_S32K144.c:73
PMC configure structure.
Definition: pmc_hal.h:70
static status_t CLOCK_SYS_GetPccClockFreq(clock_names_t clockName, uint32_t *frequency)
static status_t CLOCK_SYS_ConfigureSIRC(const scg_sirc_config_t *sircConfig)
scg_system_clock_div_t
SCG system clock divider value. Implements scg_system_clock_div_t_Class.
Definition: scg_hal.h:100
void SCG_HAL_GetSysOscDefaultConfig(scg_sosc_config_t *config)
Get the default system OSC configuration.
scg_system_clock_config_t rccrConfig
Definition: scg_hal.h:357
#define TMP_SYSTEM_CLOCK_CONFIGS
scg_system_clock_src_t src
Definition: scg_hal.h:129
void CLOCK_SYS_SetPmcConfiguration(const pmc_config_t *pmcConfig)
Configures PMC module.
Clock configuration structure. Implements clock_manager_user_config_t_Class.
Definition: clock_manager.h:66
static uint32_t CLOCK_SYS_GetScgClkOutFreq(const SCG_Type *base)
#define FIRC_STABILIZATION_TIMEOUT
static uint32_t CLOCK_SYS_GetSimRtcClkFreq(const SIM_Type *base)
static scg_clockout_src_t SCG_HAL_GetClockoutSourceSel(const SCG_Type *base)
Get SCG ClockOut source select.
Definition: scg_hal.h:447
uint32_t SCG_HAL_GetFircAsyncFreq(const SCG_Type *base, scg_async_clock_type_t type)
Get SCG asynchronous clock frequency from FIRC.
void CLOCK_SYS_SetPccConfiguration(const pcc_config_t *peripheralClockConfig)
Configures PCC module.
static bool SIM_HAL_GetMscmClockGate(const SIM_Type *base)
Gets the MSCM Clock Gating from the Platform Clock Gating Control Register.
#define TMP_SPLL_CLK
void PCC_HAL_SetPeripheralClockConfig(PCC_Type *const base, const pcc_config_t *const config)
Set the peripheral clock configuration.
Definition: pcc_hal.c:56
uint32_t SIM_HAL_GetLpo32KFreq(const SIM_Type *base)
Get SIM LPO 32KHz clock frequency (LPO_32K_CLOCK).
void SIM_HAL_InitClkout(SIM_Type *base, const sim_clock_out_config_t *config)
Initialize SIM CLKOUT.
uint32_t g_RtcClkInFreq
Definition: clock_S32K144.c:70
static void SCG_HAL_SetClockoutSourceSel(SCG_Type *base, scg_clockout_src_t source)
Set SCG ClockOut source select.
Definition: scg_hal.h:485
uint32_t SCG_HAL_GetSystemClockFreq(const SCG_Type *base, scg_system_clock_type_t type)
Get SCG system clock frequency.
scg_system_clock_config_t hccrConfig
Definition: scg_hal.h:359
static bool PMC_HAL_GetLpoMode(const PMC_Type *const baseAddr)
Gets the Low Power Oscillator status.
Definition: pmc_hal.h:199
#define SIRC_STABILIZATION_TIMEOUT
#define TMP_SOSC_CLK
#define TMP_SLOW_DIV
peripheral_clock_frac_t
PCC fractional value select Implements peripheral_clock_frac_t_Class.
Definition: pcc_hal.h:131
static void PMC_HAL_SetLpoMode(PMC_Type *const baseAddr, const bool enable)
Enables/Disables the Low Power Oscillator.
Definition: pmc_hal.h:179
scg_system_clock_div_t divBus
Definition: scg_hal.h:127
static uint32_t CLOCK_SYS_GetPeripheralClock(clock_names_t clockName, scg_async_clock_type_t divider)
PCC configuration. Implements pcc_config_t_Class.
Definition: pcc_hal.h:176