S32 SDK
scg_sirc_config_t Struct Reference

SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class. More...

#include <scg_hal.h>

Data Fields

scg_sirc_range_t range
 
scg_async_clock_div_t div1
 
scg_async_clock_div_t div2
 
bool initialize
 
bool enableInStop
 
bool enableInLowPower
 
bool locked
 

Detailed Description

SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class.

Definition at line 262 of file scg_hal.h.

Field Documentation

Divider for platform asynchronous clock.

Definition at line 266 of file scg_hal.h.

Divider for bus asynchronous clock.

Definition at line 267 of file scg_hal.h.

bool enableInLowPower

SIRC is enable or not in low power mode.

Definition at line 271 of file scg_hal.h.

bool enableInStop

SIRC is enable or not in stop mode.

Definition at line 270 of file scg_hal.h.

bool initialize

Initialize or not the SIRC module.

Definition at line 269 of file scg_hal.h.

bool locked

SIRC Control Register can be written.

Definition at line 273 of file scg_hal.h.

Slow IRC frequency range.

Definition at line 264 of file scg_hal.h.


The documentation for this struct was generated from the following file: