S32 SDK

#include <S32K144.h>

Data Fields

__IO uint32_t CR
 
__I uint32_t ES
 
uint8_t RESERVED_0 [4]
 
__IO uint32_t ERQ
 
uint8_t RESERVED_1 [4]
 
__IO uint32_t EEI
 
__O uint8_t CEEI
 
__O uint8_t SEEI
 
__O uint8_t CERQ
 
__O uint8_t SERQ
 
__O uint8_t CDNE
 
__O uint8_t SSRT
 
__O uint8_t CERR
 
__O uint8_t CINT
 
uint8_t RESERVED_2 [4]
 
__IO uint32_t INT
 
uint8_t RESERVED_3 [4]
 
__IO uint32_t ERR
 
uint8_t RESERVED_4 [4]
 
__I uint32_t HRS
 
uint8_t RESERVED_5 [12]
 
__IO uint32_t EARS
 
uint8_t RESERVED_6 [184]
 
__IO uint8_t DCHPRI [DMA_DCHPRI_COUNT]
 
uint8_t RESERVED_7 [3824]
 
struct {
   __IO uint32_t   SADDR
 
   __IO uint16_t   SOFF
 
   __IO uint16_t   ATTR
 
   union {
      __IO uint32_t   MLNO
 
      __IO uint32_t   MLOFFNO
 
      __IO uint32_t   MLOFFYES
 
   }   NBYTES
 
   __IO uint32_t   SLAST
 
   __IO uint32_t   DADDR
 
   __IO uint16_t   DOFF
 
   union {
      __IO uint16_t   ELINKNO
 
      __IO uint16_t   ELINKYES
 
   }   CITER
 
   __IO uint32_t   DLASTSGA
 
   __IO uint16_t   CSR
 
   union {
      __IO uint16_t   ELINKNO
 
      __IO uint16_t   ELINKYES
 
   }   BITER
 
TCD [DMA_TCD_COUNT]
 

Detailed Description

DMA - Register Layout Typedef

Definition at line 2246 of file S32K144.h.

Field Documentation

__IO uint16_t ATTR

TCD Transfer Attributes, array offset: 0x1006, array step: 0x20

Definition at line 2275 of file S32K144.h.

union { ... } BITER
__O uint8_t CDNE

Clear DONE Status Bit Register, offset: 0x1C

Definition at line 2257 of file S32K144.h.

__O uint8_t CEEI

Clear Enable Error Interrupt Register, offset: 0x18

Definition at line 2253 of file S32K144.h.

__O uint8_t CERQ

Clear Enable Request Register, offset: 0x1A

Definition at line 2255 of file S32K144.h.

__O uint8_t CERR

Clear Error Register, offset: 0x1E

Definition at line 2259 of file S32K144.h.

__O uint8_t CINT

Clear Interrupt Request Register, offset: 0x1F

Definition at line 2260 of file S32K144.h.

union { ... } CITER
__IO uint32_t CR

Control Register, offset: 0x0

Definition at line 2247 of file S32K144.h.

__IO uint16_t CSR

TCD Control and Status, array offset: 0x101C, array step: 0x20

Definition at line 2289 of file S32K144.h.

__IO uint32_t DADDR

TCD Destination Address, array offset: 0x1010, array step: 0x20

Definition at line 2282 of file S32K144.h.

__IO uint8_t DCHPRI[DMA_DCHPRI_COUNT]

Channel n Priority Register, array offset: 0x100, array step: 0x1

Definition at line 2270 of file S32K144.h.

__IO uint32_t DLASTSGA

TCD Last Destination Address Adjustment/Scatter Gather Address, array offset: 0x1018, array step: 0x20

Definition at line 2288 of file S32K144.h.

__IO uint16_t DOFF

TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20

Definition at line 2283 of file S32K144.h.

__IO uint32_t EARS

Enable Asynchronous Request in Stop Register, offset: 0x44

Definition at line 2268 of file S32K144.h.

__IO uint32_t EEI

Enable Error Interrupt Register, offset: 0x14

Definition at line 2252 of file S32K144.h.

__IO uint16_t ELINKNO

TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x1016, array step: 0x20

TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x101E, array step: 0x20

Definition at line 2285 of file S32K144.h.

__IO uint16_t ELINKYES

TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x1016, array step: 0x20

TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x101E, array step: 0x20

Definition at line 2286 of file S32K144.h.

__IO uint32_t ERQ

Enable Request Register, offset: 0xC

Definition at line 2250 of file S32K144.h.

__IO uint32_t ERR

Error Register, offset: 0x2C

Definition at line 2264 of file S32K144.h.

__I uint32_t ES

Error Status Register, offset: 0x4

Definition at line 2248 of file S32K144.h.

__I uint32_t HRS

Hardware Request Status Register, offset: 0x34

Definition at line 2266 of file S32K144.h.

__IO uint32_t INT

Interrupt Request Register, offset: 0x24

Definition at line 2262 of file S32K144.h.

__IO uint32_t MLNO

TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008, array step: 0x20

Definition at line 2277 of file S32K144.h.

__IO uint32_t MLOFFNO

TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled), array offset: 0x1008, array step: 0x20

Definition at line 2278 of file S32K144.h.

__IO uint32_t MLOFFYES

TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled), array offset: 0x1008, array step: 0x20

Definition at line 2279 of file S32K144.h.

union { ... } NBYTES
uint8_t RESERVED_0[4]

Definition at line 2249 of file S32K144.h.

uint8_t RESERVED_1[4]

Definition at line 2251 of file S32K144.h.

uint8_t RESERVED_2[4]

Definition at line 2261 of file S32K144.h.

uint8_t RESERVED_3[4]

Definition at line 2263 of file S32K144.h.

uint8_t RESERVED_4[4]

Definition at line 2265 of file S32K144.h.

uint8_t RESERVED_5[12]

Definition at line 2267 of file S32K144.h.

uint8_t RESERVED_6[184]

Definition at line 2269 of file S32K144.h.

uint8_t RESERVED_7[3824]

Definition at line 2271 of file S32K144.h.

__IO uint32_t SADDR

TCD Source Address, array offset: 0x1000, array step: 0x20

Definition at line 2273 of file S32K144.h.

__O uint8_t SEEI

Set Enable Error Interrupt Register, offset: 0x19

Definition at line 2254 of file S32K144.h.

__O uint8_t SERQ

Set Enable Request Register, offset: 0x1B

Definition at line 2256 of file S32K144.h.

__IO uint32_t SLAST

TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20

Definition at line 2281 of file S32K144.h.

__IO uint16_t SOFF

TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20

Definition at line 2274 of file S32K144.h.

__O uint8_t SSRT

Set START Bit Register, offset: 0x1D

Definition at line 2258 of file S32K144.h.

struct { ... } TCD[DMA_TCD_COUNT]

The documentation for this struct was generated from the following file: