S32 SDK
edma_hal.c
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1 /*
2  * Copyright (c) 2013 - 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
29 #include "edma_hal.h"
30 
31 /*******************************************************************************
32  * Code
33  ******************************************************************************/
34 
35 /*FUNCTION**********************************************************************
36  *
37  * Function Name : EDMA_HAL_Init
38  * Description : Initializes eDMA module to known state.
39  *
40  * Implements : EDMA_HAL_Init_Activity
41  *END**************************************************************************/
42 void EDMA_HAL_Init(DMA_Type * base)
43 {
44  uint32_t i;
45 
46  /* Clear the bit of CR register */
47  uint32_t regValTemp;
48  regValTemp = base->CR;
49  regValTemp &= ~(DMA_CR_CLM_MASK);
50  regValTemp &= ~(DMA_CR_CX_MASK);
51  regValTemp &= ~(DMA_CR_ECX_MASK);
52  regValTemp &= ~(DMA_CR_EDBG_MASK);
53  regValTemp &= ~(DMA_CR_EMLM_MASK);
54  regValTemp &= ~(DMA_CR_ERCA_MASK);
55  base->CR = regValTemp;
56 
57  for (i = 0; i < FEATURE_EDMA_MODULE_CHANNELS; i++)
58  {
59  EDMA_HAL_TCDClearReg(base, i);
60  }
61 }
62 
63 /*FUNCTION**********************************************************************
64  *
65  * Function Name : EDMA_HAL_CancelTransfer
66  * Description : Cancels the remaining data transfer.
67  *
68  * Implements : EDMA_HAL_CancelTransfer_Activity
69  *END**************************************************************************/
71 {
72  uint32_t regValTemp;
73  regValTemp = base->CR;
74  regValTemp &= ~(DMA_CR_CX_MASK);
75  regValTemp |= DMA_CR_CX(1U);
76  base->CR = regValTemp;
77  while (((base->CR & DMA_CR_CX_MASK) >> DMA_CR_CX_SHIFT) != 0UL)
78  {}
79 }
80 
81 /*FUNCTION**********************************************************************
82  *
83  * Function Name : EDMA_HAL_CancelTransferWithError
84  * Description : Cancels the remaining data transfer and treat it as error.
85  *
86  * Implements : EDMA_HAL_CancelTransferWithError_Activity
87  *END**************************************************************************/
89 {
90  uint32_t regValTemp;
91  regValTemp = base->CR;
92  regValTemp &= ~(DMA_CR_ECX_MASK);
93  regValTemp |= DMA_CR_ECX(1U);
94  base->CR = regValTemp;
95  while (((base->CR & DMA_CR_ECX_MASK) >> DMA_CR_ECX_SHIFT) != 0UL)
96  {}
97 }
98 
99 /*FUNCTION**********************************************************************
100  *
101  * Function Name : EDMA_HAL_SetErrorIntCmd
102  * Description : Enable/Disable error interrupt for channels.
103  *
104  * Implements : EDMA_HAL_SetErrorIntCmd_Activity
105  *END**************************************************************************/
106 void EDMA_HAL_SetErrorIntCmd(DMA_Type * base, uint8_t channel, bool enable)
107 {
108  if (enable)
109  {
110  base->SEEI = channel;
111  }
112  else
113  {
114  base->CEEI = channel;
115  }
116 }
117 
118 /*FUNCTION**********************************************************************
119  *
120  * Function Name : EDMA_HAL_SetDmaRequestCmd
121  * Description : Enable/Disable dma request for channel or all channels.
122  *
123  * Implements : EDMA_HAL_SetDmaRequestCmd_Activity
124  *END**************************************************************************/
125 void EDMA_HAL_SetDmaRequestCmd(DMA_Type * base, uint8_t channel,bool enable)
126 {
127 
128  if (enable)
129  {
130  base->SERQ = channel;
131  }
132  else
133  {
134  base->CERQ = channel;
135  }
136 }
137 
138 #if FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U
139 /*FUNCTION**********************************************************************
140  *
141  * Function Name : EDMA_HAL_SetGroupPriority
142  * Description : Configures DMA group priorities.
143  *
144  * Implements : EDMA_HAL_SetGroupPriority_Activity
145  *END**************************************************************************/
146 void EDMA_HAL_SetGroupPriority(DMA_Type * base, edma_group_priority_t priority)
147 {
148  uint32_t regValTemp;
149  uint32_t mask = DMA_CR_GRP0PRI_MASK | DMA_CR_GRP1PRI_MASK;
150  regValTemp = base->CR;
151  regValTemp &= ~mask;
152  if (priority == EDMA_GRP0_PRIO_HIGH_GRP1_PRIO_LOW)
153  {
154  regValTemp |= DMA_CR_GRP0PRI_MASK;
155  }
156  else
157  {
158  regValTemp |= DMA_CR_GRP1PRI_MASK;
159  }
160 
161  base->CR = regValTemp;
162 }
163 #endif
164 
165 /*FUNCTION**********************************************************************
166  *
167  * Function Name : EDMA_HAL_TCDClearReg
168  * Description : Set registers to 0 for hardware TCD of eDMA channel.
169  *
170  * Implements : EDMA_HAL_TCDClearReg_Activity
171  *END**************************************************************************/
172 void EDMA_HAL_TCDClearReg(DMA_Type * base,uint32_t channel)
173 {
174  base->TCD[channel].SADDR = 0U;
175  base->TCD[channel].SOFF = 0;
176  base->TCD[channel].ATTR = 0U;
177  base->TCD[channel].NBYTES.MLNO = 0U;
178  base->TCD[channel].SLAST = 0;
179  base->TCD[channel].DADDR = 0U;
180  base->TCD[channel].DOFF = 0;
181  base->TCD[channel].CITER.ELINKNO = 0U;
182  base->TCD[channel].DLASTSGA = 0;
183  base->TCD[channel].CSR = 0U;
184  base->TCD[channel].BITER.ELINKNO = 0U;
185 }
186 
187 /*FUNCTION**********************************************************************
188  *
189  * Function Name : EDMA_HAL_TCDSetAttribute
190  * Description : Configures the transfer attribute for eDMA channel.
191  *
192  * Implements : EDMA_HAL_TCDSetAttribute_Activity
193  *END**************************************************************************/
195  DMA_Type * base, uint32_t channel,
196  edma_modulo_t srcModulo, edma_modulo_t destModulo,
197  edma_transfer_size_t srcTransferSize, edma_transfer_size_t destTransferSize)
198 {
199 #ifdef DEV_ERROR_DETECT
201 #endif
202  uint16_t regValTemp;
203 
204  regValTemp = (uint16_t)(((uint16_t)srcModulo << DMA_TCD_ATTR_SMOD_SHIFT) | ((uint16_t)srcTransferSize << DMA_TCD_ATTR_SSIZE_SHIFT));
205  regValTemp |= (uint16_t)(((uint16_t)destModulo << DMA_TCD_ATTR_DMOD_SHIFT) | ((uint16_t)destTransferSize << DMA_TCD_ATTR_DSIZE_SHIFT));
206  base->TCD[channel].ATTR = regValTemp;
207 }
208 /*FUNCTION**********************************************************************
209  *
210  * Function Name : EDMA_HAL_TCDSetNbytes
211  * Description : Configures the nbytes for eDMA channel.
212  *
213  * Implements : EDMA_HAL_TCDSetNbytes_Activity
214  *END**************************************************************************/
215 void EDMA_HAL_TCDSetNbytes(DMA_Type * base, uint32_t channel, uint32_t nbytes)
216 {
217 #ifdef DEV_ERROR_DETECT
219 #endif
220 
221  if (((base->CR & DMA_CR_EMLM_MASK) >> DMA_CR_EMLM_SHIFT) != 0UL)
222  {
223  bool mlOffNo = false;
224  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_SMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_SMLOE_SHIFT) == 0UL)
225  {
226  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_DMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_DMLOE_SHIFT) == 0UL)
227  {
228  base->TCD[channel].NBYTES.MLOFFNO = (nbytes & DMA_TCD_NBYTES_MLOFFNO_NBYTES_MASK);
229  mlOffNo = true;
230  }
231  }
232  if (!mlOffNo)
233  {
234  uint32_t regValTemp;
235 
236  regValTemp = base->TCD[channel].NBYTES.MLOFFYES;
237  regValTemp &= ~(DMA_TCD_NBYTES_MLOFFYES_NBYTES_MASK);
238  regValTemp |= DMA_TCD_NBYTES_MLOFFYES_NBYTES(nbytes);
239  base->TCD[channel].NBYTES.MLOFFYES = regValTemp;
240  }
241 
242  }
243  else
244  {
245  base->TCD[channel].NBYTES.MLNO = nbytes;
246  }
247 }
248 
249 /*FUNCTION**********************************************************************
250  *
251  * Function Name : EDMA_HAL_TCDGetNbytes
252  * Description : Get nbytes configuration data.
253  *
254  * Implements : EDMA_HAL_TCDGetNbytes_Activity
255  *END**************************************************************************/
256 uint32_t EDMA_HAL_TCDGetNbytes(const DMA_Type * base, uint32_t channel)
257 {
258 #ifdef DEV_ERROR_DETECT
260 #endif
261  uint32_t result = 0UL;
262 
263  if (((base->CR & DMA_CR_EMLM_MASK) >> DMA_CR_EMLM_SHIFT) != 0UL)
264  {
265  bool mlOffNo = false;
266  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_SMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_SMLOE_SHIFT) != 0UL)
267  {
268  mlOffNo = true;
269  }
270  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_DMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_DMLOE_SHIFT) != 0UL)
271  {
272  mlOffNo = true;
273  }
274  if (mlOffNo)
275  {
277  }
278  else
279  {
280  result = ((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_NBYTES_MASK) >> DMA_TCD_NBYTES_MLOFFNO_NBYTES_SHIFT);
281  }
282  }
283  else
284  {
285  result = ((base->TCD[channel].NBYTES.MLNO & DMA_TCD_NBYTES_MLNO_NBYTES_MASK) >> DMA_TCD_NBYTES_MLNO_NBYTES_SHIFT);
286  }
287  return result;
288 }
289 
290 /*FUNCTION**********************************************************************
291  *
292  * Function Name : EDMA_HAL_TCDSetMinorLoopOffset
293  * Description : Configures the minor loop offset for the TCD.
294  *
295  * Implements : EDMA_HAL_TCDSetMinorLoopOffset_Activity
296  *END**************************************************************************/
297 void EDMA_HAL_TCDSetMinorLoopOffset(DMA_Type * base, uint32_t channel, int32_t offset)
298 {
299 #ifdef DEV_ERROR_DETECT
301 #endif
302 
303  if (((base->CR & DMA_CR_EMLM_MASK) >> DMA_CR_EMLM_SHIFT) != 0UL)
304  {
305  bool mlOffNo = false;
306  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_SMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_SMLOE_SHIFT) != 0UL)
307  {
308  mlOffNo = true;
309  }
310  if (((base->TCD[channel].NBYTES.MLOFFNO & DMA_TCD_NBYTES_MLOFFNO_DMLOE_MASK) >> DMA_TCD_NBYTES_MLOFFNO_DMLOE_SHIFT) != 0UL)
311  {
312  mlOffNo = true;
313  }
314  if (mlOffNo)
315  {
316  uint32_t regValTemp;
317 
318  regValTemp = base->TCD[channel].NBYTES.MLOFFYES;
319  regValTemp &= ~(DMA_TCD_NBYTES_MLOFFYES_MLOFF_MASK);
320  regValTemp |= DMA_TCD_NBYTES_MLOFFYES_MLOFF(offset);
321  base->TCD[channel].NBYTES.MLOFFYES = regValTemp;
322  }
323  }
324 }
325 /*FUNCTION**********************************************************************
326  *
327  * Function Name : EDMA_HAL_TCDSetScatterGatherLink
328  * Description : Configures the memory address of the next TCD, in Scatter/Gather mode.
329  *
330  * Implements : EDMA_HAL_TCDSetScatterGatherLink_Activity
331  *END**************************************************************************/
332 void EDMA_HAL_TCDSetScatterGatherLink(DMA_Type * base, uint32_t channel, uint32_t nextTCDAddr)
333 {
334 #ifdef DEV_ERROR_DETECT
336 #endif
337  base->TCD[channel].DLASTSGA = nextTCDAddr;
338 }
339 
340 /*FUNCTION**********************************************************************
341  *
342  * Function Name : EDMA_HAL_TCDSetChannelMinorLink
343  * Description : Set Channel minor link for hardware TCD.
344  *
345  * Implements : EDMA_HAL_TCDSetChannelMinorLink_Activity
346  *END**************************************************************************/
348  DMA_Type * base, uint32_t channel, uint32_t linkChannel, bool enable)
349 {
350 #ifdef DEV_ERROR_DETECT
353 #endif
354 
355  uint16_t regValTemp;
356  regValTemp = base->TCD[channel].BITER.ELINKYES;
357  regValTemp &= (uint16_t)~(DMA_TCD_BITER_ELINKYES_ELINK_MASK);
358  regValTemp |= (uint16_t)DMA_TCD_BITER_ELINKYES_ELINK(enable ? 1UL : 0UL);
359  base->TCD[channel].BITER.ELINKYES = regValTemp;
360  regValTemp = base->TCD[channel].CITER.ELINKYES;
361  regValTemp &= (uint16_t)~(DMA_TCD_CITER_ELINKYES_ELINK_MASK);
362  regValTemp |= (uint16_t)DMA_TCD_CITER_ELINKYES_ELINK(enable ? 1UL : 0UL);
363  base->TCD[channel].CITER.ELINKYES = regValTemp;
364 
365  if (enable)
366  {
367 
368  regValTemp = base->TCD[channel].BITER.ELINKYES;
369  regValTemp &= (uint16_t)~(DMA_TCD_BITER_ELINKYES_LINKCH_MASK);
370  regValTemp |= (uint16_t)DMA_TCD_BITER_ELINKYES_LINKCH(linkChannel);
371  base->TCD[channel].BITER.ELINKYES = regValTemp;
372 
373  regValTemp = base->TCD[channel].CITER.ELINKYES;
374  regValTemp &= (uint16_t)~(DMA_TCD_CITER_ELINKYES_LINKCH_MASK);
375  regValTemp |= (uint16_t)DMA_TCD_CITER_ELINKYES_LINKCH(linkChannel);
376  base->TCD[channel].CITER.ELINKYES = regValTemp;
377  }
378 }
379 
380 /*FUNCTION**********************************************************************
381  *
382  * Function Name : EDMA_HAL_TCD_TCDSetMajorCount
383  * Description : Sets the major iteration count according to minor loop
384  * channel link setting.
385  *
386  * Implements : EDMA_HAL_TCDSetMajorCount_Activity
387  *END**************************************************************************/
388 void EDMA_HAL_TCDSetMajorCount(DMA_Type * base, uint32_t channel, uint32_t count)
389 {
390 #ifdef DEV_ERROR_DETECT
392 #endif
393 
394  uint16_t regValTemp;
395  if (((base->TCD[channel].BITER.ELINKNO & DMA_TCD_BITER_ELINKNO_ELINK_MASK) >> DMA_TCD_BITER_ELINKNO_ELINK_SHIFT) != 0U)
396  {
397  regValTemp = base->TCD[channel].BITER.ELINKYES;
398  regValTemp &= (uint16_t)~(DMA_TCD_BITER_ELINKYES_BITER_MASK);
399  regValTemp |= (uint16_t)DMA_TCD_BITER_ELINKYES_BITER(count);
400  base->TCD[channel].BITER.ELINKYES = regValTemp;
401 
402  regValTemp = base->TCD[channel].CITER.ELINKYES;
403  regValTemp &= (uint16_t)~(DMA_TCD_CITER_ELINKYES_CITER_LE_MASK);
404  regValTemp |= (uint16_t)DMA_TCD_CITER_ELINKYES_CITER_LE(count);
405  base->TCD[channel].CITER.ELINKYES = regValTemp;
406  }
407  else
408  {
409  regValTemp = base->TCD[channel].BITER.ELINKNO;
410  regValTemp &= (uint16_t)~(DMA_TCD_BITER_ELINKNO_BITER_MASK);
411  regValTemp |= (uint16_t)DMA_TCD_BITER_ELINKNO_BITER(count);
412  base->TCD[channel].BITER.ELINKNO = regValTemp;
413 
414  regValTemp = base->TCD[channel].CITER.ELINKNO;
415  regValTemp &= (uint16_t)~(DMA_TCD_CITER_ELINKNO_CITER_MASK);
416  regValTemp |= (uint16_t)DMA_TCD_CITER_ELINKNO_CITER(count);
417  base->TCD[channel].CITER.ELINKNO = regValTemp;
418  }
419 }
420 
421 /*FUNCTION**********************************************************************
422  *
423  * Function Name : EDMA_HAL_TCDGetBeginMajorCount
424  * Description : Gets the begin major iteration count according to minor loop
425  * channel link setting.
426  *
427  * Implements : EDMA_HAL_TCDGetBeginMajorCount_Activity
428  *END**************************************************************************/
429 uint32_t EDMA_HAL_TCDGetBeginMajorCount(const DMA_Type * base, uint32_t channel)
430 {
431 #ifdef DEV_ERROR_DETECT
433 #endif
434  uint16_t result = 0U;
435  if (((base->TCD[channel].BITER.ELINKNO & DMA_TCD_BITER_ELINKNO_ELINK_MASK) >> DMA_TCD_BITER_ELINKNO_ELINK_SHIFT) != 0U)
436  {
437  result = (uint16_t)((base->TCD[channel].BITER.ELINKYES & DMA_TCD_BITER_ELINKYES_BITER_MASK) >> DMA_TCD_BITER_ELINKYES_BITER_SHIFT);
438  }
439  else
440  {
441  result = (uint16_t)((base->TCD[channel].BITER.ELINKNO & DMA_TCD_BITER_ELINKNO_BITER_MASK) >> DMA_TCD_BITER_ELINKNO_BITER_SHIFT);
442  }
443  return (uint32_t) result;
444 }
445 
446 /*FUNCTION**********************************************************************
447  *
448  * Function Name : EDMA_HAL_TCDGetCurrentMajorCount
449  * Description : Gets the current major iteration count according to minor
450  * loop channel link setting.
451  *
452  * Implements : EDMA_HAL_TCDGetCurrentMajorCount_Activity
453  *END**************************************************************************/
454 uint32_t EDMA_HAL_TCDGetCurrentMajorCount(const DMA_Type * base, uint32_t channel)
455 {
456 #ifdef DEV_ERROR_DETECT
458 #endif
459 
460  uint16_t result = 0U;
461  if (((base->TCD[channel].BITER.ELINKNO & DMA_TCD_BITER_ELINKNO_ELINK_MASK) >> DMA_TCD_BITER_ELINKNO_ELINK_SHIFT) != 0U)
462  {
463  result = (uint16_t)((base->TCD[channel].CITER.ELINKYES & DMA_TCD_CITER_ELINKYES_CITER_LE_MASK) >> DMA_TCD_CITER_ELINKYES_CITER_LE_SHIFT);
464  }
465  else
466  {
467  result = (uint16_t)((base->TCD[channel].CITER.ELINKNO & DMA_TCD_CITER_ELINKNO_CITER_MASK) >> DMA_TCD_CITER_ELINKNO_CITER_SHIFT);
468  }
469  return (uint32_t) result;
470 }
471 
472 /*FUNCTION**********************************************************************
473  *
474  * Function Name : EDMA_HAL_TCDGetUnfinishedBytes
475  * Description : Get the bytes number of bytes haven't been transferred for
476  * this hardware TCD.
477  *
478  * Implements : EDMA_HAL_TCDGetUnfinishedBytes_Activity
479  *END**************************************************************************/
480 uint32_t EDMA_HAL_TCDGetUnfinishedBytes(const DMA_Type * base, uint32_t channel)
481 {
482 #ifdef DEV_ERROR_DETECT
484 #endif
485 
486  uint32_t nbytes;
487  uint16_t result = 0U;
488 
489  nbytes = EDMA_HAL_TCDGetNbytes(base, channel);
490 
491  if (((base->TCD[channel].BITER.ELINKNO & DMA_TCD_BITER_ELINKNO_ELINK_MASK) >> DMA_TCD_BITER_ELINKNO_ELINK_SHIFT) != 0U)
492  {
493  result = (uint16_t)((base->TCD[channel].CITER.ELINKYES & DMA_TCD_CITER_ELINKYES_CITER_LE_MASK) >> DMA_TCD_CITER_ELINKYES_CITER_LE_SHIFT);
494  }
495  else
496  {
497  result = (uint16_t)((base->TCD[channel].CITER.ELINKNO & DMA_TCD_CITER_ELINKNO_CITER_MASK) >> DMA_TCD_CITER_ELINKNO_CITER_SHIFT);
498  }
499  return (((uint32_t) result) * nbytes);
500 }
501 
502 /*FUNCTION**********************************************************************
503  *
504  * Function Name : EDMA_HAL_TCDGetFinishedBytes
505  * Description : Get the bytes number of bytes already be transferred for this
506  * hardware TCD.
507  *
508  * Implements : EDMA_HAL_TCDGetFinishedBytes_Activity
509  *END**************************************************************************/
510 uint32_t EDMA_HAL_TCDGetFinishedBytes(const DMA_Type * base, uint32_t channel)
511 {
512 #ifdef DEV_ERROR_DETECT
514 #endif
515 
516  uint32_t nbytes, begin_majorcount, current_majorcount;
517 
518  nbytes = EDMA_HAL_TCDGetNbytes(base, channel);
519  begin_majorcount = EDMA_HAL_TCDGetBeginMajorCount(base,channel);
520  current_majorcount = EDMA_HAL_TCDGetCurrentMajorCount(base,channel);
521 
522  return ((begin_majorcount - current_majorcount) * nbytes);
523 }
524 
525 /*******************************************************************************
526  * EOF
527  ******************************************************************************/
void EDMA_HAL_TCDSetScatterGatherLink(DMA_Type *base, uint32_t channel, uint32_t nextTCDAddr)
Configures the memory address for the next transfer TCD for the TCD.
Definition: edma_hal.c:332
#define DMA_CR_EMLM_SHIFT
Definition: S32K144.h:2351
#define DMA_TCD_BITER_ELINKYES_BITER_MASK
Definition: S32K144.h:3073
#define DMA_TCD_BITER_ELINKYES_LINKCH_MASK
Definition: S32K144.h:3077
#define DMA_CR_EMLM_MASK
Definition: S32K144.h:2350
__IO uint32_t SADDR
Definition: S32K144.h:2273
#define DMA_CR_CX(x)
Definition: S32K144.h:2361
__O uint8_t CEEI
Definition: S32K144.h:2253
void EDMA_HAL_TCDClearReg(DMA_Type *base, uint32_t channel)
Clears all registers to 0 for the hardware TCD.
Definition: edma_hal.c:172
union DMA_Type::@6::@8 CITER
#define DMA_TCD_BITER_ELINKYES_BITER(x)
Definition: S32K144.h:3076
__IO uint16_t ATTR
Definition: S32K144.h:2275
uint32_t EDMA_HAL_TCDGetUnfinishedBytes(const DMA_Type *base, uint32_t channel)
Gets the number of bytes haven't transferred for the TCD.
Definition: edma_hal.c:480
#define DMA_TCD_NBYTES_MLOFFNO_NBYTES_MASK
Definition: S32K144.h:2951
__IO uint16_t CSR
Definition: S32K144.h:2289
#define DMA_TCD_NBYTES_MLOFFNO_DMLOE_SHIFT
Definition: S32K144.h:2956
#define FEATURE_EDMA_MODULE_CHANNELS
#define DMA_TCD_CITER_ELINKYES_LINKCH_MASK
Definition: S32K144.h:3009
#define DMA_TCD_CITER_ELINKNO_CITER_SHIFT
Definition: S32K144.h:2997
#define DMA_TCD_CITER_ELINKYES_ELINK(x)
Definition: S32K144.h:3016
void EDMA_HAL_TCDSetMajorCount(DMA_Type *base, uint32_t channel, uint32_t count)
Sets the major iteration count according to minor loop channel link setting.
Definition: edma_hal.c:388
#define DMA_TCD_NBYTES_MLOFFNO_DMLOE_MASK
Definition: S32K144.h:2955
#define DMA_TCD_CITER_ELINKYES_CITER_LE_SHIFT
Definition: S32K144.h:3006
union DMA_Type::@6::@9 BITER
__IO uint32_t SLAST
Definition: S32K144.h:2281
__O uint8_t SEEI
Definition: S32K144.h:2254
uint32_t EDMA_HAL_TCDGetCurrentMajorCount(const DMA_Type *base, uint32_t channel)
Returns the current major iteration count.
Definition: edma_hal.c:454
__IO uint32_t CR
Definition: S32K144.h:2247
#define DMA_TCD_NBYTES_MLOFFYES_MLOFF_MASK
Definition: S32K144.h:2968
void EDMA_HAL_CancelTransferWithError(DMA_Type *base)
Cancels the remaining data transfer and treats it as an error condition.
Definition: edma_hal.c:88
#define DMA_TCD_BITER_ELINKYES_BITER_SHIFT
Definition: S32K144.h:3074
#define DMA_CR_ERCA_MASK
Definition: S32K144.h:2334
#define DMA_TCD_BITER_ELINKNO_ELINK_MASK
Definition: S32K144.h:3068
void EDMA_HAL_SetErrorIntCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the error interrupt for channels.
Definition: edma_hal.c:106
#define DMA_TCD_BITER_ELINKYES_LINKCH(x)
Definition: S32K144.h:3080
#define DEV_ASSERT(x)
Definition: devassert.h:78
#define DMA_TCD_NBYTES_MLOFFYES_NBYTES(x)
Definition: S32K144.h:2967
#define DMA_TCD_CITER_ELINKNO_CITER_MASK
Definition: S32K144.h:2996
#define DMA_TCD_CITER_ELINKYES_LINKCH(x)
Definition: S32K144.h:3012
#define DMA_TCD_BITER_ELINKNO_ELINK_SHIFT
Definition: S32K144.h:3069
#define DMA_TCD_ATTR_DMOD_SHIFT
Definition: S32K144.h:2934
#define DMA_TCD_CITER_ELINKYES_ELINK_MASK
Definition: S32K144.h:3013
#define DMA_TCD_BITER_ELINKNO_BITER_MASK
Definition: S32K144.h:3064
void EDMA_HAL_CancelTransfer(DMA_Type *base)
Cancels the remaining data transfer.
Definition: edma_hal.c:70
#define DMA_CR_CX_SHIFT
Definition: S32K144.h:2359
__IO uint16_t SOFF
Definition: S32K144.h:2274
void EDMA_HAL_TCDSetMinorLoopOffset(DMA_Type *base, uint32_t channel, int32_t offset)
Configures the minor loop offset for the TCD.
Definition: edma_hal.c:297
void EDMA_HAL_TCDSetChannelMinorLink(DMA_Type *base, uint32_t channel, uint32_t linkChannel, bool enable)
Sets the channel minor link for the TCD.
Definition: edma_hal.c:347
void EDMA_HAL_TCDSetAttribute(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo, edma_transfer_size_t srcTransferSize, edma_transfer_size_t destTransferSize)
Configures the transfer attribute for the eDMA channel.
Definition: edma_hal.c:194
#define DMA_TCD_ATTR_SMOD_SHIFT
Definition: S32K144.h:2942
#define DMA_TCD_CITER_ELINKYES_CITER_LE(x)
Definition: S32K144.h:3008
__IO uint32_t DADDR
Definition: S32K144.h:2282
#define DMA_CR_ECX_SHIFT
Definition: S32K144.h:2355
__O uint8_t SERQ
Definition: S32K144.h:2256
#define DMA_TCD_NBYTES_MLOFFNO_SMLOE_SHIFT
Definition: S32K144.h:2960
#define DMA_TCD_NBYTES_MLOFFNO_NBYTES_SHIFT
Definition: S32K144.h:2952
__O uint8_t CERQ
Definition: S32K144.h:2255
edma_transfer_size_t
eDMA transfer configuration Implements : edma_transfer_size_t_Class
Definition: edma_hal.h:132
union DMA_Type::@6::@7 NBYTES
#define DMA_CR_ECX(x)
Definition: S32K144.h:2357
__IO uint16_t DOFF
Definition: S32K144.h:2283
edma_modulo_t
eDMA modulo configuration Implements : edma_modulo_t_Class
Definition: edma_hal.h:94
#define DMA_TCD_NBYTES_MLOFFYES_NBYTES_SHIFT
Definition: S32K144.h:2965
#define DMA_TCD_NBYTES_MLOFFNO_SMLOE_MASK
Definition: S32K144.h:2959
#define DMA_TCD_NBYTES_MLOFFYES_MLOFF(x)
Definition: S32K144.h:2971
#define DMA_TCD_CITER_ELINKNO_CITER(x)
Definition: S32K144.h:2999
#define DMA_CR_EDBG_MASK
Definition: S32K144.h:2330
#define DMA_TCD_BITER_ELINKNO_BITER_SHIFT
Definition: S32K144.h:3065
void EDMA_HAL_SetDmaRequestCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the DMA request for the channel or all channels.
Definition: edma_hal.c:125
uint32_t EDMA_HAL_TCDGetFinishedBytes(const DMA_Type *base, uint32_t channel)
Gets the number of bytes already transferred for the TCD.
Definition: edma_hal.c:510
#define DMA_TCD_BITER_ELINKYES_ELINK_MASK
Definition: S32K144.h:3081
#define DMA_CR_CX_MASK
Definition: S32K144.h:2358
#define DMA_TCD_ATTR_SSIZE_SHIFT
Definition: S32K144.h:2938
struct DMA_Type::@6 TCD[DMA_TCD_COUNT]
#define DMA_TCD_CITER_ELINKYES_CITER_LE_MASK
Definition: S32K144.h:3005
void EDMA_HAL_Init(DMA_Type *base)
Initializes eDMA module to known state.
Definition: edma_hal.c:42
void EDMA_HAL_TCDSetNbytes(DMA_Type *base, uint32_t channel, uint32_t nbytes)
Configures the nbytes for the eDMA channel.
Definition: edma_hal.c:215
#define DMA_TCD_BITER_ELINKNO_BITER(x)
Definition: S32K144.h:3067
uint32_t EDMA_HAL_TCDGetNbytes(const DMA_Type *base, uint32_t channel)
Gets the nbytes configuration data for the TCD.
Definition: edma_hal.c:256
#define DMA_TCD_NBYTES_MLNO_NBYTES_MASK
Definition: S32K144.h:2946
#define DMA_TCD_BITER_ELINKYES_ELINK(x)
Definition: S32K144.h:3084
#define DMA_CR_ECX_MASK
Definition: S32K144.h:2354
#define DMA_CR_CLM_MASK
Definition: S32K144.h:2346
uint32_t EDMA_HAL_TCDGetBeginMajorCount(const DMA_Type *base, uint32_t channel)
Returns the begin major iteration count.
Definition: edma_hal.c:429
#define DMA_TCD_NBYTES_MLNO_NBYTES_SHIFT
Definition: S32K144.h:2947
#define DMA_TCD_ATTR_DSIZE_SHIFT
Definition: S32K144.h:2930
__IO uint32_t DLASTSGA
Definition: S32K144.h:2288
#define DMA_TCD_NBYTES_MLOFFYES_NBYTES_MASK
Definition: S32K144.h:2964