S32 SDK
wdog_hal.h
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1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * Copyright 2016 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
33 #ifndef WDOG_HAL_H
34 #define WDOG_HAL_H
35 
36 #include "device_registers.h"
37 #include <stdbool.h>
38 
49 /*******************************************************************************
50  * Definitions
51  ******************************************************************************/
52 
53 
58 typedef enum {
59  WDOG_BUS_CLOCK = 0x00U,
60  WDOG_LPO_CLOCK = 0x01U,
61  WDOG_SOSC_CLOCK = 0x02U,
62  WDOG_SIRC_CLOCK = 0x03U
64 
69 typedef enum {
71  WDOG_TST_USER = 0x01U,
72  WDOG_TST_LOW = 0x02U,
73  WDOG_TST_HIGH = 0x03U
75 
80 typedef struct {
81  bool wait;
82  bool stop;
83  bool debug;
85 
90 typedef struct {
93  bool updateEnable;
94  bool intEnable;
95  bool winEnable;
96  uint32_t windowValue;
97  uint32_t timeoutValue;
100 
101 
102 /* The dummy read is used in order to make sure that any write to the
103  * WDOG registers will be started only after the write of the unlock value was
104  * completed.
105  */
106 #define WDOG_UNLOCK32(base) \
107  { \
108  (base)->CNT = FEATURE_WDOG_UNLOCK_VALUE; \
109  (void)(base)->CNT; \
110  }
111 #define WDOG_UNLOCK16(base) \
112  { \
113  (base)->CNT = FEATURE_WDOG_UNLOCK16_FIRST_VALUE; \
114  (void)(base)->CNT; \
115  (base)->CNT = FEATURE_WDOG_UNLOCK16_SECOND_VALUE; \
116  (void)(base)->CNT; \
117  }
118 #define WDOG_UNLOCK(base) \
119  { \
120  if (((base)->CS & WDOG_CS_CMD32EN_MASK) != 0U) \
121  { \
122  WDOG_UNLOCK32(base); \
123  } \
124  else \
125  { \
126  WDOG_UNLOCK16(base); \
127  } \
128  }
129 
130 /*******************************************************************************
131  * API
132  ******************************************************************************/
133 
134 #if defined(__cplusplus)
135 extern "C" {
136 #endif
137 
151 void WDOG_HAL_Init(WDOG_Type *base);
152 
165 static inline bool WDOG_HAL_IsEnabled(const WDOG_Type *base)
166 {
167  return (((base->CS & WDOG_CS_EN_MASK) >> WDOG_CS_EN_SHIFT) != 0U);
168 }
169 
179 static inline void WDOG_HAL_Enable(WDOG_Type *base)
180 {
181  WDOG_UNLOCK(base);
182 
183  base->CS = (base->CS & ~WDOG_CS_EN_MASK) | WDOG_CS_EN(1U);
184 }
185 
195 static inline void WDOG_HAL_Disable(WDOG_Type *base)
196 {
197  WDOG_UNLOCK(base);
198 
199  base->CS = (base->CS & ~WDOG_CS_EN_MASK) | WDOG_CS_EN(0U);
200 }
201 
208 static inline void WDOG_HAL_Trigger(WDOG_Type *base)
209 {
210  if (((base)->CS & WDOG_CS_CMD32EN_MASK) != 0U)
211  {
213  }
214  else
215  {
217  (void)base->CNT;
219  }
220 }
221 
231 void WDOG_HAL_Config(WDOG_Type *base, const wdog_user_config_t *config);
232 
243 
254 static inline void WDOG_HAL_SetWindow(WDOG_Type *base, bool enable)
255 {
256  WDOG_UNLOCK(base);
257 
258  base->CS = (base->CS & ~WDOG_CS_WIN_MASK) | WDOG_CS_WIN(enable? 1UL : 0UL);
259 }
260 
273 static inline bool WDOG_HAL_GetInt(const WDOG_Type *base)
274 {
275  return (((base->CS & WDOG_CS_FLG_MASK) >> WDOG_CS_FLG_SHIFT) != 0U);
276 }
277 
287 static inline void WDOG_HAL_ClearInt(WDOG_Type *base)
288 {
289  WDOG_UNLOCK(base);
290 
291  base->CS = (base->CS & ~WDOG_CS_FLG_MASK) | WDOG_CS_FLG(1U);
292 }
293 
304 static inline void WDOG_HAL_SetPrescaler(WDOG_Type *base, bool enable)
305 {
306  WDOG_UNLOCK(base);
307 
308  base->CS = (base->CS & ~WDOG_CS_PRES_MASK) | WDOG_CS_PRES(enable? 1UL : 0UL);
309 }
310 
325 static inline void WDOG_HAL_SetClockSource(WDOG_Type *base, wdog_clk_source_t clkSource)
326 {
327  uint32_t regValue;
328  regValue = base->CS;
329  regValue &= ~(WDOG_CS_CLK_MASK);
330  regValue |= WDOG_CS_CLK(clkSource);
331 
332  WDOG_UNLOCK(base);
333 
334  base->CS = regValue;
335 }
336 
347 static inline void WDOG_HAL_SetInt(WDOG_Type *base, bool enable)
348 {
349  WDOG_UNLOCK(base);
350 
351  base->CS = (base->CS & ~WDOG_CS_INT_MASK) | WDOG_CS_INT(enable? 1UL : 0UL);
352 }
353 
367 static inline bool WDOG_HAL_IsUpdateEnabled(const WDOG_Type *base)
368 {
369  return (((base->CS & WDOG_CS_UPDATE_MASK) >> WDOG_CS_UPDATE_SHIFT) != 0U);
370 }
371 
382 static inline void WDOG_HAL_SetUpdate(WDOG_Type *base, bool enable)
383 {
384  WDOG_UNLOCK(base);
385 
386  base->CS = (base->CS & ~WDOG_CS_UPDATE_MASK) | WDOG_CS_UPDATE(enable? 1UL : 0UL);
387 }
388 
404 {
405  uint32_t tmp = ((base->CS & WDOG_CS_TST_MASK) >> WDOG_CS_TST_SHIFT);
406  wdog_test_mode_t testMode;
407 
408  switch (tmp)
409  {
410  case 0U:
411  testMode = WDOG_TST_DISABLED;
412  break;
413  case 1U:
414  testMode = WDOG_TST_USER;
415  break;
416  case 2U:
417  testMode = WDOG_TST_LOW;
418  break;
419  case 3U:
420  testMode = WDOG_TST_HIGH;
421  break;
422  default:
423  testMode = WDOG_TST_DISABLED;
424  break;
425  }
426 
427  return testMode;
428 }
429 
446 static inline void WDOG_HAL_SetTestMode(WDOG_Type *base, wdog_test_mode_t testMode)
447 {
448  uint32_t regValue;
449  regValue = base->CS;
450  regValue &= ~(WDOG_CS_TST_MASK);
451  regValue |= WDOG_CS_TST(testMode);
452 
453  WDOG_UNLOCK(base);
454 
455  base->CS = regValue;
456 }
457 
468 static inline void WDOG_HAL_SetDebug(WDOG_Type *base, bool enable)
469 {
470  WDOG_UNLOCK(base);
471 
472  base->CS = (base->CS & ~WDOG_CS_DBG_MASK) | WDOG_CS_DBG(enable? 1UL : 0UL);
473 }
474 
485 static inline void WDOG_HAL_SetWait(WDOG_Type *base, bool enable)
486 {
487  WDOG_UNLOCK(base);
488 
489  base->CS = (base->CS & ~WDOG_CS_WAIT_MASK) | WDOG_CS_WAIT(enable? 1UL : 0UL);
490 }
491 
502 static inline void WDOG_HAL_SetStop(WDOG_Type *base, bool enable)
503 {
504  WDOG_UNLOCK(base);
505 
506  base->CS = (base->CS & ~WDOG_CS_STOP_MASK) | WDOG_CS_STOP(enable? 1UL : 0UL);
507 }
508 
519 static inline uint16_t WDOG_HAL_GetCounter(const WDOG_Type *base)
520 {
521  return (uint16_t) base->CNT;
522 }
523 
534 static inline void WDOG_HAL_SetCounter(WDOG_Type *base, uint32_t counter)
535 {
536  base->CNT = counter;
537 }
538 
549 static inline uint16_t WDOG_HAL_GetTimeout(const WDOG_Type *base)
550 {
551  return (uint16_t) base->TOVAL;
552 }
553 
564 static inline void WDOG_HAL_SetTimeout(WDOG_Type *base, uint16_t timeout)
565 {
566  WDOG_UNLOCK(base);
567 
568  base->TOVAL = (uint32_t) timeout;
569 }
570 
581 static inline void WDOG_HAL_SetWindowValue(WDOG_Type *base, uint16_t window)
582 {
583  WDOG_UNLOCK(base);
584 
585  base->WIN = (uint32_t) window;
586 }
587 
599 static inline bool WDOG_HAL_IsUnlocked(const WDOG_Type *base)
600 {
601  return (((base->CS & WDOG_CS_ULK_MASK) >> WDOG_CS_ULK_SHIFT) != 0U);
602 }
603 
614 static inline bool WDOG_HAL_IsReconfigurationComplete(const WDOG_Type *base)
615 {
616  return (((base->CS & WDOG_CS_RCS_MASK) >> WDOG_CS_RCS_SHIFT) != 0U);
617 }
618 
629 static inline void WDOG_HAL_SetCmd32(WDOG_Type *base, bool enable)
630 {
631  WDOG_UNLOCK(base);
632 
633  base->CS = (base->CS & ~WDOG_CS_CMD32EN_MASK) | WDOG_CS_CMD32EN(enable? 1UL : 0UL);
634 
635  WDOG_UNLOCK(base);
636 }
639 #if defined(__cplusplus)
640 }
641 #endif
642 
645 #endif /* WDOG_HAL_H */
646 /*******************************************************************************
647  * EOF
648  ******************************************************************************/
649 
__IO uint32_t CNT
Definition: S32K144.h:11264
static bool WDOG_HAL_IsEnabled(const WDOG_Type *base)
Verifies if the WDOG is enabled.
Definition: wdog_hal.h:165
static void WDOG_HAL_SetUpdate(WDOG_Type *base, bool enable)
Enables/Disables WDOG updates.
Definition: wdog_hal.h:382
#define WDOG_CS_EN_MASK
Definition: S32K144.h:11323
static void WDOG_HAL_SetCounter(WDOG_Type *base, uint32_t counter)
Sets the value of the WDOG counter.
Definition: wdog_hal.h:534
#define WDOG_CS_CLK(x)
Definition: S32K144.h:11330
void WDOG_HAL_Config(WDOG_Type *base, const wdog_user_config_t *config)
Configures all WDOG registers.
Definition: wdog_hal.c:64
#define WDOG_CS_WIN(x)
Definition: S32K144.h:11354
static void WDOG_HAL_SetWait(WDOG_Type *base, bool enable)
Enables/Disables WDOG in wait mode.
Definition: wdog_hal.h:485
static void WDOG_HAL_SetStop(WDOG_Type *base, bool enable)
Enables/Disables WDOG in stop mode.
Definition: wdog_hal.h:502
wdog_user_config_t WDOG_HAL_GetConfig(const WDOG_Type *base)
Gets the current WDOG configuration.
Definition: wdog_hal.c:103
static wdog_test_mode_t WDOG_HAL_GetTestMode(const WDOG_Type *base)
Gets the WDOG test mode.
Definition: wdog_hal.h:403
#define WDOG_CS_INT_MASK
Definition: S32K144.h:11319
#define WDOG_CS_STOP(x)
Definition: S32K144.h:11302
static void WDOG_HAL_SetDebug(WDOG_Type *base, bool enable)
Enables/Disables WDOG in debug mode.
Definition: wdog_hal.h:468
#define WDOG_CS_FLG(x)
Definition: S32K144.h:11350
static void WDOG_HAL_Disable(WDOG_Type *base)
Disables the WDOG.
Definition: wdog_hal.h:195
__IO uint32_t CS
Definition: S32K144.h:11263
static void WDOG_HAL_SetCmd32(WDOG_Type *base, bool enable)
Enables/Disables support for 32-bit refresh/unlock command write words.
Definition: wdog_hal.h:629
#define WDOG_CS_TST(x)
Definition: S32K144.h:11314
#define WDOG_CS_UPDATE(x)
Definition: S32K144.h:11318
static bool WDOG_HAL_IsUnlocked(const WDOG_Type *base)
Checks if the WDOG is unlocked.
Definition: wdog_hal.h:599
static void WDOG_HAL_SetTestMode(WDOG_Type *base, wdog_test_mode_t testMode)
Changes the WDOG test mode.
Definition: wdog_hal.h:446
#define WDOG_CS_ULK_MASK
Definition: S32K144.h:11335
static bool WDOG_HAL_GetInt(const WDOG_Type *base)
Gets Interrupt Flag (FLG) status.
Definition: wdog_hal.h:273
#define WDOG_CS_PRES_MASK
Definition: S32K144.h:11339
#define WDOG_CS_DBG_MASK
Definition: S32K144.h:11307
WDOG configuration structure Implements : wdog_user_config_t_Class.
Definition: wdog_hal.h:90
#define WDOG_CS_RCS_SHIFT
Definition: S32K144.h:11332
#define FEATURE_WDOG_TRIGGER16_FIRST_VALUE
#define FEATURE_WDOG_TRIGGER16_SECOND_VALUE
uint32_t windowValue
Definition: wdog_hal.h:96
#define WDOG_CS_WIN_MASK
Definition: S32K144.h:11351
static void WDOG_HAL_SetPrescaler(WDOG_Type *base, bool enable)
Enables/Disables prescaler.
Definition: wdog_hal.h:304
#define WDOG_CS_FLG_SHIFT
Definition: S32K144.h:11348
void WDOG_HAL_Init(WDOG_Type *base)
Initializes the WDOG.
Definition: wdog_hal.c:42
#define WDOG_CS_CLK_MASK
Definition: S32K144.h:11327
static uint16_t WDOG_HAL_GetCounter(const WDOG_Type *base)
Gets the value of the WDOG counter.
Definition: wdog_hal.h:519
wdog_clk_source_t clkSource
Definition: wdog_hal.h:91
#define WDOG_CS_RCS_MASK
Definition: S32K144.h:11331
static void WDOG_HAL_SetTimeout(WDOG_Type *base, uint16_t timeout)
Sets the value of the WDOG timeout.
Definition: wdog_hal.h:564
#define WDOG_CS_EN(x)
Definition: S32K144.h:11326
__IO uint32_t TOVAL
Definition: S32K144.h:11265
wdog_clk_source_t
Clock sources for the WDOG. Implements : wdog_clk_source_t_Class.
Definition: wdog_hal.h:58
wdog_op_mode_t opMode
Definition: wdog_hal.h:92
#define WDOG_CS_TST_MASK
Definition: S32K144.h:11311
static bool WDOG_HAL_IsReconfigurationComplete(const WDOG_Type *base)
Checks if the last configuration of the WDOG was successful.
Definition: wdog_hal.h:614
#define WDOG_CS_WAIT_MASK
Definition: S32K144.h:11303
#define FEATURE_WDOG_TRIGGER_VALUE
WDOG configuration structure Implements : wdog_op_mode_t_Class.
Definition: wdog_hal.h:80
#define WDOG_CS_CMD32EN(x)
Definition: S32K144.h:11346
static void WDOG_HAL_SetWindow(WDOG_Type *base, bool enable)
Enables/Disables window mode.
Definition: wdog_hal.h:254
#define WDOG_CS_FLG_MASK
Definition: S32K144.h:11347
#define WDOG_UNLOCK(base)
Definition: wdog_hal.h:118
#define WDOG_CS_ULK_SHIFT
Definition: S32K144.h:11336
#define WDOG_CS_DBG(x)
Definition: S32K144.h:11310
#define WDOG_CS_STOP_MASK
Definition: S32K144.h:11299
static void WDOG_HAL_ClearInt(WDOG_Type *base)
Clears the Interrupt Flag.
Definition: wdog_hal.h:287
static void WDOG_HAL_SetWindowValue(WDOG_Type *base, uint16_t window)
Sets the value of the WDOG window.
Definition: wdog_hal.h:581
static void WDOG_HAL_SetClockSource(WDOG_Type *base, wdog_clk_source_t clkSource)
Selects the clock source used by the WDOG.
Definition: wdog_hal.h:325
static void WDOG_HAL_SetInt(WDOG_Type *base, bool enable)
Enables/Disables WDOG interrupt.
Definition: wdog_hal.h:347
static void WDOG_HAL_Trigger(WDOG_Type *base)
Refreshes the WDOG counter.
Definition: wdog_hal.h:208
#define WDOG_CS_CMD32EN_MASK
Definition: S32K144.h:11343
#define WDOG_CS_WAIT(x)
Definition: S32K144.h:11306
static void WDOG_HAL_Enable(WDOG_Type *base)
Enables the WDOG.
Definition: wdog_hal.h:179
uint32_t timeoutValue
Definition: wdog_hal.h:97
#define WDOG_CS_UPDATE_MASK
Definition: S32K144.h:11315
#define WDOG_CS_TST_SHIFT
Definition: S32K144.h:11312
bool prescalerEnable
Definition: wdog_hal.h:98
#define WDOG_CS_INT(x)
Definition: S32K144.h:11322
#define WDOG_CS_PRES(x)
Definition: S32K144.h:11342
__IO uint32_t WIN
Definition: S32K144.h:11266
#define WDOG_CS_UPDATE_SHIFT
Definition: S32K144.h:11316
#define WDOG_CS_EN_SHIFT
Definition: S32K144.h:11324
static bool WDOG_HAL_IsUpdateEnabled(const WDOG_Type *base)
Verifies if the WDOG updates are allowed.
Definition: wdog_hal.h:367
static uint16_t WDOG_HAL_GetTimeout(const WDOG_Type *base)
Gets the value of the WDOG timeout.
Definition: wdog_hal.h:549
wdog_test_mode_t
Test modes for the WDOG. Implements : wdog_test_mode_t_Class.
Definition: wdog_hal.h:69