Cadc_average_config_t | Defines the hardware average configuration |
Cadc_calibration_t | Defines the user calibration configuration |
Cadc_chan_config_t | Defines the control channel configuration |
Cadc_compare_config_t | Defines the hardware compare configuration |
Cadc_converter_config_t | Defines the converter configuration |
CADC_Type | |
CAIPS_Type | |
CCAN_Type | |
Cclock_manager_callback_user_config_t | Structure for callback function and its parameter. Implements clock_manager_callback_user_config_t_Class |
Cclock_manager_state_t | Clock manager state structure. Implements clock_manager_state_t_Class |
Cclock_manager_user_config_t | Clock configuration structure. Implements clock_manager_user_config_t_Class |
Cclock_notify_struct_t | Clock notification structure passed to clock callback function. Implements clock_notify_struct_t_Class |
Ccmp_anmux_t | Defines the analog mux |
Ccmp_comparator_t | Defines the block configuration |
Ccmp_dac_t | Defines the DAC block |
Ccmp_module_t | Defines the comparator module configuration |
Ccmp_trigger_mode_t | Defines the trigger mode |
CCMP_Type | |
CCRC_Type | |
Ccrc_user_config_t | CRC configuration structure. Implements : crc_user_config_t_Class |
CCSE_PRAM_Type | |
Ccsec_state_t | Internal driver state information |
CDMA_Type | |
CDMAMUX_Type | |
Cdrv_config_t | |
Cedma_channel_config_t | The user configuration structure for the an eDMA driver channel |
Cedma_chn_state_t | Data structure for the eDMA channel state. Implements : edma_chn_state_t_Class |
Cedma_loop_transfer_config_t | EDMA loop transfer configuration |
Cedma_scatter_gather_list_t | Data structure for configuring a discrete memory transfer. Implements : edma_scatter_gather_list_t_Class |
Cedma_software_tcd_t | EDMA TCD Implements : edma_software_tcd_t_Class |
Cedma_state_t | Runtime state structure for the eDMA driver |
Cedma_transfer_config_t | EDMA transfer size configuration |
Cedma_user_config_t | The user configuration structure for the eDMA driver |
CEIM_Type | |
Ceim_user_channel_config_t | EIM channel configuration structure |
Cerm_interrupt_config_t | ERM interrupt notification configuration structure Implements : erm_interrupt_config_t_Class |
CERM_Type | |
Cerm_user_config_t | ERM user configuration structure Implements : erm_user_config_t_Class |
Cewm_init_config_t | |
CEWM_Type | |
Cflash_eeprom_status_t | EEPROM status structure |
Cflash_ssd_config_t | Flash SSD Configuration Structure |
Cflash_user_config_t | Flash User Configuration Structure |
Cflexcan_buserr_counter_t | FlexCAN bus error counters Implements : flexcan_buserr_counter_t_Class |
Cflexcan_data_info_t | FlexCAN data info from user Implements : flexcan_data_info_t_Class |
Cflexcan_id_table_t | FlexCAN RX FIFO ID filter table structure Implements : flexcan_id_table_t_Class |
Cflexcan_mb_handle_t | Information needed for internal handling of a given MB. Implements : flexcan_mb_handle_t_Class |
Cflexcan_msgbuff_code_status_t | FlexCAN Message Buffer code and status for transmit and receive Implements : flexcan_msgbuff_code_status_t_Class |
Cflexcan_msgbuff_t | FlexCAN message buffer structure Implements : flexcan_msgbuff_t_Class |
Cflexcan_pn_config_t | Pretended Networking configuration structure Implements : flexcan_pn_config_t_Class |
Cflexcan_pn_id_filter_t | Pretended Networking ID filter |
Cflexcan_pn_payload_filter_t | Pretended Networking payload filter |
Cflexcan_time_segment_t | FlexCAN timing related structures Implements : flexcan_time_segment_t_Class |
Cflexcan_user_config_t | FlexCAN configuration |
CFlexCANState | Internal driver state information |
Cflexio_i2c_master_state_t | Master internal context structure |
Cflexio_i2c_master_user_config_t | Master configuration structure |
Cflexio_i2s_master_state_t | Master internal context structure |
Cflexio_i2s_master_user_config_t | Master configuration structure |
Cflexio_i2s_slave_user_config_t | Slave configuration structure |
Cflexio_spi_master_state_t | Master internal context structure |
Cflexio_spi_master_user_config_t | Master configuration structure |
Cflexio_spi_slave_user_config_t | Slave configuration structure |
CFLEXIO_Type | |
Cflexio_uart_state_t | Driver internal context structure |
Cflexio_uart_user_config_t | Driver configuration structure |
Cflexio_version_info_t | FlexIO module version number Implements : flexio_version_info_t_Class |
CFTFC_Type | |
Cftm_combined_ch_param_t | FlexTimer driver combined PWM parameter |
Cftm_independent_ch_param_t | FlexTimer driver independent PWM parameter |
Cftm_input_ch_param_t | FlexTimer driver Input capture parameters for each channel |
Cftm_input_param_t | FlexTimer driver input capture parameters |
Cftm_output_cmp_ch_param_t | FlexTimer driver PWM parameters |
Cftm_output_cmp_param_t | FlexTimer driver PWM parameters |
Cftm_phase_params_t | FlexTimer quadrature decoder channel parameters |
Cftm_pwm_ch_fault_param_t | FlexTimer driver PWM Fault channel parameters |
Cftm_pwm_fault_param_t | FlexTimer driver PWM Fault parameter |
Cftm_pwm_param_t | FlexTimer driver PWM parameters |
Cftm_pwm_sync_t | FlexTimer Registers sync parameters Please don't use software and hardware trigger simultaneously Implements : ftm_pwm_sync_t_Class |
Cftm_quad_decode_config_t | FTM quadrature configure structure |
Cftm_quad_decoder_state_t | FTM quadrature state(counter value and flags) |
Cftm_state_t | FlexTimer state structure of the driver |
Cftm_timer_param_t | FlexTimer driver timer mode configuration structure |
CFTM_Type | |
Cftm_user_config_t | Configuration structure that the user needs to set |
CGPIO_Type | |
Clin_associate_frame_t | Informations of associated frame Implements : lin_associate_frame_t_Class |
Clin_frame_t | Frame description structure Implements : lin_frame_t_Class |
Clin_master_data_t | LIN master configuration structure Implements : lin_master_data_t_Class |
Clin_node_attribute_t | Attributes of LIN node Implements : lin_node_attribute_t_Class |
Clin_product_id_t | Product id structure Implements : lin_product_id_t_Class |
Clin_protocol_state_t | LIN protocol status structure Implements : lin_protocol_state_t_Class |
Clin_protocol_user_config_t | Configuration structure Implements : lin_protocol_user_config_t_Class |
Clin_schedule_data_t | LIN schedule structure Implements : lin_schedule_data_t_Class |
Clin_schedule_t | Schedule table description Implements : lin_schedule_t_Class |
Clin_serial_number_t | Serial number Implements : lin_serial_number_t_Class |
Clin_state_t | Runtime state of the LIN driver |
Clin_tl_descriptor_t | Transport layer description Implements : lin_tl_descriptor_t_Class |
Clin_transport_layer_queue_t | Transport layer queue Implements : lin_transport_layer_queue_t_Class |
Clin_user_config_t | LIN hardware configuration structure Implements : lin_user_config_t_Class |
Clin_word_status_str_t | Status of LIN bus Implements : lin_word_status_str_t_Class |
CLMEM_Type | |
Clpi2c_baud_rate_params_t | Baud rate structure |
Clpi2c_master_state_t | Master internal context structure |
Clpi2c_master_user_config_t | Master configuration structure |
Clpi2c_slave_state_t | Slave internal context structure |
Clpi2c_slave_user_config_t | Slave configuration structure |
CLPI2C_Type | |
Clpi2c_version_info_t | LPI2C module version number Implements : lpi2c_version_info_t_Class |
Clpit_module_information_t | Hardware information of LPIT module Implements : lpit_module_information_t_Class |
CLPIT_Type | |
Clpit_user_channel_config_t | Structure to configure the channel timer |
Clpit_user_config_t | LPIT configuration structure |
Clpspi_init_config_t | LPSPI initialization configuration structure |
Clpspi_master_config_t | Data structure containing information about a device on the SPI bus |
Clpspi_slave_config_t | User configuration structure for the SPI slave driver. Implements : lpspi_slave_config_t_Class |
Clpspi_state_t | Runtime state structure for the LPSPI master driver |
Clpspi_tx_cmd_config_t | LPSPI Transmit Command Register configuration structure |
CLPSPI_Type | |
Clptmr_config_t | Defines the configuration structure for LPTMR |
CLPTMR_Type | |
Clpuart_idle_line_config_t | Structure for idle line configuration settings |
Clpuart_state_t | Runtime state of the LPUART driver |
CLPUART_Type | |
Clpuart_user_config_t | LPUART configuration structure |
CMCM_Type | |
Cmpu_access_err_info_t | MPU detail error access info Implements : mpu_access_err_info_t_Class |
Cmpu_high_masters_access_rights_t | MPU access rights for master which have only read and write permissions Implements : mpu_high_masters_access_rights_t_Class |
Cmpu_low_masters_access_rights_t | MPU access rights for masters which have separated privilege rights for user and supervisor mode accesses (e.g. master0~2 in S32K144) Implements : mpu_low_masters_access_rights_t_Class |
Cmpu_master_access_right_t | MPU master access rights. Implements : mpu_master_access_right_t_Class |
CMPU_Type | |
Cmpu_user_config_t | MPU user region configuration structure. This structure is used when calling the MPU_DRV_Init function. Implements : mpu_user_config_t_Class |
CMSCM_Type | |
Cpcc_config_t | PCC configuration. Implements pcc_config_t_Class |
CPCC_Type | |
Cpdb_adc_pretrigger_config_t | Defines the type of structure for configuring ADC's pre_trigger |
Cpdb_timer_config_t | Defines the type of structure for basic timer in PDB |
CPDB_Type | |
Cperipheral_clock_config_t | PCC peripheral instance clock configuration. Implements peripheral_clock_config_t_Class |
Cpin_settings_config_t | Defines the converter configuration |
Cpmc_config_t | PMC configure structure |
Cpmc_lpo_clock_config_t | PMC LPO configuration |
CPMC_Type | |
CPORT_Type | |
Cpower_manager_callback_user_config_t | Callback configuration structure |
Cpower_manager_notify_struct_t | Power mode user configuration structure |
Cpower_manager_state_t | Power manager internal state structure |
Cpower_manager_user_config_t | Power mode user configuration structure |
CRCM_Type | |
Crcm_version_info_t | RCM module version number Implements rcm_version_info_t_Class |
Crtc_alarm_config_t | RTC alarm configuration Implements : rtc_alarm_config_t_Class |
Crtc_init_config_t | RTC Initialization structure Implements : rtc_init_config_t_Class |
Crtc_interrupt_config_t | RTC interrupt configuration. It is used to configure interrupt other than Time Alarm and Time Seconds interrupt Implements : rtc_interrupt_config_t_Class |
Crtc_register_lock_config_t | RTC Register Lock Configuration Implements : rtc_register_lock_config_t_Class |
Crtc_seconds_int_config_t | RTC Seconds Interrupt Configuration Implements : rtc_seconds_int_config_t_Class |
Crtc_timedate_t | RTC Time Date structure Implements : rtc_timedate_t_Class |
CRTC_Type | |
CS32_NVIC_Type | |
CS32_SCB_Type | |
CS32_SysTick_Type | |
Csbc_can_conf_t | CAN configuration group structure. This structure configure CAN peripheral behavior |
Csbc_can_ctr_t | CAN control register structure. This structure configure CAN peripheral behavior |
Csbc_evn_capt_t | Event capture registers structure. This structure contains Global event status, System event status, Supply event status, Transceiver event status, WAKE pin event status |
Csbc_factories_conf_t | Factory configuration structure. It contains Start-up control register and SBC configuration control register. This is non-volatile memory with limited write access. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP; Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value. Factory preset values are restored if the following conditions apply continuously for at least td(MTPNV) during battery power-up: pin RSTN is held LOW, CANH is pulled up to VBAT, CANL is pulled down to GND After the factory preset values have been restored, the SBC performs a system reset and enters Forced normal Mode. Since the CAN-bus is clamped dominant, pin RXDC is forced LOW. Pin RXD is forced HIGH during the factory preset restore process (td(MTPNV)). A falling edge on RXD caused by bit PO being set after power-on indicates that the factory preset process has been completed. Note that the write counter, WRCNTS, in the MTPNV status register is incremented every time the factory presets are restored |
Csbc_frame_t | Frame control register structure. The wake-up frame format, standard (11-bit) or extended (29-bit) identifier, is selected via bit IDE in the Frame control register |
Csbc_gl_evnt_stat_t | Global event status register. The microcontroller can monitor events via the event status registers. An extra status register, the Global event status register, is provided to help speed up software polling routines. By polling the Global event status register, the microcontroller can quickly determine the type of event captured (system, supply, transceiver or WAKE pin) and then query the relevant event status register |
Csbc_int_config_t | Init configuration structure. This structure is used for initialization of sbc |
Csbc_main_status_t | Main status register structure. The Main status register can be accessed to monitor the status of the overtemperature warning flag and to determine whether the UJA1169 has entered Normal mode after initial power-up. It also indicates the source of the most recent reset event |
Csbc_mtpnv_stat_t | MTPNV status register. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP). Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value |
Csbc_regulator_ctr_t | Regulator control register group. This structure is group of regulator settings |
Csbc_regulator_t | Regulator control register structure. This structure set power distribution control, V2/VEXT configuration, set V1 reset threshold |
Csbc_sbc_t | SBC configuration control register structure. Two operating modes have a major impact on the operation of the watchdog: Forced Normal mode and Software Development mode (Software Development mode is provided for test and development purposes only and is not a dedicated SBC operating mode; the UJA1169 can be in any functional operating mode with Software Development mode enabled). These modes are enabled and disabled via bits FNMC and SDMC respectively in the SBC configuration control register. Note that this register is located in the non-volatile memory area. The watchdog is disabled in Forced Normal mode (FNM). In Software Development mode (SDM), the watchdog can be disabled or activated for test and software debugging purposes |
Csbc_start_up_t | Start-up control register structure. This structure contains settings of RSTN output reset pulse width and V2/VEXT start-up control |
Csbc_status_group_t | Status group structure. All statuses of SBC are stored in this structure |
Csbc_sup_evnt_stat_t | Supply event status register |
Csbc_supply_evnt_t | Supply event capture enable register structure. This structure enables or disables detection of V2/VEXT overvoltage, undervoltage and V1 undervoltage enable |
Csbc_supply_status_t | Supply voltage status register structure. V2/VEXT and V1 undervoltage and overvoltage status |
Csbc_sys_evnt_stat_t | System event status register. Wake-up and interrupt event diagnosis in the UJA1169 is intended to provide the microcontroller with information on the status of a range of features and functions. This information is stored in the event status registers and is signaled on pin RXD, if enabled |
Csbc_sys_evnt_t | System event capture enable register structure. This structure enables or disables overtemperature warning, SPI failure enable |
Csbc_trans_evnt_stat_t | Transceiver event status register |
Csbc_trans_evnt_t | Transceiver event capture enable register structure. Can bus silence, Can failure and Can wake-up settings |
Csbc_trans_stat_t | Transceiver status register structure. There are stored CAN transceiver statuses |
Csbc_wake_evnt_stat_t | WAKE pin event status register |
Csbc_wake_t | WAKE pin event capture enable register structure. Local wake-up is enabled via bits WPRE and WPFE in the WAKE pin event capture enable register. A wake-up event is triggered by a LOW-to-HIGH (ifWPRE = 1) and/or a HIGH-to-LOW (if WPFE = 1) transition on the WAKE pin. This arrangement allows for maximum flexibility when designing a local wake-up circuit. In applications that do not use the local wake-up facility, local wake-up should be disabled and the WAKE pin connected to GND |
Csbc_wtdog_ctr_t | Watchdog control register structure. Watchdog configuration structure |
Csbc_wtdog_status_t | Watchdog status register structure. Information on the status of the watchdog is available from the Watchdog status register. This register also indicates whether Forced Normal and Software Development modes are active |
Cscg_clock_mode_config_t | SCG Clock Mode Configuration structure. Implements scg_clock_mode_config_t_Class |
Cscg_clockout_config_t | SCG ClockOut Configuration structure. Implements scg_clockout_config_t_Class |
Cscg_config_t | SCG configure structure. Implements scg_config_t_Class |
Cscg_firc_config_t | SCG fast IRC clock configuration. Implements scg_firc_config_t_Class |
Cscg_rtc_config_t | SCG RTC configuration. Implements scg_rtc_config_t_Class |
Cscg_sirc_config_t | SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class |
Cscg_sosc_config_t | SCG system OSC configuration. Implements scg_sosc_config_t_Class |
Cscg_spll_config_t | SCG system PLL configuration. Implements scg_spll_config_t_Class |
Cscg_system_clock_config_t | SCG system clock configuration. Implements scg_system_clock_config_t_Class |
CSCG_Type | |
Csim_clock_config_t | SIM configure structure. Implements sim_clock_config_t_Class |
Csim_clock_out_config_t | SIM ClockOut configuration. Implements sim_clock_out_config_t_Class |
Csim_lpo_clock_config_t | SIM LPO Clocks configuration. Implements sim_lpo_clock_config_t_Class |
Csim_plat_gate_config_t | SIM Platform Gate Clock configuration. Implements sim_plat_gate_config_t_Class |
Csim_tclk_config_t | SIM Platform Gate Clock configuration. Implements sim_tclk_config_t_Class |
Csim_trace_clock_config_t | SIM Debug Trace clock configuration. Implements sim_trace_clock_config_t_Class |
CSIM_Type | |
Csmc_power_mode_config_t | Power mode control configuration used for calling the SMC_SYS_SetPowerMode API Implements smc_power_mode_config_t_Class |
Csmc_power_mode_protection_config_t | Power mode protection configuration Implements smc_power_mode_protection_config_t_Class |
CSMC_Type | |
Csmc_version_info_t | SMC module version number Implements smc_version_info_t_Class |
Ctrgmux_inout_mapping_config_t | Configuration structure for pairing source triggers with target modules |
CTRGMUX_Type | |
Ctrgmux_user_config_t | User configuration structure for the TRGMUX driver |
Cwdog_op_mode_t | WDOG configuration structure Implements : wdog_op_mode_t_Class |
CWDOG_Type | |
Cwdog_user_config_t | WDOG configuration structure Implements : wdog_user_config_t_Class |