![]() |
S32 SDK
|
Modules | |
LPI2C Register Masks | |
Data Structures | |
struct | LPI2C_Type |
Macros | |
#define | LPI2C_INSTANCE_COUNT (1u) |
#define | LPI2C0_BASE (0x40066000u) |
#define | LPI2C0 ((LPI2C_Type *)LPI2C0_BASE) |
#define | LPI2C_BASE_ADDRS { LPI2C0_BASE } |
#define | LPI2C_BASE_PTRS { LPI2C0 } |
#define | LPI2C_IRQS_ARR_COUNT (2u) |
#define | LPI2C_MASTER_IRQS_CH_COUNT (1u) |
#define | LPI2C_SLAVE_IRQS_CH_COUNT (1u) |
#define | LPI2C_MASTER_IRQS { LPI2C0_Master_IRQn } |
#define | LPI2C_SLAVE_IRQS { LPI2C0_Slave_IRQn } |
Typedefs | |
typedef struct LPI2C_Type * | LPI2C_MemMapPtr |
#define LPI2C0 ((LPI2C_Type *)LPI2C0_BASE) |
#define LPI2C0_BASE (0x40066000u) |
#define LPI2C_BASE_ADDRS { LPI2C0_BASE } |
#define LPI2C_BASE_PTRS { LPI2C0 } |
#define LPI2C_INSTANCE_COUNT (1u) |
#define LPI2C_IRQS_ARR_COUNT (2u) |
#define LPI2C_MASTER_IRQS { LPI2C0_Master_IRQn } |
#define LPI2C_MASTER_IRQS_CH_COUNT (1u) |
#define LPI2C_SLAVE_IRQS { LPI2C0_Slave_IRQn } |
#define LPI2C_SLAVE_IRQS_CH_COUNT (1u) |
typedef struct LPI2C_Type * LPI2C_MemMapPtr |