S32 SDK
lpspi_hal.c
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1 /*
2  * Copyright (c) 2013 - 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
57 #include "lpspi_hal.h"
58 
59 
60 /*******************************************************************************
61  * Definitions
62  ******************************************************************************/
63 
64 /*******************************************************************************
65  * Variables
66  ******************************************************************************/
67 
68 /*******************************************************************************
69  * Code
70  ******************************************************************************/
71 
72 /*FUNCTION**********************************************************************
73  *
74  * Function Name : LPSPI_HAL_Init
75  * Description : Resets the LPSPI internal logic and registers to their default settings.
76  *
77  * This function first performs a software reset of the LPSPI module which resets the
78  * internal LPSPI logic and most registers, then proceeds to manually reset all of the
79  * LPSPI registers to their default setting to ensuring these registers at programmed to
80  * their default value which includes disabling the module.
81  * Implements : LPSPI_HAL_Init_Activity
82  *
83  *END**************************************************************************/
85 {
86  /* Software reset the internal logic */
87  base->CR = LPSPI_CR_RST_MASK;
88  /* Now bring the LPSPI module out of reset and clear CR register */
89  base->CR = (uint32_t)0x0;
90 }
91 
92 /*FUNCTION**********************************************************************
93  *
94  * Function Name : LPSPI_HAL_Config
95  * Description : Configures the LPSPI registers to a user defined configuration.
96  *
97  * Note, the LPSPI module must first be disabled prior to calling this function. It is recommended
98  * to first call the LPSPI_HAL_Init function prior to calling this function.
99  * This function configures the LPSPI based on the configuration passed in by the user
100  * for normal SPI mode operation. Recommend single bit transfer: txCmd.width = LPSPI_SINGLE_BIT_XFER,
101  * otherwise you will have to call function LPSPI_HAL_SetPinConfigMode to change the pin config.
102  * This function sets the TX and RX FIFO watermarks to 0 such that the write blocking and read
103  * blocking functions can be used following the init.
104  * Implements : LPSPI_HAL_Config_Activity
105  *
106  *END**************************************************************************/
108  lpspi_tx_cmd_config_t * txCmdCfgSet, uint32_t * actualBaudRate)
109 {
110  uint32_t tcrPre;
111  status_t error;
112 
113  /* Set for master or slave mode */
115  {
116  return STATUS_ERROR;
117  }
118 
119  if (config->lpspiMode == LPSPI_MASTER)
120  {
121  /* First, set the baudrate and get the prescalar value */
122  *actualBaudRate = LPSPI_HAL_SetBaudRate(base, config->baudRate, config->lpspiSrcClk,
123  &tcrPre);
124  if (*actualBaudRate == (uint32_t)0)
125  {
126  return STATUS_ERROR;
127  }
128 
129  /* Populate the TCR Prescaler */
130  txCmdCfgSet->preDiv = tcrPre;
131 
132  }
133  /* Configure the desired PCS polarity */
134  error = LPSPI_HAL_SetPcsPolarityMode(base, txCmdCfgSet->whichPcs, config->pcsPol);
135  if(error != STATUS_SUCCESS)
136  {
137  return error;
138  }
139  /* Set Pin configuration for SDO-out and SDI-in */
141  if(error != STATUS_SUCCESS)
142  {
143  return error;
144  }
145  /* Enable LPSPI */
146  base->CR = base->CR | LPSPI_CR_MEN(1U);
147 
148  /* Program the transmit command register with all of the relevant parameters */
149  LPSPI_HAL_SetTxCommandReg(base, txCmdCfgSet);
150 
151  /* Set FIFO watermarks to 0 */
152  LPSPI_HAL_SetRxWatermarks(base, 0U);
153  LPSPI_HAL_SetTxWatermarks(base, 0U);
154 
155  return STATUS_SUCCESS;
156 }
157 
158 /*FUNCTION**********************************************************************
159  *
160  * Function Name : LPSPI_HAL_GetVersionId
161  * Description : Gets the Major, Minor and Feature ID of the LPSPI module.
162  * Implements : LPSPI_HAL_GetVersionId_Activity
163  *
164  *END**************************************************************************/
165 void LPSPI_HAL_GetVersionId(const LPSPI_Type * base, uint32_t * major, uint32_t * minor,
166  uint32_t * feature)
167 {
171 }
172 
173 /*FUNCTION**********************************************************************
174  *
175  * Function Name : LPSPI_HAL_Disable
176  * Description : Disables the LPSPI module.
177  *
178  * Note that this function returns STATUS_BUSY if it is detected that the Module Busy Flag
179  * (MBF) is set, otherwise, if success, it returns STATUS_SUCCESS.
180  * Implements : LPSPI_HAL_Disable_Activity
181  *
182  *END**************************************************************************/
184 {
185  uint32_t lpspi_tmp = base->SR;
186  lpspi_tmp = (lpspi_tmp & LPSPI_SR_MBF_MASK) >> LPSPI_SR_MBF_SHIFT;
187 
188  if (lpspi_tmp == (uint32_t)1)
189  {
190  return STATUS_BUSY;
191  }
192  else
193  {
194  base->CR = base->CR & (~(LPSPI_CR_MEN_MASK));
195  return STATUS_SUCCESS;
196  }
197 }
198 
199 /*FUNCTION**********************************************************************
200  *
201  * Function Name : LPSPI_HAL_GetVersionId
202  * Description : Configures the LPSPI for master or slave.
203  *
204  * Note that the LPSPI module must first be disabled before configuring this.
205  * Implements : LPSPI_HAL_SetMasterSlaveMode_Activity
206  *
207  *END**************************************************************************/
209 {
210 
211  /* If the module is enabled, return error */
212  if (true == LPSPI_HAL_IsModuleEnabled(base))
213  {
214  return STATUS_ERROR;
215  }
216  else
217  {
218  base->CFGR1 = (base->CFGR1 & (~LPSPI_CFGR1_MASTER_MASK)) | ((uint32_t)mode << LPSPI_CFGR1_MASTER_SHIFT);
219  return STATUS_SUCCESS;
220  }
221 }
222 
223 /*FUNCTION**********************************************************************
224  *
225  * Function Name : LPSPI_HAL_GetFifoSizes
226  * Description : Gets the TX and RX FIFO sizes of the LPSPI module.
227  * Implements : LPSPI_HAL_GetFifoSizes_Activity
228  *
229  *END**************************************************************************/
230 void LPSPI_HAL_GetFifoSizes(const LPSPI_Type * base, uint8_t * txFifoSize,
231  uint8_t * rxFifoSize)
232 {
233  if (txFifoSize != NULL)
234  {
235  *txFifoSize = (uint8_t)(1U << ((base->PARAM & LPSPI_PARAM_TXFIFO_MASK) >> LPSPI_PARAM_TXFIFO_SHIFT));
236  }
237  if (rxFifoSize != NULL)
238  {
239  *rxFifoSize = (uint8_t)(1U << ((base->PARAM & LPSPI_PARAM_RXFIFO_MASK) >> LPSPI_PARAM_RXFIFO_SHIFT));
240  }
241 }
242 
243 /*FUNCTION**********************************************************************
244  *
245  * Function Name : LPSPI_HAL_SetPinConfigMode
246  * Description : Flushes the LPSPI FIFOs.
247  * Implements : LPSPI_HAL_SetFlushFifoCmd_Activity
248  *
249  *END**************************************************************************/
250 void LPSPI_HAL_SetFlushFifoCmd(LPSPI_Type * base, bool flushTxFifo, bool flushRxFifo)
251 {
252  uint32_t crValue = 0;
253 
254  crValue = ((uint32_t)flushTxFifo << LPSPI_CR_RTF_SHIFT) |
255  ((uint32_t)flushRxFifo << LPSPI_CR_RRF_SHIFT);
256 
257  base->CR |= crValue;
258 
259 }
260 
261 /*FUNCTION**********************************************************************
262  *
263  * Function Name : LPSPI_HAL_ClearStatusFlag
264  * Description : Clears the LPSPI status flag.
265  *
266  * This function clears the state of one of the LPSPI status flags as requested by
267  * the user. Note, the flag must be w1c capable, if not the function returns an error.
268  * w1c capable flags are:
269  * LPSPI_WORD_COMPLETE
270  * LPSPI_FRAME_COMPLETE
271  * LPSPI_TRANSFER_COMPLETE
272  * LPSPI_TRANSMIT_ERROR
273  * LPSPI_RECEIVE_ERROR
274  * LPSPI_DATA_MATCH
275  * Implements : LPSPI_HAL_ClearStatusFlag_Activity
276  *
277  *END**************************************************************************/
279 {
280  /* If the flag is not w1c capable, return invalid parameter error */
281  if ((statusFlag == LPSPI_MODULE_BUSY) ||
282  (statusFlag == LPSPI_RX_DATA_FLAG) ||
283  (statusFlag == LPSPI_TX_DATA_FLAG))
284  {
285  return STATUS_ERROR;
286  }
287  else
288  {
289  if (statusFlag == LPSPI_ALL_STATUS)
290  {
291  base->SR |= (uint32_t)LPSPI_ALL_STATUS;
292  }
293  else
294  {
295  base->SR |= ((uint32_t)1U << (uint32_t)statusFlag);
296  }
297  return STATUS_SUCCESS;
298  }
299 }
300 
301 /*FUNCTION**********************************************************************
302  *
303  * Function Name : LPSPI_HAL_SetHostRequestMode
304  * Description : Configures the LPSPI Host Request input.
305  *
306  * This function allows the user to configure the host request input pin as follows:
307  * Enable or disable the host request functionality.
308  * Select the polarity of the host request signal.
309  * Select the source of the host request (external signal or internal trigger).
310  * Implements : LPSPI_HAL_SetHostRequestMode_Activity
311  *
312  *END**************************************************************************/
314  lpspi_host_request_select_t hostReqInput,
315  lpspi_signal_polarity_t hostReqPol,
316  bool enable)
317 {
318  uint32_t cfgr0Value = 0;
319 
320  cfgr0Value = base->CFGR0 &
322 
323  cfgr0Value |= ((uint32_t)(enable)) |
324  ((uint32_t)(hostReqPol) << LPSPI_CFGR0_HRPOL_SHIFT) |
325  ((uint32_t)(hostReqInput) << LPSPI_CFGR0_HRSEL_SHIFT);
326 
327  base->CFGR0 = cfgr0Value;
328 }
329 
330 /*FUNCTION**********************************************************************
331  *
332  * Function Name : LPSPI_HAL_SetPcsPolarityMode
333  * Description : Configures the desired LPSPI PCS polarity.
334  *
335  * This function allows the user to configure the polarity of a particular PCS signal.
336  * Note that the LPSPI module must first be disabled before configuring this.
337  * Implements : LPSPI_HAL_SetPcsPolarityMode_Activity
338  *
339  *END**************************************************************************/
341  lpspi_signal_polarity_t pcsPolarity)
342 {
343  uint32_t cfgr1Value = 0;
344 
345  /* If the module is enabled, return error */
346  if (true == LPSPI_HAL_IsModuleEnabled(base))
347  {
348  return STATUS_ERROR;
349  }
350  else
351  {
352  /* Clear the PCS polarity bit */
353  cfgr1Value = (base->CFGR1) & (~((uint32_t)1U << (LPSPI_CFGR1_PCSPOL_SHIFT + (uint32_t)whichPcs)));
354 
355  /* Configure the PCS polarity bit according to the pcsPolarity setting */
356  cfgr1Value |= (uint32_t)pcsPolarity << (LPSPI_CFGR1_PCSPOL_SHIFT + (uint32_t)whichPcs);
357 
358  base->CFGR1 = cfgr1Value;
359 
360  return STATUS_SUCCESS;
361  }
362 }
363 
364 /*FUNCTION**********************************************************************
365  *
366  * Function Name : LPSPI_HAL_SetMatchConfigMode
367  * Description : Configures the LPSPI data match configuration mode.
368  *
369  * When enabled and configured to the desired condition of type lpspi_match_config_t,
370  * the LPSPI will assert the DMF status flag if the data match condition is met.
371  * Note that the LPSPI module must first be disabled before configuring this.
372  * Implements : LPSPI_HAL_SetMatchConfigMode_Activity
373  *
374  *END**************************************************************************/
376  lpspi_match_config_t matchCondition,
377  bool rxDataMatchOnly,
378  uint32_t match0,
379  uint32_t match1)
380 {
381  uint32_t cfgr1Value = 0;
382 
383  /* If the module is enabled, return error */
384  if (true == LPSPI_HAL_IsModuleEnabled(base))
385  {
386  return STATUS_ERROR;
387  }
388  else
389  {
390  cfgr1Value = base->CFGR1 & ~(LPSPI_CFGR1_MATCFG_MASK);
391  cfgr1Value |= ((uint32_t)matchCondition << LPSPI_CFGR1_MATCFG_SHIFT);
392  base->CFGR1 = cfgr1Value;
393  base->CFGR0 = (base->CFGR0 & (~LPSPI_CFGR0_RDMO_MASK)) | ((uint32_t)rxDataMatchOnly << LPSPI_CFGR0_RDMO_SHIFT);
394  base->DMR0 = match0;
395  base->DMR1 = match1;
396 
397  return STATUS_SUCCESS;
398  }
399 }
400 
401 /*FUNCTION**********************************************************************
402  *
403  * Function Name : LPSPI_HAL_SetPinConfigMode
404  * Description : Configures the LPSPI SDO/SDI pin configuration mode.
405  *
406  * This function configures the pin mode of the LPSPI.
407  * For the SDI and SDO pins, the user can configure these pins as follows:
408  * SDI is used for input data and SDO for output data.
409  * SDO is used for input data and SDO for output data.
410  * SDI is used for input data and SDI for output data.
411  * SDO is used for input data and SDI for output data.
412  *
413  * The user has the option to configure the output data as:
414  * Output data retains last value when chip select is de-asserted (default setting).
415  * Output data is tristated when chip select is de-asserted.
416  *
417  * Finally, the user has the option to configure the PCS[3:2] pins as:
418  * Enabled for PCS operation (default setting).
419  * Disabled - this is need if the user wishes to configure the LPSPI mode for 4-bit transfers
420  * where these pins will be used as I/O data pins.
421  *
422  * Note that the LPSPI module must first be disabled before configuring this.
423  * Implements : LPSPI_HAL_SetPinConfigMode_Activity
424  *
425  *END**************************************************************************/
427  lpspi_pin_config_t pinCfg,
428  lpspi_data_out_config_t dataOutConfig,
429  bool pcs3and2Enable)
430 {
431  uint32_t cfgr1Value = 0;
432 
433  /* If the module is enabled, return error */
434  if (true == LPSPI_HAL_IsModuleEnabled(base))
435  {
436  return STATUS_ERROR;
437  }
438  else
439  {
440  cfgr1Value = base->CFGR1 &
442 
443  cfgr1Value |= ((uint32_t)(pinCfg) << LPSPI_CFGR1_PINCFG_SHIFT) |
444  ((uint32_t)(dataOutConfig) << LPSPI_CFGR1_OUTCFG_SHIFT) |
445  ((uint32_t)(!pcs3and2Enable) << LPSPI_CFGR1_PCSCFG_SHIFT); /* enable = 0 */
446 
447  base->CFGR1 = cfgr1Value;
448 
449  return STATUS_SUCCESS;
450  }
451 }
452 
453 /*FUNCTION**********************************************************************
454  *
455  * Function Name : LPSPI_HAL_SetBaudRate
456  * Description : Sets the LPSPI baud rate in bits per second.
457  *
458  * This function takes in the desired bitsPerSec (baud rate) and calculates the nearest
459  * possible baud rate without exceeding the desired baud rate, and returns the
460  * calculated baud rate in bits-per-second. It requires that the caller also provide
461  * the frequency of the module source clock (in Hertz). Also note that the baud rate
462  * does not take into affect until the Transmit Control Register (TCR) is programmed
463  * with the PRESCALE value. Hence, this function returns the PRESCALE tcrPrescaleValue
464  * parameter for later programming in the TCR. It is up to the higher level
465  * peripheral driver to alert the user of an out of range baud rate input.
466  *
467  * Note that the LPSPI module must first be disabled before configuring this.
468  * Note that the LPSPI module must be configure for master mode before configuring this.
469  * Implements : LPSPI_HAL_SetBaudRate_Activity
470  *
471  *END**************************************************************************/
472 uint32_t LPSPI_HAL_SetBaudRate(LPSPI_Type * base, uint32_t bitsPerSec,
473  uint32_t sourceClockInHz, uint32_t * tcrPrescaleValue)
474 {
475  uint32_t lpspi_tmp;
476 
477  /* For master mode configuration only, if slave mode detected, return 0.
478  * Also, the LPSPI module needs to be disabled first, if enabled, return 0
479  */
480  if (LPSPI_HAL_IsMaster(base) == false)
481  {
482  return 0;
483  }
484 
485  if (LPSPI_HAL_IsModuleEnabled(base))
486  {
487  return 0;
488  }
489 
490  uint32_t prescaler, bestPrescaler;
491  uint32_t scaler, bestScaler;
492  uint32_t realBaudrate, bestBaudrate;
493  uint32_t diff, min_diff;
494  uint32_t desiredBaudrate = bitsPerSec;
495 
496  /* find combination of prescaler and scaler resulting in baudrate closest to the
497  * requested value
498  */
499  min_diff = 0xFFFFFFFFU;
500 
501  /* Set to maximum divisor value bit settings so that if baud rate passed in is less
502  * than the minimum possible baud rate, then the SPI will be configured to the lowest
503  * possible baud rate
504  */
505  bestPrescaler = 7;
506  bestScaler = 255;
507 
508  bestBaudrate = 0; /* required to avoid compilation warning */
509 
510  /* In all for loops, if min_diff = 0, the exit for loop*/
511  for (prescaler = (uint32_t)0; prescaler < (uint32_t)8; prescaler++)
512  {
513  for (scaler = (uint32_t)0; scaler < (uint32_t)256; scaler++)
514  {
515  realBaudrate = (sourceClockInHz /
516  (s_baudratePrescaler[prescaler] * (scaler + (uint32_t)2U)));
517 
518  /* calculate the baud rate difference based on the conditional statement
519  * that states that the calculated baud rate must not exceed the desired baud rate
520  */
521  if (desiredBaudrate >= realBaudrate)
522  {
523  diff = desiredBaudrate - realBaudrate;
524  if (min_diff > diff)
525  {
526  /* a better match found */
527  min_diff = diff;
528  bestPrescaler = prescaler;
529  bestScaler = scaler;
530  bestBaudrate = realBaudrate;
531  }
532  }
533  }
534  }
535 
536  /* Write the best baud rate scalar to the CCR.
537  * Note, no need to check for error since we've already checked to make sure the module is
538  * disabled and in master mode. Also, there is a limit on the maximum divider so we will not
539  * exceed this.
540  */
541  lpspi_tmp = base->CCR;
542  lpspi_tmp &= ~(LPSPI_CCR_SCKDIV_MASK);
543  lpspi_tmp |= LPSPI_CCR_SCKDIV(bestScaler);
544  base->CCR = lpspi_tmp;
545 
546 
547  /* return the best prescaler value for user to use later */
548  *tcrPrescaleValue = bestPrescaler;
549 
550  /* return the actual calculated baud rate */
551  return bestBaudrate;
552 }
553 
554 /*FUNCTION**********************************************************************
555  *
556  * Function Name : LPSPI_HAL_SetBaudRateDivisor
557  * Description : Configures the baud rate divisor manually (only the LPSPI_CCR[SCKDIV]).
558  *
559  * This function allows the caller to manually set the baud rate divisor in the event
560  * that this divider is known and the caller does not wish to call the
561  * LPSPI_HAL_SetBaudRate function. Note that this only affects the LPSPI_CCR[SCKDIV]).
562  * The Transmit Control Register (TCR) is programmed separately with the PRESCALE value.
563  * The valid range is 0x00 to 0xFF (255), if the user inputs outside of this range, an error
564  * is returned.
565  *
566  * Note that the LPSPI module must first be disabled before configuring this.
567  * Note that the LPSPI module must be configure for master mode before configuring this.
568  * Implements : LPSPI_HAL_SetBaudRateDivisor_Activity
569  *
570  *END**************************************************************************/
572 {
573  uint32_t lpspi_tmp;
574  /* LPSPI must first be disabled before setting the SCKDIV value and set to master mode */
575  if (LPSPI_HAL_IsModuleEnabled(base))
576  {
577  return STATUS_ERROR;
578  }
579  if (LPSPI_HAL_IsMaster(base) == false)
580  {
581  return STATUS_ERROR;
582  }
583  if (divisor > (uint32_t)255)
584  {
585  return STATUS_ERROR;
586  }
587  else
588  {
589  lpspi_tmp = base->CCR;
590  lpspi_tmp &= ~(LPSPI_CCR_SCKDIV_MASK);
591  lpspi_tmp |= LPSPI_CCR_SCKDIV(divisor);
592  base->CCR = lpspi_tmp;
593 
594  return STATUS_SUCCESS;
595  }
596 }
597 
598 /*FUNCTION**********************************************************************
599  *
600  * Function Name : LPSPI_HAL_SetDelay
601  * Description : Manually configures a specific LPSPI delay parameter (module must be disabled to
602  * change the delay values).
603  *
604  * This function configures the:
605  * SCK to PCS delay, or
606  * PCS to SCK delay, or
607  * Between transfer delay.
608  *
609  * These delay names are available in type lpspi_delay_type_t.
610  *
611  * The user passes which delay they want to configure along with the delay value.
612  * This allows the user to directly set the delay values if they have
613  * pre-calculated them or if they simply wish to manually increment the value.
614  *
615  * Note that the LPSPI module must first be disabled before configuring this.
616  * Note that the LPSPI module must be configure for master mode before configuring this.
617  * Implements : LPSPI_HAL_SetDelay_Activity
618  *
619  *END**************************************************************************/
620 status_t LPSPI_HAL_SetDelay(LPSPI_Type * base, lpspi_delay_type_t whichDelay, uint32_t delay)
621 {
622  uint32_t ccrValue = 0;
623 
624  /* LPSPI must first be disabled before setting the delay value and set to master mode */
625  if (LPSPI_HAL_IsModuleEnabled(base))
626  {
627  return STATUS_ERROR;
628  }
629  if (LPSPI_HAL_IsMaster(base) == false)
630  {
631  return STATUS_ERROR;
632  }
633 
634  if (delay > (uint32_t)255)
635  {
636  return STATUS_ERROR;
637  }
638  else
639  {
640  ccrValue = base->CCR & ~(0xFFUL << (uint32_t)whichDelay);
641  ccrValue |= delay << (uint32_t)whichDelay;
642  base->CCR = ccrValue;
643  return STATUS_SUCCESS;
644  }
645 }
646 
647 /*FUNCTION**********************************************************************
648  *
649  * Function Name : LPSPI_HAL_SetTxCommandReg
650  * Description : Sets the Transmit Command Register (TCR) parameters.
651  *
652  * The Transmit Command Register (TCR) contains multiple parameters that affect
653  * the transmission of data, such as clock phase and polarity, which PCS to use,
654  * whether or not the PCS remains asserted at the completion of a frame, etc.
655  * Any writes to this register results in an immediate push of the entire register
656  * and its contents to the TX FIFO. Hence, writes to this register should include
657  * all of the desired parameters written to the register at once. Hence, the user
658  * should fill in the members of the lpspi_tx_cmd_config_t data structure and pass
659  * this to the function.
660  * Implements : LPSPI_HAL_SetTxCommandReg_Activity
661  *
662  *END**************************************************************************/
664 {
665  base->TCR = (((uint32_t)txCmdCfgSet->clkPolarity << LPSPI_TCR_CPOL_SHIFT) |
666  ((uint32_t)txCmdCfgSet->clkPhase << LPSPI_TCR_CPHA_SHIFT) |
667  ((uint32_t)txCmdCfgSet->preDiv << LPSPI_TCR_PRESCALE_SHIFT) |
668  ((uint32_t)txCmdCfgSet->whichPcs << LPSPI_TCR_PCS_SHIFT) |
669  ((uint32_t)txCmdCfgSet->lsbFirst << LPSPI_TCR_LSBF_SHIFT) |
670  ((uint32_t)txCmdCfgSet->byteSwap<< LPSPI_TCR_BYSW_SHIFT) |
671  ((uint32_t)txCmdCfgSet->contTransfer << LPSPI_TCR_CONT_SHIFT) |
672  ((uint32_t)txCmdCfgSet->contCmd << LPSPI_TCR_CONTC_SHIFT) |
673  ((uint32_t)txCmdCfgSet->rxMask << LPSPI_TCR_RXMSK_SHIFT) |
674  ((uint32_t)txCmdCfgSet->txMask << LPSPI_TCR_TXMSK_SHIFT) |
675  ((uint32_t)txCmdCfgSet->width << LPSPI_TCR_WIDTH_SHIFT) |
676  ((uint32_t)(txCmdCfgSet->frameSize - 1UL) << LPSPI_TCR_FRAMESZ_SHIFT));
677 }
678 
679 /*FUNCTION**********************************************************************
680  *
681  * Function Name : LPSPI_HAL_WriteDataBlocking
682  * Description : Writes a data into the TX data buffer and waits till complete to return.
683  *
684  * This function writes the data to the Transmit Data Register (TDR) and waits for completion
685  * before returning. If the frame size exceeds 32-bits, the user will have to manage sending
686  * the data one 32-bit word at a time.
687  * This function can be used for either master or slave mode.
688  * Note that it is required that the TX FIFO watermark be set to 0.
689  * Implements : LPSPI_HAL_WriteDataBlocking_Activity
690  *
691  *END**************************************************************************/
692 void LPSPI_HAL_WriteDataBlocking(LPSPI_Type * base, uint32_t data)
693 {
694  /* Wait until the transmit data is requested */
695  while(LPSPI_HAL_GetStatusFlag(base, LPSPI_TX_DATA_FLAG) == false) { }
696 
697  base->TDR = data;
698 
699  /* Wait until the transmit data is requested */
700  while(LPSPI_HAL_GetStatusFlag(base, LPSPI_TX_DATA_FLAG) == false) { }
701 }
702 
703 
704 /*FUNCTION**********************************************************************
705  *
706  * Function Name : LPSPI_HAL_ReadDataBlocking
707  * Description : Reads data from the data buffer but first waits till data is ready.
708  *
709  * This function reads the data from the Receive Data Register (RDR).
710  * However, before reading the data, it first waits till the read data ready status
711  * indicates the data is ready to be read.
712  * This function can be used for either master or slave mode.
713  * Note that it is required that the RX FIFO watermark be set to 0.
714  * Implements : LPSPI_HAL_ReadDataBlocking_Activity
715  *
716  *END**************************************************************************/
718 {
719  /* Wait for Receive Data Flag to indicate receive data is ready */
720  while(LPSPI_HAL_GetStatusFlag(base, LPSPI_RX_DATA_FLAG) == false) { }
721 
722  /* Now read the received data */
723  return base->RDR;
724 }
725 
726 /*******************************************************************************
727  * EOF
728  ******************************************************************************/
static void LPSPI_HAL_SetTxWatermarks(LPSPI_Type *base, uint32_t txWater)
Sets the TX FIFO watermark values.
Definition: lpspi_hal.h:433
void LPSPI_HAL_GetFifoSizes(const LPSPI_Type *base, uint8_t *txFifoSize, uint8_t *rxFifoSize)
Gets the TX and RX FIFO sizes of the LPSPI module.
Definition: lpspi_hal.c:230
#define LPSPI_VERID_FEATURE_SHIFT
Definition: S32K144.h:6232
lpspi_clock_phase_t clkPhase
Definition: lpspi_hal.h:227
#define LPSPI_PARAM_TXFIFO_MASK
Definition: S32K144.h:6244
static const uint32_t s_baudratePrescaler[]
Definition: lpspi_hal.h:272
lpspi_transfer_width_t width
Definition: lpspi_hal.h:218
#define LPSPI_VERID_FEATURE_MASK
Definition: S32K144.h:6231
#define LPSPI_TCR_RXMSK_SHIFT
Definition: S32K144.h:6473
__IO uint32_t CFGR0
Definition: S32K144.h:6176
status_t LPSPI_HAL_Config(LPSPI_Type *base, const lpspi_init_config_t *config, lpspi_tx_cmd_config_t *txCmdCfgSet, uint32_t *actualBaudRate)
Configures the LPSPI registers to a user defined configuration.
Definition: lpspi_hal.c:107
lpspi_signal_polarity_t
LPSPI Signal (PCS and Host Request) Polarity configuration. Implements : lpspi_signal_polarity_t_Clas...
Definition: lpspi_hal.h:116
#define LPSPI_CFGR1_MATCFG_SHIFT
Definition: S32K144.h:6399
#define LPSPI_CFGR1_PCSCFG_MASK
Definition: S32K144.h:6410
#define LPSPI_CR_RTF_SHIFT
Definition: S32K144.h:6270
#define LPSPI_SR_MBF_MASK
Definition: S32K144.h:6310
#define LPSPI_PARAM_RXFIFO_MASK
Definition: S32K144.h:6248
#define LPSPI_CFGR1_OUTCFG_MASK
Definition: S32K144.h:6406
#define LPSPI_VERID_MAJOR_SHIFT
Definition: S32K144.h:6240
lpspi_signal_polarity_t pcsPol
Definition: lpspi_hal.h:255
void LPSPI_HAL_SetFlushFifoCmd(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)
Flushes the LPSPI FIFOs.
Definition: lpspi_hal.c:250
__I uint32_t PARAM
Definition: S32K144.h:6170
void LPSPI_HAL_GetVersionId(const LPSPI_Type *base, uint32_t *major, uint32_t *minor, uint32_t *feature)
Gets the Major, Minor and Feature ID of the LPSPI module.
Definition: lpspi_hal.c:165
#define LPSPI_TCR_PCS_SHIFT
Definition: S32K144.h:6493
status_t LPSPI_HAL_SetDelay(LPSPI_Type *base, lpspi_delay_type_t whichDelay, uint32_t delay)
Manually configures a specific LPSPI delay parameter (module must be disabled to change the delay val...
Definition: lpspi_hal.c:620
__IO uint32_t CR
Definition: S32K144.h:6172
lpspi_which_pcs_t
LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure). Implements : lpspi_which_p...
Definition: lpspi_hal.h:143
#define LPSPI_CR_MEN(x)
Definition: S32K144.h:6256
status_t LPSPI_HAL_SetPinConfigMode(LPSPI_Type *base, lpspi_pin_config_t pinCfg, lpspi_data_out_config_t dataOutConfig, bool pcs3and2Enable)
Configures the LPSPI SDO/SDI pin configuration mode.
Definition: lpspi_hal.c:426
#define LPSPI_CFGR1_PINCFG_MASK
Definition: S32K144.h:6402
lpspi_data_out_config_t
LPSPI data output configuration. Implements : lpspi_data_out_config_t_Class.
Definition: lpspi_hal.h:191
#define LPSPI_CFGR1_MASTER_MASK
Definition: S32K144.h:6378
#define LPSPI_CFGR0_HRSEL_MASK
Definition: S32K144.h:6365
static bool LPSPI_HAL_IsMaster(const LPSPI_Type *base)
Returns whether the LPSPI module is in master mode.
Definition: lpspi_hal.h:384
lpspi_host_request_select_t
LPSPI Host Request select configuration. Implements : lpspi_host_request_select_t_Class.
Definition: lpspi_hal.h:125
#define LPSPI_TCR_FRAMESZ_SHIFT
Definition: S32K144.h:6461
__IO uint32_t DMR0
Definition: S32K144.h:6179
LPSPI initialization configuration structure.
Definition: lpspi_hal.h:250
#define LPSPI_TCR_BYSW_SHIFT
Definition: S32K144.h:6485
__IO uint32_t CCR
Definition: S32K144.h:6182
uint32_t lpspiSrcClk
Definition: lpspi_hal.h:252
lpspi_status_flag_t
LPSPI status flags. Implements : lpspi_status_flag_t_Class.
Definition: lpspi_hal.h:90
#define LPSPI_VERID_MINOR_MASK
Definition: S32K144.h:6235
#define LPSPI_SR_MBF_SHIFT
Definition: S32K144.h:6311
status_t LPSPI_HAL_SetBaudRateDivisor(LPSPI_Type *base, uint32_t divisor)
Configures the baud rate divisor manually (only the LPSPI_CCR[SCKDIV]).
Definition: lpspi_hal.c:571
#define LPSPI_CFGR0_RDMO_SHIFT
Definition: S32K144.h:6374
#define LPSPI_CFGR1_PCSPOL_SHIFT
Definition: S32K144.h:6395
status_t LPSPI_HAL_SetPcsPolarityMode(LPSPI_Type *base, lpspi_which_pcs_t whichPcs, lpspi_signal_polarity_t pcsPolarity)
Configures the desired LPSPI PCS polarity.
Definition: lpspi_hal.c:340
#define LPSPI_PARAM_TXFIFO_SHIFT
Definition: S32K144.h:6245
#define LPSPI_CFGR0_RDMO_MASK
Definition: S32K144.h:6373
#define LPSPI_CFGR0_HRPOL_MASK
Definition: S32K144.h:6361
#define LPSPI_CR_RST_MASK
Definition: S32K144.h:6257
#define LPSPI_TCR_CPOL_SHIFT
Definition: S32K144.h:6505
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
#define LPSPI_CFGR0_HRPOL_SHIFT
Definition: S32K144.h:6362
#define LPSPI_CFGR1_PINCFG_SHIFT
Definition: S32K144.h:6403
uint32_t LPSPI_HAL_SetBaudRate(LPSPI_Type *base, uint32_t bitsPerSec, uint32_t sourceClockInHz, uint32_t *tcrPrescaleValue)
Sets the LPSPI baud rate in bits per second.
Definition: lpspi_hal.c:472
__IO uint32_t TCR
Definition: S32K144.h:6186
#define LPSPI_CFGR0_HREN_MASK
Definition: S32K144.h:6357
__IO uint32_t DMR1
Definition: S32K144.h:6180
void LPSPI_HAL_WriteDataBlocking(LPSPI_Type *base, uint32_t data)
Writes a data into the TX data buffer and waits till complete to return.
Definition: lpspi_hal.c:692
#define LPSPI_VERID_MINOR_SHIFT
Definition: S32K144.h:6236
#define LPSPI_TCR_LSBF_SHIFT
Definition: S32K144.h:6489
__IO uint32_t SR
Definition: S32K144.h:6173
#define LPSPI_TCR_PRESCALE_SHIFT
Definition: S32K144.h:6497
#define LPSPI_TCR_TXMSK_SHIFT
Definition: S32K144.h:6469
lpspi_which_pcs_t whichPcs
Definition: lpspi_hal.h:225
#define LPSPI_PARAM_RXFIFO_SHIFT
Definition: S32K144.h:6249
void LPSPI_HAL_Init(LPSPI_Type *base)
Resets the LPSPI internal logic and registers to their default settings.
Definition: lpspi_hal.c:84
#define LPSPI_CR_RRF_SHIFT
Definition: S32K144.h:6274
status_t LPSPI_HAL_ClearStatusFlag(LPSPI_Type *base, lpspi_status_flag_t statusFlag)
Clears the LPSPI status flag.
Definition: lpspi_hal.c:278
static void LPSPI_HAL_SetRxWatermarks(LPSPI_Type *base, uint32_t rxWater)
Sets the RX FIFO watermark values.
Definition: lpspi_hal.h:416
LPSPI Transmit Command Register configuration structure.
Definition: lpspi_hal.h:215
#define LPSPI_CFGR0_HRSEL_SHIFT
Definition: S32K144.h:6366
lpspi_master_slave_mode_t
LPSPI master or slave configuration. Implements : lpspi_master_slave_mode_t_Class.
Definition: lpspi_hal.h:134
lpspi_pin_config_t
LPSPI pin (SDO and SDI) configuration. Implements : lpspi_pin_config_t_Class.
Definition: lpspi_hal.h:171
status_t LPSPI_HAL_SetMatchConfigMode(LPSPI_Type *base, lpspi_match_config_t matchCondition, bool rxDataMatchOnly, uint32_t match0, uint32_t match1)
Configures the LPSPI data match configuration mode.
Definition: lpspi_hal.c:375
#define LPSPI_CFGR1_PCSCFG_SHIFT
Definition: S32K144.h:6411
lpspi_master_slave_mode_t lpspiMode
Definition: lpspi_hal.h:254
#define LPSPI_CFGR1_MATCFG_MASK
Definition: S32K144.h:6398
__O uint32_t TDR
Definition: S32K144.h:6187
uint32_t LPSPI_HAL_ReadDataBlocking(const LPSPI_Type *base)
Reads data from the data buffer but first waits till data is ready.
Definition: lpspi_hal.c:717
#define LPSPI_CFGR1_MASTER_SHIFT
Definition: S32K144.h:6379
#define LPSPI_CCR_SCKDIV_MASK
Definition: S32K144.h:6425
#define LPSPI_VERID_MAJOR_MASK
Definition: S32K144.h:6239
#define LPSPI_TCR_CONT_SHIFT
Definition: S32K144.h:6481
#define LPSPI_CFGR1_OUTCFG_SHIFT
Definition: S32K144.h:6407
lpspi_delay_type_t
LPSPI delay type selection Implements : lpspi_delay_type_t_Class.
Definition: lpspi_hal.h:261
static bool LPSPI_HAL_IsModuleEnabled(const LPSPI_Type *base)
Check if LPSPI module is enabled.
Definition: lpspi_hal.h:351
lpspi_sck_polarity_t clkPolarity
Definition: lpspi_hal.h:228
void LPSPI_HAL_SetTxCommandReg(LPSPI_Type *base, const lpspi_tx_cmd_config_t *txCmdCfgSet)
Sets the Transmit Command Register (TCR) parameters.
Definition: lpspi_hal.c:663
__I uint32_t RDR
Definition: S32K144.h:6190
#define LPSPI_TCR_CONTC_SHIFT
Definition: S32K144.h:6477
status_t LPSPI_HAL_Disable(LPSPI_Type *base)
Disables the LPSPI module.
Definition: lpspi_hal.c:183
#define LPSPI_TCR_WIDTH_SHIFT
Definition: S32K144.h:6465
status_t LPSPI_HAL_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)
Configures the LPSPI for master or slave.
Definition: lpspi_hal.c:208
#define LPSPI_CR_MEN_MASK
Definition: S32K144.h:6253
#define LPSPI_CCR_SCKDIV(x)
Definition: S32K144.h:6428
void LPSPI_HAL_SetHostRequestMode(LPSPI_Type *base, lpspi_host_request_select_t hostReqInput, lpspi_signal_polarity_t hostReqPol, bool enable)
Configures the LPSPI Host Request input.
Definition: lpspi_hal.c:313
__I uint32_t VERID
Definition: S32K144.h:6169
__IO uint32_t CFGR1
Definition: S32K144.h:6177
static bool LPSPI_HAL_GetStatusFlag(const LPSPI_Type *base, lpspi_status_flag_t statusFlag)
Gets the LPSPI status flag state.
Definition: lpspi_hal.h:459
lpspi_match_config_t
LPSPI Match configuration options. Implements : lpspi_match_config_t_Class.
Definition: lpspi_hal.h:154
#define LPSPI_TCR_CPHA_SHIFT
Definition: S32K144.h:6501