S32 SDK
lpuart_hal.h
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1 /*
2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
38 #ifndef LPUART_HAL_H__
39 #define LPUART_HAL_H__
40 
41 #include "device_registers.h"
42 #include "status.h"
43 #include <stdbool.h>
44 #include <stddef.h>
45 
51 /*******************************************************************************
52  * Definitions
53  ******************************************************************************/
54 #define LPUART_SHIFT (16U)
55 #define LPUART_BAUD_REG_ID (1U)
56 #define LPUART_STAT_REG_ID (2U)
57 #define LPUART_CTRL_REG_ID (3U)
58 #define LPUART_DATA_REG_ID (4U)
59 #define LPUART_MATCH_REG_ID (5U)
60 #define LPUART_MODIR_REG_ID (6U)
61 #define LPUART_FIFO_REG_ID (7U)
62 #define LPUART_WATER_REG_ID (8U)
63 
68 typedef enum
69 {
73 
78 typedef enum
79 {
84 
89 typedef enum
90 {
95 
100 typedef enum
101 {
103  LPUART_STOPS = 0x1U
105 
110 typedef enum
111 {
115 
123 typedef enum
124 {
132 
137 typedef enum
138 {
142 
147 typedef enum
148 {
154 
159 typedef enum
160 {
166 
173 typedef enum
174 {
184 
189 typedef enum
190 {
194 
201 typedef enum
202 {
206 
211 typedef struct
212 {
213  unsigned idleLineType : 1;
215  unsigned rxWakeIdleDetect : 1;
221 
229 typedef enum
230 {
232  | (uint32_t)LPUART_STAT_TDRE_SHIFT), \
234  LPUART_TX_COMPLETE = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
235  | (uint32_t)LPUART_STAT_TC_SHIFT), \
238  | (uint32_t)LPUART_STAT_RDRF_SHIFT), \
240  LPUART_IDLE_LINE_DETECT = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
241  | (uint32_t)LPUART_STAT_IDLE_SHIFT), \
243  LPUART_RX_OVERRUN = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
244  | (uint32_t)LPUART_STAT_OR_SHIFT), \
246  LPUART_NOISE_DETECT = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
247  | (uint32_t)LPUART_STAT_NF_SHIFT), \
249  LPUART_FRAME_ERR = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
250  | (uint32_t)LPUART_STAT_FE_SHIFT), \
252  LPUART_PARITY_ERR = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
253  | (uint32_t)LPUART_STAT_PF_SHIFT), \
256  | (uint32_t)LPUART_STAT_LBKDIF_SHIFT), \
258  LPUART_RX_ACTIVE_EDGE_DETECT = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
259  | (uint32_t)LPUART_STAT_RXEDGIF_SHIFT), \
261  LPUART_RX_ACTIVE = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
262  | (uint32_t)LPUART_STAT_RAF_SHIFT), \
264  LPUART_NOISE_IN_CURRENT_WORD = (((uint32_t)LPUART_DATA_REG_ID << (uint32_t)LPUART_SHIFT) \
265  | (uint32_t)LPUART_DATA_NOISY_SHIFT), \
268  | (uint32_t)LPUART_DATA_PARITYE_SHIFT), \
271  LPUART_MATCH_ADDR_ONE = (((uint32_t)LPUART_STAT_REG_ID << (uint32_t)LPUART_SHIFT) \
272  | (uint32_t)LPUART_STAT_MA1F_SHIFT), \
275  | (uint32_t)LPUART_STAT_MA2F_SHIFT), \
277 #endif
279  LPUART_FIFO_TX_OF = (((uint32_t)LPUART_FIFO_REG_ID << (uint32_t)LPUART_SHIFT) \
280  | (uint32_t)LPUART_FIFO_TXOF_SHIFT), \
282  LPUART_FIFO_RX_UF = (((uint32_t)LPUART_FIFO_REG_ID << (uint32_t)LPUART_SHIFT) \
283  | (uint32_t)LPUART_FIFO_RXUF_SHIFT) \
285 #endif
287 
292 typedef enum
293 {
295  | (uint32_t)LPUART_BAUD_LBKDIE_SHIFT),
296  LPUART_INT_RX_ACTIVE_EDGE = (((uint32_t)LPUART_BAUD_REG_ID << (uint32_t)LPUART_SHIFT) \
297  | (uint32_t)LPUART_BAUD_RXEDGIE_SHIFT),
299  | (uint32_t)LPUART_CTRL_TIE_SHIFT),
300  LPUART_INT_TX_COMPLETE = (((uint32_t)LPUART_CTRL_REG_ID << (uint32_t)LPUART_SHIFT) \
301  | (uint32_t)LPUART_CTRL_TCIE_SHIFT),
303  | (uint32_t)LPUART_CTRL_RIE_SHIFT),
304  LPUART_INT_IDLE_LINE = (((uint32_t)LPUART_CTRL_REG_ID << (uint32_t)LPUART_SHIFT) \
305  | (uint32_t)LPUART_CTRL_ILIE_SHIFT),
307  | (uint32_t)LPUART_CTRL_ORIE_SHIFT),
308  LPUART_INT_NOISE_ERR_FLAG = (((uint32_t)LPUART_CTRL_REG_ID << (uint32_t)LPUART_SHIFT) \
309  | (uint32_t)LPUART_CTRL_NEIE_SHIFT),
311  | (uint32_t)LPUART_CTRL_FEIE_SHIFT),
312  LPUART_INT_PARITY_ERR_FLAG = (((uint32_t)LPUART_CTRL_REG_ID << (uint32_t)LPUART_SHIFT) \
313  | (uint32_t)LPUART_CTRL_PEIE_SHIFT),
314 #if FEATURE_LPUART_HAS_ADDRESS_MATCHING
316  | (uint32_t)LPUART_CTRL_MA1IE_SHIFT),
317  LPUART_INT_MATCH_ADDR_TWO = (((uint32_t)LPUART_CTRL_REG_ID << (uint32_t)LPUART_SHIFT) \
318  | (uint32_t)LPUART_CTRL_MA2IE_SHIFT),
319 #endif
320 #if FEATURE_LPUART_FIFO_SIZE > 0U
322  | (uint32_t)LPUART_FIFO_TXOFE_SHIFT),
323  LPUART_INT_FIFO_RXUF = (((uint32_t)LPUART_FIFO_REG_ID << (uint32_t)LPUART_SHIFT) \
324  | (uint32_t)LPUART_FIFO_RXUFE_SHIFT)
325 #endif
327 
328 
329 /*******************************************************************************
330  * API
331  ******************************************************************************/
332 
333 #if defined(__cplusplus)
334 extern "C" {
335 #endif
336 
350 void LPUART_HAL_Init(LPUART_Type * base);
351 
363 static inline void LPUART_HAL_SetTransmitterCmd(LPUART_Type * base, bool enable)
364 {
365  base->CTRL = (base->CTRL & ~LPUART_CTRL_TE_MASK) | ((enable ? 1UL : 0UL) << LPUART_CTRL_TE_SHIFT);
366  /* Wait for the register write operation to complete */
367  while((bool)((base->CTRL & LPUART_CTRL_TE_MASK) != 0U) != enable) {}
368 }
369 
381 static inline bool LPUART_HAL_GetTransmitterCmd(const LPUART_Type * base)
382 {
383  return (((base->CTRL >> LPUART_CTRL_TE_SHIFT) & 1U) > 0U);
384 }
385 
397 static inline void LPUART_HAL_SetReceiverCmd(LPUART_Type * base, bool enable)
398 {
399  base->CTRL = (base->CTRL & ~LPUART_CTRL_RE_MASK) | ((enable ? 1UL : 0UL) << LPUART_CTRL_RE_SHIFT);
400  /* Wait for the register write operation to complete */
401  while((bool)((base->CTRL & LPUART_CTRL_RE_MASK) != 0U) != enable) {}
402 }
403 
415 static inline bool LPUART_HAL_GetReceiverCmd(const LPUART_Type * base)
416 {
417  return (((base->CTRL >> LPUART_CTRL_RE_SHIFT) & 1U) > 0U);
418 }
419 
434  uint32_t sourceClockInHz,
435  uint32_t desiredBaudRate);
436 
447 static inline void LPUART_HAL_SetBaudRateDivisor(LPUART_Type * base, uint32_t baudRateDivisor)
448 {
449 #ifdef DEV_ERROR_DETECT
450  DEV_ASSERT((baudRateDivisor < 0x1FFFU) && (baudRateDivisor > 1U));
451 #endif
452  uint32_t baudRegValTemp;
453 
454  baudRegValTemp = base->BAUD;
455  baudRegValTemp &= ~(LPUART_BAUD_SBR_MASK);
456  /* Removed the shift operation as the SBR field position is zero; shifting with 0 violates MISRA */
457  baudRegValTemp |= baudRateDivisor & LPUART_BAUD_SBR_MASK;
458  base->BAUD = baudRegValTemp;
459 }
460 
461 #if FEATURE_LPUART_HAS_BAUD_RATE_OVER_SAMPLING_SUPPORT
462 
477 static inline void LPUART_HAL_SetOversamplingRatio(LPUART_Type * base, uint32_t overSamplingRatio)
478 {
479 #ifdef DEV_ERROR_DETECT
480  DEV_ASSERT(overSamplingRatio < 0x1FU);
481 #endif
482  uint32_t baudRegValTemp;
483 
484  baudRegValTemp = base->BAUD;
485  baudRegValTemp &= ~(LPUART_BAUD_OSR_MASK);
486  baudRegValTemp |= LPUART_BAUD_OSR(overSamplingRatio);
487  base->BAUD = baudRegValTemp;
488 }
489 #endif
490 
491 #if FEATURE_LPUART_HAS_BOTH_EDGE_SAMPLING_SUPPORT
492 
506 static inline void LPUART_HAL_SetBothEdgeSamplingCmd(LPUART_Type * base, bool enable)
507 {
508  base->BAUD = (base->BAUD & ~LPUART_BAUD_BOTHEDGE_MASK) | ((enable ? 1UL : 0UL) << LPUART_BAUD_BOTHEDGE_SHIFT);
509 }
510 #endif
511 
521 static inline bool LPUART_HAL_GetRxDataPolarity(const LPUART_Type * base)
522 {
523  return (((base->STAT >> LPUART_STAT_RXINV_SHIFT) & 1U) > 0U);
524 }
525 
535 static inline void LPUART_HAL_SetRxDataPolarity(LPUART_Type * base, bool polarity)
536 {
538  ((polarity ? 1UL : 0UL) << LPUART_STAT_RXINV_SHIFT);
539 }
540 
553 
565 void LPUART_HAL_SetParityMode(LPUART_Type * base, lpuart_parity_mode_t parityModeType);
566 
579 static inline void LPUART_HAL_SetStopBitCount(LPUART_Type * base, lpuart_stop_bit_count_t stopBitCount)
580 {
581  base->BAUD = (base->BAUD & ~LPUART_BAUD_SBNS_MASK) | ((uint32_t)stopBitCount << LPUART_BAUD_SBNS_SHIFT);
582 }
583 
594 static inline const volatile void * LPUART_HAL_GetDataRegAddr(const LPUART_Type * base)
595 {
596  return &(base->DATA);
597 }
598 
616 void LPUART_HAL_SetIntMode(LPUART_Type * base, lpuart_interrupt_t intSrc, bool enable);
617 
628 bool LPUART_HAL_GetIntMode(const LPUART_Type * base, lpuart_interrupt_t intSrc);
629 
630 #if FEATURE_LPUART_HAS_DMA_ENABLE
631 
641 static inline void LPUART_HAL_SetTxDmaCmd(LPUART_Type * base, bool enable)
642 {
643  base->BAUD = (base->BAUD & ~LPUART_BAUD_TDMAE_MASK) | ((enable ? 1UL : 0UL) << LPUART_BAUD_TDMAE_SHIFT);
644 }
645 
656 static inline void LPUART_HAL_SetRxDmaCmd(LPUART_Type * base, bool enable)
657 {
658  base->BAUD = (base->BAUD & ~LPUART_BAUD_RDMAE_MASK) | ((enable ? 1UL : 0UL) << LPUART_BAUD_RDMAE_SHIFT);
659 }
660 
671 static inline bool LPUART_HAL_IsTxDmaEnabled(const LPUART_Type * base)
672 {
673  return (((base->BAUD >> LPUART_BAUD_TDMAE_SHIFT) & 1U) > 0U);
674 }
675 
686 static inline bool LPUART_HAL_IsRxDmaEnabled(const LPUART_Type * base)
687 {
688  return (((base->BAUD >> LPUART_BAUD_RDMAE_SHIFT) & 1U) > 0U);
689 }
690 
691 #endif
692 
710 static inline void LPUART_HAL_Putchar(LPUART_Type * base, uint8_t data)
711 {
712  volatile uint8_t * dataRegBytes = (volatile uint8_t *)(&(base->DATA));
713  dataRegBytes[0] = data;
714 }
715 
725 void LPUART_HAL_Putchar9(LPUART_Type * base, uint16_t data);
726 
736 void LPUART_HAL_Putchar10(LPUART_Type * base, uint16_t data);
737 
748 static inline void LPUART_HAL_Getchar(const LPUART_Type * base, uint8_t *readData)
749 {
750  DEV_ASSERT(readData != NULL);
751 
752  *readData = (uint8_t)base->DATA;
753 }
754 
764 void LPUART_HAL_Getchar9(const LPUART_Type * base, uint16_t *readData);
765 
775 void LPUART_HAL_Getchar10(const LPUART_Type * base, uint16_t *readData);
776 
786 void LPUART_HAL_SendDataPolling(LPUART_Type * base, const uint8_t *txBuff, uint32_t txSize);
787 
798 status_t LPUART_HAL_ReceiveDataPolling(LPUART_Type * base, uint8_t *rxBuff, uint32_t rxSize);
799 
817 bool LPUART_HAL_GetStatusFlag(const LPUART_Type * base, lpuart_status_flag_t statusFlag);
818 
830 
849 static inline void LPUART_HAL_SetIdleChar(LPUART_Type * base, lpuart_idle_char_t idleConfig)
850 {
851  uint32_t ctrlRegValTemp;
852 
853  ctrlRegValTemp = base->CTRL;
854  ctrlRegValTemp &= ~(LPUART_CTRL_IDLECFG_MASK);
855  ctrlRegValTemp |= LPUART_CTRL_IDLECFG(idleConfig);
856  base->CTRL = ctrlRegValTemp;
857 }
858 
871 {
873  uint32_t ctrlRegVal = base->CTRL;
874  ctrlRegVal = (ctrlRegVal & LPUART_CTRL_IDLECFG_MASK) >> LPUART_CTRL_IDLECFG_SHIFT;
875 
876  switch (ctrlRegVal)
877  {
878  case 0x0U:
879  retVal = LPUART_1_IDLE_CHAR;
880  break;
881  case 0x1U:
882  retVal = LPUART_2_IDLE_CHAR;
883  break;
884  case 0x2U:
885  retVal = LPUART_4_IDLE_CHAR;
886  break;
887  case 0x3U:
888  retVal = LPUART_8_IDLE_CHAR;
889  break;
890  case 0x4U:
891  retVal = LPUART_16_IDLE_CHAR;
892  break;
893  case 0x5U:
894  retVal = LPUART_32_IDLE_CHAR;
895  break;
896  case 0x6U:
897  retVal = LPUART_64_IDLE_CHAR;
898  break;
899  case 0x7U:
900  retVal = LPUART_128_IDLE_CHAR;
901  break;
902  default:
903  /* IDLECFG field is three bits wide, so the result is between 0 and 7 */
904  break;
905  }
906 
907  return retVal;
908 }
909 
920 static inline bool LPUART_HAL_IsCurrentDataWithNoise(const LPUART_Type * base)
921 {
922  return (((base->DATA >> LPUART_DATA_NOISY_SHIFT) & 1U) > 0U);
923 }
924 
935 static inline bool LPUART_HAL_IsCurrentDataWithFrameError(const LPUART_Type * base)
936 {
937  return (((base->DATA >> LPUART_DATA_FRETSC_SHIFT) & 1U) > 0U);
938 }
939 
951 static inline void LPUART_HAL_SetTxSpecialChar(LPUART_Type * base, uint8_t specialChar)
952 {
953  base->DATA = ((base->DATA & ~LPUART_DATA_R9T9_MASK) | LPUART_DATA_R9T9(specialChar)) | LPUART_DATA_FRETSC_MASK;
954 }
955 
966 static inline bool LPUART_HAL_IsCurrentDataWithParityError(const LPUART_Type * base)
967 {
968  return (((base->DATA >> LPUART_DATA_PARITYE_SHIFT) & 1U) > 0U);
969 }
970 
981 static inline bool LPUART_HAL_IsReceiveBufferEmpty(const LPUART_Type * base)
982 {
983  return (((base->DATA >> LPUART_DATA_RXEMPT_SHIFT) & 1U) > 0U);
984 }
985 
996 static inline bool LPUART_HAL_WasPreviousReceiverStateIdle(const LPUART_Type * base)
997 {
998  return (((base->DATA >> LPUART_DATA_IDLINE_SHIFT) & 1U) > 0U);
999 }
1000 
1014 {
1015  /* In CPU wait mode: 0 - lpuart clocks continue to run; 1 - lpuart clocks freeze */
1016  base->CTRL = (base->CTRL & ~LPUART_CTRL_DOZEEN_MASK) | ((uint32_t)mode << LPUART_CTRL_DOZEEN_SHIFT);
1017 }
1018 
1031 {
1032  /* In CPU wait mode: 0 - lpuart clocks continue to run; 1 - lpuart clocks freeze */
1034 }
1035 
1047 void LPUART_HAL_SetLoopbackCmd(LPUART_Type * base, bool enable);
1048 
1060 void LPUART_HAL_SetSingleWireCmd(LPUART_Type * base, bool enable);
1061 
1073  lpuart_singlewire_txdir_t direction)
1074 {
1075  base->CTRL = (base->CTRL & ~LPUART_CTRL_TXDIR_MASK) | ((uint32_t)direction << LPUART_CTRL_TXDIR_SHIFT);
1076 }
1077 
1088 
1099 {
1100  base->CTRL &= ~LPUART_CTRL_RWU_MASK;
1101 }
1102 
1113 static inline bool LPUART_HAL_IsReceiverInStandby(const LPUART_Type * base)
1114 {
1115  return (((base->CTRL >> LPUART_CTRL_RWU_SHIFT) & 1U) > 0U);
1116 }
1117 
1130  lpuart_wakeup_method_t method)
1131 {
1132  base->CTRL = (base->CTRL & ~LPUART_CTRL_WAKE_MASK) | ((uint32_t)method << LPUART_CTRL_WAKE_SHIFT);
1133 }
1134 
1148 {
1150 }
1151 
1165  const lpuart_idle_line_config_t *config);
1166 
1181 {
1183  ((uint32_t)length << LPUART_STAT_BRK13_SHIFT);
1184 }
1185 
1199 {
1201  ((uint32_t)length << LPUART_STAT_LBKDE_SHIFT);
1202 }
1203 
1213 static inline void LPUART_HAL_QueueBreakField(LPUART_Type * base)
1214 {
1215  base->DATA = LPUART_DATA_FRETSC(1U);
1216 }
1217 
1229 {
1230  uint32_t baudRegValTemp;
1231 
1232  baudRegValTemp = base->BAUD;
1233  baudRegValTemp &= ~(LPUART_BAUD_MATCFG_MASK);
1234  baudRegValTemp |= LPUART_BAUD_MATCFG(config);
1235  base->BAUD = baudRegValTemp;
1236 }
1237 
1249 void LPUART_HAL_SetMatchAddressReg1(LPUART_Type * base, bool enable, uint8_t value);
1250 
1262 void LPUART_HAL_SetMatchAddressReg2(LPUART_Type * base, bool enable, uint8_t value);
1263 
1276 static inline void LPUART_HAL_SetSendMsbFirstCmd(LPUART_Type * base, bool enable)
1277 {
1279  ((enable ? 1UL : 0UL) << LPUART_STAT_MSBF_SHIFT);
1280 }
1281 
1295 static inline void LPUART_HAL_SetReceiveResyncCmd(LPUART_Type * base, bool enable)
1296 {
1297  /* When disabled, the resynchronization of the received data word when a data
1298  * one followed by data zero transition is detected. This bit should only be
1299  * changed when the receiver is disabled. */
1300  base->BAUD = (base->BAUD & ~LPUART_BAUD_RESYNCDIS_MASK) | ((enable ? 1UL : 0UL) << LPUART_BAUD_RESYNCDIS_SHIFT);
1301 }
1302 
1303 #if FEATURE_LPUART_HAS_MODEM_SUPPORT
1304 
1314 static inline void LPUART_HAL_SetCtsSource(LPUART_Type * base,
1315  lpuart_cts_source_t source)
1316 {
1317  base->MODIR = (base->MODIR & ~LPUART_MODIR_TXCTSSRC_MASK) | ((uint32_t)source << LPUART_MODIR_TXCTSSRC_SHIFT);
1318 }
1319 
1333 {
1334  base->MODIR = (base->MODIR & ~LPUART_MODIR_TXCTSC_MASK) | ((uint32_t)mode << LPUART_MODIR_TXCTSC_SHIFT);
1335 }
1336 
1348 static inline void LPUART_HAL_SetTxCtsCmd(LPUART_Type * base, bool enable)
1349 {
1350  base->MODIR = (base->MODIR & ~LPUART_MODIR_TXCTSE_MASK) | ((enable ? 1U : 0U) << LPUART_MODIR_TXCTSE_SHIFT);
1351 }
1352 
1365 static inline void LPUART_HAL_SetRxRtsCmd(LPUART_Type * base, bool enable)
1366 {
1367  base->MODIR = (base->MODIR & ~LPUART_MODIR_RXRTSE_MASK) | ((enable ? 1U : 0U) << LPUART_MODIR_RXRTSE_SHIFT);
1368 }
1369 
1382 static inline void LPUART_HAL_SetTxRtsCmd(LPUART_Type * base, bool enable)
1383 {
1384  base->MODIR = (base->MODIR & ~LPUART_MODIR_TXRTSE_MASK) | ((enable ? 1U : 0U) << LPUART_MODIR_TXRTSE_SHIFT);
1385 }
1386 
1397 static inline void LPUART_HAL_SetTxRtsPolarityMode(LPUART_Type * base, bool polarity)
1398 {
1399  base->MODIR = (base->MODIR & ~LPUART_MODIR_TXRTSPOL_MASK) | ((polarity ? 1U : 0U) << LPUART_MODIR_TXRTSPOL_SHIFT);
1400 }
1401 
1402 #endif /* FEATURE_LPUART_HAS_MODEM_SUPPORT */
1403 
1404 #if FEATURE_LPUART_FIFO_SIZE > 0U
1405 
1417 static inline void LPUART_HAL_SetTxFIFOCmd(LPUART_Type * base, bool enable)
1418 {
1420  ((enable ? 1U : 0U) << LPUART_FIFO_TXFE_SHIFT);
1421 }
1422 
1435 static inline void LPUART_HAL_SetRxFIFOCmd(LPUART_Type * base, bool enable)
1436 {
1438  ((enable ? 1U : 0U) << LPUART_FIFO_RXFE_SHIFT);
1439 }
1440 
1454 static inline void LPUART_HAL_SetRxIdleEmptyDuration(LPUART_Type * base, uint8_t duration)
1455 {
1456 #ifdef DEV_ERROR_DETECT
1457  DEV_ASSERT(duration < ((uint8_t)(1U << LPUART_FIFO_RXIDEN_WIDTH)));
1458 #endif
1459  uint32_t fifoRegValTemp;
1460 
1461  fifoRegValTemp = base->FIFO;
1463  fifoRegValTemp |= LPUART_FIFO_RXIDEN(duration);
1464  base->FIFO = fifoRegValTemp;
1465 }
1466 
1477 static inline void LPUART_HAL_FlushTxFifoBuffer(LPUART_Type * base)
1478 {
1479  base->FIFO |= LPUART_FIFO_TXFLUSH_MASK;
1480 }
1481 
1492 static inline void LPUART_HAL_FlushRxFifoBuffer(LPUART_Type * base)
1493 {
1494  base->FIFO |= LPUART_FIFO_RXFLUSH_MASK;
1495 }
1496 
1511 static inline void LPUART_HAL_SetTxWatermark(LPUART_Type * base, uint8_t txWater)
1512 {
1513 #ifdef DEV_ERROR_DETECT
1514  uint8_t txFifoSize = ((uint8_t)((base->FIFO & LPUART_FIFO_TXFIFOSIZE_MASK) >> LPUART_FIFO_TXFIFOSIZE_SHIFT));
1515  DEV_ASSERT(txFifoSize > 0U);
1516  DEV_ASSERT(txWater < ((uint8_t)(1U << (txFifoSize + 1U))));
1517 #endif
1518  uint32_t waterRegValTemp;
1519 
1520  waterRegValTemp = base->WATER;
1521  waterRegValTemp &= ~(LPUART_WATER_TXWATER_MASK);
1522  waterRegValTemp |= LPUART_WATER_TXWATER(txWater);
1523  base->WATER = waterRegValTemp;
1524 }
1525 
1540 static inline void LPUART_HAL_SetRxWatermark(LPUART_Type * base, uint8_t rxWater)
1541 {
1542 #ifdef DEV_ERROR_DETECT
1543  uint8_t rxFifoSize = ((uint8_t)((base->FIFO & LPUART_FIFO_RXFIFOSIZE_MASK) >> LPUART_FIFO_RXFIFOSIZE_SHIFT));
1544  DEV_ASSERT(rxFifoSize > 0U);
1545  DEV_ASSERT(rxWater < ((uint8_t)(1U << (rxFifoSize + 1U))));
1546 #endif
1547  uint32_t waterRegValTemp;
1548 
1549  waterRegValTemp = base->WATER;
1550  waterRegValTemp &= ~(LPUART_WATER_RXWATER_MASK);
1551  waterRegValTemp |= LPUART_WATER_RXWATER(rxWater);
1552  base->WATER = waterRegValTemp;
1553 }
1554 
1555 #endif /* FEATURE_LPUART_FIFO_SIZE */
1556 
1557 #if FEATURE_LPUART_HAS_IR_SUPPORT
1558 
1568 void LPUART_HAL_SetInfrared(LPUART_Type * base, bool enable,
1569  lpuart_ir_tx_pulsewidth_t pulseWidth);
1570 #endif /* FEATURE_LPUART_HAS_IR_SUPPORT */
1571 
1574 #if defined(__cplusplus)
1575 }
1576 #endif
1577 
1580 #endif /* LPUART_HAL_H__ */
1581 /*******************************************************************************
1582  * EOF
1583  ******************************************************************************/
1584 
static bool LPUART_HAL_IsReceiveBufferEmpty(const LPUART_Type *base)
Checks whether the receive buffer is empty.
Definition: lpuart_hal.h:981
#define LPUART_FIFO_RXIDEN_MASK
Definition: S32K144.h:7126
#define LPUART_STAT_TDRE_SHIFT
Definition: S32K144.h:6846
#define LPUART_STAT_RDRF_SHIFT
Definition: S32K144.h:6838
static void LPUART_HAL_SetTxRtsCmd(LPUART_Type *base, bool enable)
Enable/Disable the transmitter request-to-send.
Definition: lpuart_hal.h:1382
#define LPUART_STAT_MA1F_SHIFT
Definition: S32K144.h:6814
__IO uint32_t BAUD
Definition: S32K144.h:6672
#define LPUART_MODIR_TXRTSPOL_MASK
Definition: S32K144.h:7073
#define LPUART_DATA_R9T9(x)
Definition: S32K144.h:7034
static void LPUART_HAL_SetWaitModeOperation(LPUART_Type *base, lpuart_operation_config_t mode)
Configures the LPUART operation in wait mode (operates or stops operations in wait mode)...
Definition: lpuart_hal.h:1013
#define LPUART_BAUD_BOTHEDGE_MASK
Definition: S32K144.h:6772
__IO uint32_t MODIR
Definition: S32K144.h:6677
#define LPUART_FIFO_RXFE_SHIFT
Definition: S32K144.h:7107
#define LPUART_CTRL_WAKE_MASK
Definition: S32K144.h:6894
#define LPUART_MODIR_TXCTSSRC_SHIFT
Definition: S32K144.h:7086
#define LPUART_STAT_FE_SHIFT
Definition: S32K144.h:6822
void LPUART_HAL_Putchar9(LPUART_Type *base, uint16_t data)
Sends the LPUART 9-bit character.
Definition: lpuart_hal.c:226
#define LPUART_CTRL_WAKE_SHIFT
Definition: S32K144.h:6895
static void LPUART_HAL_SetIdleChar(LPUART_Type *base, lpuart_idle_char_t idleConfig)
Configures the number of idle characters.
Definition: lpuart_hal.h:849
#define LPUART_STAT_BRK13_MASK
Definition: S32K144.h:6857
static void LPUART_HAL_SetSendMsbFirstCmd(LPUART_Type *base, bool enable)
LPUART sends the MSB first configuration.
Definition: lpuart_hal.h:1276
#define LPUART_MODIR_TXCTSC_SHIFT
Definition: S32K144.h:7082
#define LPUART_WATER_TXWATER_MASK
Definition: S32K144.h:7155
#define LPUART_DATA_IDLINE_SHIFT
Definition: S32K144.h:7036
#define LPUART_DATA_R9T9_MASK
Definition: S32K144.h:7031
void LPUART_HAL_SendDataPolling(LPUART_Type *base, const uint8_t *txBuff, uint32_t txSize)
Send out multiple bytes of data using polling method.
Definition: lpuart_hal.c:314
static bool LPUART_HAL_IsTxDmaEnabled(const LPUART_Type *base)
Gets the LPUART DMA request configuration.
Definition: lpuart_hal.h:671
status_t LPUART_HAL_SetReceiverInStandbyMode(LPUART_Type *base)
Places the LPUART receiver in standby mode.
Definition: lpuart_hal.c:510
#define LPUART_DATA_FRETSC_MASK
Definition: S32K144.h:7043
#define LPUART_BAUD_OSR_MASK
Definition: S32K144.h:6792
static void LPUART_HAL_QueueBreakField(LPUART_Type *base)
LPUART transmit sends break character configuration.
Definition: lpuart_hal.h:1213
#define LPUART_STAT_LBKDE_SHIFT
Definition: S32K144.h:6854
#define LPUART_STAT_LBKDE_MASK
Definition: S32K144.h:6853
#define LPUART_BAUD_RESYNCDIS_MASK
Definition: S32K144.h:6768
#define LPUART_CTRL_TIE_SHIFT
Definition: S32K144.h:6959
static bool LPUART_HAL_IsCurrentDataWithParityError(const LPUART_Type *base)
Checks whether the current data word was received with parity error.
Definition: lpuart_hal.h:966
static lpuart_idle_char_t LPUART_HAL_GetIdleChar(const LPUART_Type *base)
Gets the number of idle characters for IDLE flag.
Definition: lpuart_hal.h:870
#define LPUART_BAUD_REG_ID
Definition: lpuart_hal.h:55
#define LPUART_FIFO_TXFLUSH_MASK
Definition: S32K144.h:7134
static lpuart_wakeup_method_t LPUART_HAL_GetReceiverWakeupMode(const LPUART_Type *base)
Gets the LPUART receiver wakeup method from standby mode.
Definition: lpuart_hal.h:1147
#define LPUART_STAT_RAF_SHIFT
Definition: S32K144.h:6850
#define LPUART_FIFO_REG_ID
Definition: lpuart_hal.h:61
#define LPUART_BAUD_LBKDIE_SHIFT
Definition: S32K144.h:6765
#define LPUART_FIFO_RXIDEN_WIDTH
Definition: S32K144.h:7128
#define LPUART_FIFO_TXOFE_SHIFT
Definition: S32K144.h:7123
static bool LPUART_HAL_IsCurrentDataWithFrameError(const LPUART_Type *base)
Checks whether the current data word was received with frame error.
Definition: lpuart_hal.h:935
status_t LPUART_HAL_ReceiveDataPolling(LPUART_Type *base, uint8_t *rxBuff, uint32_t rxSize)
Receive multiple bytes of data using polling method.
Definition: lpuart_hal.c:337
#define LPUART_CTRL_ORIE_SHIFT
Definition: S32K144.h:6975
#define LPUART_BAUD_SBNS_SHIFT
Definition: S32K144.h:6757
lpuart_break_char_length_t
LPUART break character length settings for transmit/detect.
Definition: lpuart_hal.h:123
#define LPUART_DATA_REG_ID
Definition: lpuart_hal.h:58
#define LPUART_WATER_RXWATER_MASK
Definition: S32K144.h:7163
#define LPUART_CTRL_DOZEEN_MASK
Definition: S32K144.h:6906
#define LPUART_MODIR_RXRTSE_MASK
Definition: S32K144.h:7077
#define FEATURE_LPUART_FIFO_REG_FLAGS_MASK
void LPUART_HAL_SetParityMode(LPUART_Type *base, lpuart_parity_mode_t parityModeType)
Configures parity mode in the LPUART controller.
Definition: lpuart_hal.c:213
#define LPUART_WATER_RXWATER(x)
Definition: S32K144.h:7166
#define LPUART_BAUD_RXEDGIE_SHIFT
Definition: S32K144.h:6761
lpuart_status_flag_t
LPUART status flags.
Definition: lpuart_hal.h:229
#define LPUART_SHIFT
Definition: lpuart_hal.h:54
#define LPUART_CTRL_RE_MASK
Definition: S32K144.h:6938
static void LPUART_HAL_SetTxCtsCmd(LPUART_Type *base, bool enable)
Enable/Disable the transmitter clear-to-send.
Definition: lpuart_hal.h:1348
#define LPUART_STAT_MSBF_MASK
Definition: S32K144.h:6869
#define LPUART_FIFO_TXFIFOSIZE_SHIFT
Definition: S32K144.h:7111
#define LPUART_STAT_RXINV_SHIFT
Definition: S32K144.h:6866
#define DEV_ASSERT(x)
Definition: devassert.h:78
#define LPUART_CTRL_ILIE_SHIFT
Definition: S32K144.h:6947
static lpuart_operation_config_t LPUART_HAL_GetWaitModeOperation(const LPUART_Type *base)
Gets the LPUART operation in wait mode.
Definition: lpuart_hal.h:1030
#define LPUART_CTRL_MA1IE_SHIFT
Definition: S32K144.h:6927
#define LPUART_STAT_OR_SHIFT
Definition: S32K144.h:6830
#define FEATURE_LPUART_STAT_REG_FLAGS_MASK
#define LPUART_FIFO_TXFE_MASK
Definition: S32K144.h:7114
static void LPUART_HAL_SetCtsSource(LPUART_Type *base, lpuart_cts_source_t source)
Transmits the CTS source configuration.
Definition: lpuart_hal.h:1314
#define LPUART_CTRL_TCIE_SHIFT
Definition: S32K144.h:6955
static void LPUART_HAL_SetRxIdleEmptyDuration(LPUART_Type *base, uint8_t duration)
Enables the assertion of RDRF when the receiver is idle.
Definition: lpuart_hal.h:1454
#define LPUART_STAT_NF_SHIFT
Definition: S32K144.h:6826
#define LPUART_STAT_REG_ID
Definition: lpuart_hal.h:56
#define LPUART_CTRL_PEIE_SHIFT
Definition: S32K144.h:6963
#define LPUART_CTRL_RE_SHIFT
Definition: S32K144.h:6939
#define LPUART_CTRL_FEIE_SHIFT
Definition: S32K144.h:6967
#define LPUART_FIFO_RXUF_SHIFT
Definition: S32K144.h:7139
static void LPUART_HAL_SetBreakCharTransmitLength(LPUART_Type *base, lpuart_break_char_length_t length)
LPUART break character transmit length configuration.
Definition: lpuart_hal.h:1179
lpuart_singlewire_txdir_t
LPUART single-wire mode TX direction.
Definition: lpuart_hal.h:137
#define LPUART_CTRL_NEIE_SHIFT
Definition: S32K144.h:6971
#define LPUART_BAUD_BOTHEDGE_SHIFT
Definition: S32K144.h:6773
static void LPUART_HAL_SetTxWatermark(LPUART_Type *base, uint8_t txWater)
Sets the tx watermark.
Definition: lpuart_hal.h:1511
#define FEATURE_LPUART_FIFO_SIZE
__IO uint32_t STAT
Definition: S32K144.h:6673
static bool LPUART_HAL_IsRxDmaEnabled(const LPUART_Type *base)
Gets the LPUART DMA request configuration.
Definition: lpuart_hal.h:686
bool LPUART_HAL_GetIntMode(const LPUART_Type *base, lpuart_interrupt_t intSrc)
Returns LPUART module interrupts state.
Definition: lpuart_hal.c:418
lpuart_match_config_t
LPUART Configures the match addressing mode used.
Definition: lpuart_hal.h:147
#define LPUART_MODIR_TXCTSSRC_MASK
Definition: S32K144.h:7085
#define LPUART_STAT_BRK13_SHIFT
Definition: S32K144.h:6858
static void LPUART_HAL_SetBreakCharDetectLength(LPUART_Type *base, lpuart_break_char_length_t length)
LPUART break character detect length configuration.
Definition: lpuart_hal.h:1197
#define LPUART_CTRL_IDLECFG(x)
Definition: S32K144.h:6917
lpuart_idle_char_t
LPUART Configures the number of idle characters that must be received before the IDLE flag is set...
Definition: lpuart_hal.h:173
#define LPUART_STAT_RXEDGIF_SHIFT
Definition: S32K144.h:6874
#define LPUART_BAUD_SBNS_MASK
Definition: S32K144.h:6756
#define LPUART_CTRL_REG_ID
Definition: lpuart_hal.h:57
#define LPUART_FIFO_RXFLUSH_MASK
Definition: S32K144.h:7130
#define LPUART_BAUD_RDMAE_SHIFT
Definition: S32K144.h:6785
#define LPUART_CTRL_IDLECFG_MASK
Definition: S32K144.h:6914
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
static void LPUART_HAL_SetBothEdgeSamplingCmd(LPUART_Type *base, bool enable)
Configures the LPUART baud rate both edge sampling.
Definition: lpuart_hal.h:506
#define LPUART_STAT_TC_SHIFT
Definition: S32K144.h:6842
#define LPUART_FIFO_TXFE_SHIFT
Definition: S32K144.h:7115
void LPUART_HAL_SetInfrared(LPUART_Type *base, bool enable, lpuart_ir_tx_pulsewidth_t pulseWidth)
Configures the LPUART infrared operation.
#define LPUART_BAUD_TDMAE_SHIFT
Definition: S32K144.h:6789
#define LPUART_STAT_MSBF_SHIFT
Definition: S32K144.h:6870
#define LPUART_CTRL_MA2IE_SHIFT
Definition: S32K144.h:6923
#define LPUART_BAUD_OSR(x)
Definition: S32K144.h:6795
__IO uint32_t DATA
Definition: S32K144.h:6675
lpuart_parity_mode_t
LPUART parity mode.
Definition: lpuart_hal.h:78
__IO uint32_t CTRL
Definition: S32K144.h:6674
void LPUART_HAL_SetSingleWireCmd(LPUART_Type *base, bool enable)
Configures the LPUART single-wire operation (enable/disable single-wire mode).
Definition: lpuart_hal.c:492
#define LPUART_MODIR_TXRTSPOL_SHIFT
Definition: S32K144.h:7074
static void LPUART_HAL_FlushRxFifoBuffer(LPUART_Type *base)
Flush rx FIFO buffer.
Definition: lpuart_hal.h:1492
lpuart_bit_count_per_char_t
LPUART number of bits in a character.
Definition: lpuart_hal.h:89
#define FEATURE_LPUART_HAS_ADDRESS_MATCHING
#define LPUART_CTRL_TE_SHIFT
Definition: S32K144.h:6943
static void LPUART_HAL_SetTxDmaCmd(LPUART_Type *base, bool enable)
Configures DMA requests.
Definition: lpuart_hal.h:641
#define LPUART_STAT_PF_SHIFT
Definition: S32K144.h:6818
#define LPUART_BAUD_MATCFG_MASK
Definition: S32K144.h:6776
#define LPUART_BAUD_RDMAE_MASK
Definition: S32K144.h:6784
#define LPUART_STAT_IDLE_SHIFT
Definition: S32K144.h:6834
static void LPUART_HAL_SetOversamplingRatio(LPUART_Type *base, uint32_t overSamplingRatio)
Sets the LPUART baud rate oversampling ratio.
Definition: lpuart_hal.h:477
static bool LPUART_HAL_GetRxDataPolarity(const LPUART_Type *base)
Returns whether the receive data is inverted or not.
Definition: lpuart_hal.h:521
static void LPUART_HAL_SetTxdirInSinglewireMode(LPUART_Type *base, lpuart_singlewire_txdir_t direction)
Configures the LPUART transmit direction while in single-wire mode.
Definition: lpuart_hal.h:1072
#define LPUART_STAT_RXINV_MASK
Definition: S32K144.h:6865
static void LPUART_HAL_SetRxFIFOCmd(LPUART_Type *base, bool enable)
Enable/Disable the receiver FIFO.
Definition: lpuart_hal.h:1435
static bool LPUART_HAL_IsReceiverInStandby(const LPUART_Type *base)
Checks whether the LPUART receiver is in a standby mode.
Definition: lpuart_hal.h:1113
#define LPUART_FIFO_TXOF_SHIFT
Definition: S32K144.h:7143
#define LPUART_MODIR_TXCTSE_SHIFT
Definition: S32K144.h:7066
static bool LPUART_HAL_IsCurrentDataWithNoise(const LPUART_Type *base)
Checks whether the current data word was received with noise.
Definition: lpuart_hal.h:920
#define LPUART_STAT_MA2F_SHIFT
Definition: S32K144.h:6810
lpuart_cts_source_t
LPUART Transmits the CTS Configuration. Configures the source of the CTS input.
Definition: lpuart_hal.h:189
Structure for idle line configuration settings.
Definition: lpuart_hal.h:211
static void LPUART_HAL_SetTransmitterCmd(LPUART_Type *base, bool enable)
Enable/Disable the LPUART transmitter.
Definition: lpuart_hal.h:363
#define LPUART_CTRL_RWU_SHIFT
Definition: S32K144.h:6935
static void LPUART_HAL_Putchar(LPUART_Type *base, uint8_t data)
Sends the LPUART 8-bit character.
Definition: lpuart_hal.h:710
#define LPUART_CTRL_RWU_MASK
Definition: S32K144.h:6934
static void LPUART_HAL_SetReceiveResyncCmd(LPUART_Type *base, bool enable)
LPUART enable/disable re-sync of received data configuration.
Definition: lpuart_hal.h:1295
static void LPUART_HAL_PutReceiverInNormalMode(LPUART_Type *base)
Places the LPUART receiver in a normal mode.
Definition: lpuart_hal.h:1098
lpuart_wakeup_method_t
LPUART wakeup from standby method constants.
Definition: lpuart_hal.h:110
#define LPUART_WATER_TXWATER(x)
Definition: S32K144.h:7158
static void LPUART_HAL_SetTxRtsPolarityMode(LPUART_Type *base, bool polarity)
Configures the transmitter RTS polarity.
Definition: lpuart_hal.h:1397
static void LPUART_HAL_SetCtsMode(LPUART_Type *base, lpuart_cts_config_t mode)
Transmits the CTS configuration.
Definition: lpuart_hal.h:1332
static void LPUART_HAL_SetTxSpecialChar(LPUART_Type *base, uint8_t specialChar)
Indicates a special character is to be transmitted.
Definition: lpuart_hal.h:951
void LPUART_HAL_SetLoopbackCmd(LPUART_Type *base, bool enable)
Configures the LPUART loopback operation (enable/disable loopback operation)
Definition: lpuart_hal.c:469
void LPUART_HAL_SetMatchAddressReg1(LPUART_Type *base, bool enable, uint8_t value)
Configures address match register 1.
Definition: lpuart_hal.c:564
#define LPUART_FIFO_RXIDEN(x)
Definition: S32K144.h:7129
__IO uint32_t FIFO
Definition: S32K144.h:6678
status_t LPUART_HAL_ClearStatusFlag(LPUART_Type *base, lpuart_status_flag_t statusFlag)
LPUART clears an individual status flag.
Definition: lpuart_hal.c:684
#define LPUART_MODIR_TXRTSE_SHIFT
Definition: S32K144.h:7070
#define LPUART_MODIR_TXRTSE_MASK
Definition: S32K144.h:7069
#define LPUART_CTRL_TXDIR_MASK
Definition: S32K144.h:6982
void LPUART_HAL_Getchar9(const LPUART_Type *base, uint16_t *readData)
Gets the LPUART 9-bit character.
Definition: lpuart_hal.c:274
lpuart_ir_tx_pulsewidth_t
LPUART infra-red transmitter pulse width options.
Definition: lpuart_hal.h:159
#define LPUART_MODIR_TXCTSE_MASK
Definition: S32K144.h:7065
#define LPUART_CTRL_TE_MASK
Definition: S32K144.h:6942
#define LPUART_CTRL_IDLECFG_SHIFT
Definition: S32K144.h:6915
lpuart_operation_config_t
LPUART operation configuration constants.
Definition: lpuart_hal.h:100
static bool LPUART_HAL_GetReceiverCmd(const LPUART_Type *base)
Gets the LPUART receiver enabled/disabled configuration.
Definition: lpuart_hal.h:415
void LPUART_HAL_Getchar10(const LPUART_Type *base, uint16_t *readData)
Gets the LPUART 10-bit character.
Definition: lpuart_hal.c:293
status_t LPUART_HAL_SetBaudRate(LPUART_Type *base, uint32_t sourceClockInHz, uint32_t desiredBaudRate)
Configures the LPUART baud rate.
Definition: lpuart_hal.c:95
static bool LPUART_HAL_WasPreviousReceiverStateIdle(const LPUART_Type *base)
Checks whether the previous BUS state was idle before this byte is received.
Definition: lpuart_hal.h:996
#define LPUART_BAUD_MATCFG(x)
Definition: S32K144.h:6779
static void LPUART_HAL_SetReceiverWakeupMode(LPUART_Type *base, lpuart_wakeup_method_t method)
Sets the LPUART receiver wakeup method from standby mode.
Definition: lpuart_hal.h:1129
#define LPUART_STAT_LBKDIF_SHIFT
Definition: S32K144.h:6878
void LPUART_HAL_SetMatchAddressReg2(LPUART_Type *base, bool enable, uint8_t value)
Configures address match register 2.
Definition: lpuart_hal.c:588
#define LPUART_DATA_RXEMPT_SHIFT
Definition: S32K144.h:7040
static void LPUART_HAL_SetRxRtsCmd(LPUART_Type *base, bool enable)
Enable/Disable the receiver request-to-send.
Definition: lpuart_hal.h:1365
static void LPUART_HAL_SetReceiverCmd(LPUART_Type *base, bool enable)
Enable/Disable the LPUART receiver.
Definition: lpuart_hal.h:397
#define LPUART_BAUD_RESYNCDIS_SHIFT
Definition: S32K144.h:6769
void LPUART_HAL_Putchar10(LPUART_Type *base, uint16_t data)
Sends the LPUART 10-bit character (Note: Feature available on select LPUART instances).
Definition: lpuart_hal.c:248
#define LPUART_FIFO_RXFIFOSIZE_MASK
Definition: S32K144.h:7102
__IO uint32_t WATER
Definition: S32K144.h:6679
#define LPUART_BAUD_TDMAE_MASK
Definition: S32K144.h:6788
static void LPUART_HAL_SetBaudRateDivisor(LPUART_Type *base, uint32_t baudRateDivisor)
Sets the LPUART baud rate modulo divisor.
Definition: lpuart_hal.h:447
void LPUART_HAL_SetBitCountPerChar(LPUART_Type *base, lpuart_bit_count_per_char_t bitCountPerChar)
Configures the number of bits per character in the LPUART controller.
Definition: lpuart_hal.c:187
#define LPUART_DATA_FRETSC_SHIFT
Definition: S32K144.h:7044
#define LPUART_FIFO_RXFE_MASK
Definition: S32K144.h:7106
static void LPUART_HAL_FlushTxFifoBuffer(LPUART_Type *base)
Flush tx FIFO buffer.
Definition: lpuart_hal.h:1477
static bool LPUART_HAL_GetTransmitterCmd(const LPUART_Type *base)
Gets the LPUART transmitter enabled/disabled configuration.
Definition: lpuart_hal.h:381
void LPUART_HAL_SetIntMode(LPUART_Type *base, lpuart_interrupt_t intSrc, bool enable)
Configures the LPUART module interrupts.
Definition: lpuart_hal.c:371
bool LPUART_HAL_GetStatusFlag(const LPUART_Type *base, lpuart_status_flag_t statusFlag)
LPUART get status flag.
Definition: lpuart_hal.c:636
static void LPUART_HAL_SetRxDmaCmd(LPUART_Type *base, bool enable)
Configures DMA requests.
Definition: lpuart_hal.h:656
#define LPUART_DATA_PARITYE_SHIFT
Definition: S32K144.h:7048
lpuart_cts_config_t
LPUART Transmits CTS Source.Configures if the CTS state is checked at the start of each character or ...
Definition: lpuart_hal.h:201
#define LPUART_FIFO_RXUFE_SHIFT
Definition: S32K144.h:7119
static void LPUART_HAL_SetStopBitCount(LPUART_Type *base, lpuart_stop_bit_count_t stopBitCount)
Configures the number of stop bits in the LPUART controller.
Definition: lpuart_hal.h:579
#define LPUART_DATA_FRETSC(x)
Definition: S32K144.h:7046
static void LPUART_HAL_SetTxFIFOCmd(LPUART_Type *base, bool enable)
Enable/Disable the transmitter FIFO.
Definition: lpuart_hal.h:1417
static const volatile void * LPUART_HAL_GetDataRegAddr(const LPUART_Type *base)
Get LPUART tx/rx data register address.
Definition: lpuart_hal.h:594
lpuart_stop_bit_count_t
LPUART number of stop bits.
Definition: lpuart_hal.h:68
#define LPUART_MODIR_RXRTSE_SHIFT
Definition: S32K144.h:7078
void LPUART_HAL_SetIdleLineDetect(LPUART_Type *base, const lpuart_idle_line_config_t *config)
LPUART idle-line detect operation configuration.
Definition: lpuart_hal.c:543
#define LPUART_FIFO_RXFIFOSIZE_SHIFT
Definition: S32K144.h:7103
static void LPUART_HAL_SetMatchAddressMode(LPUART_Type *base, lpuart_match_config_t config)
Configures match address mode control.
Definition: lpuart_hal.h:1228
#define LPUART_CTRL_DOZEEN_SHIFT
Definition: S32K144.h:6907
void LPUART_HAL_Init(LPUART_Type *base)
Initializes the LPUART controller.
Definition: lpuart_hal.c:62
#define LPUART_FIFO_TXFIFOSIZE_MASK
Definition: S32K144.h:7110
#define LPUART_CTRL_RIE_SHIFT
Definition: S32K144.h:6951
#define LPUART_DATA_NOISY_SHIFT
Definition: S32K144.h:7052
#define LPUART_CTRL_TXDIR_SHIFT
Definition: S32K144.h:6983
lpuart_interrupt_t
LPUART interrupt configuration structure, default settings are 0 (disabled)
Definition: lpuart_hal.h:292
static void LPUART_HAL_SetRxWatermark(LPUART_Type *base, uint8_t rxWater)
Sets the rx watermark.
Definition: lpuart_hal.h:1540
#define LPUART_MODIR_TXCTSC_MASK
Definition: S32K144.h:7081
#define LPUART_BAUD_SBR_MASK
Definition: S32K144.h:6752
static void LPUART_HAL_SetRxDataPolarity(LPUART_Type *base, bool polarity)
Sets whether the recevie data is inverted or not.
Definition: lpuart_hal.h:535
static void LPUART_HAL_Getchar(const LPUART_Type *base, uint8_t *readData)
Gets the LPUART 8-bit character.
Definition: lpuart_hal.h:748