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#define | CAN_RAMn_COUNT 128u |
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#define | CAN_RXIMR_COUNT 16u |
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#define | CAN_WMB_COUNT 4u |
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#define | CAN_INSTANCE_COUNT (3u) |
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#define | CAN0_BASE (0x40024000u) |
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#define | CAN0 ((CAN_Type *)CAN0_BASE) |
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#define | CAN1_BASE (0x40025000u) |
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#define | CAN1 ((CAN_Type *)CAN1_BASE) |
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#define | CAN2_BASE (0x4002B000u) |
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#define | CAN2 ((CAN_Type *)CAN2_BASE) |
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#define | CAN_BASE_ADDRS { CAN0_BASE, CAN1_BASE, CAN2_BASE } |
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#define | CAN_BASE_PTRS { CAN0, CAN1, CAN2 } |
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#define | CAN_IRQS_ARR_COUNT (7u) |
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#define | CAN_Rx_Warning_IRQS_CH_COUNT (1u) |
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#define | CAN_Tx_Warning_IRQS_CH_COUNT (1u) |
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#define | CAN_Wake_Up_IRQS_CH_COUNT (1u) |
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#define | CAN_Error_IRQS_CH_COUNT (1u) |
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#define | CAN_Bus_Off_IRQS_CH_COUNT (1u) |
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#define | CAN_ORed_0_15_MB_IRQS_CH_COUNT (1u) |
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#define | CAN_ORed_16_31_MB_IRQS_CH_COUNT (1u) |
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#define | CAN_Rx_Warning_IRQS { CAN0_ORed_IRQn, CAN1_ORed_IRQn, CAN2_ORed_IRQn } |
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#define | CAN_Tx_Warning_IRQS { CAN0_ORed_IRQn, CAN1_ORed_IRQn, CAN2_ORed_IRQn } |
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#define | CAN_Wake_Up_IRQS { CAN0_Wake_Up_IRQn, NotAvail_IRQn, NotAvail_IRQn } |
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#define | CAN_Error_IRQS { CAN0_Error_IRQn, CAN1_Error_IRQn, CAN2_Error_IRQn } |
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#define | CAN_Bus_Off_IRQS { CAN0_ORed_IRQn, CAN1_ORed_IRQn, CAN2_ORed_IRQn } |
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#define | CAN_ORed_0_15_MB_IRQS { CAN0_ORed_0_15_MB_IRQn, CAN1_ORed_0_15_MB_IRQn, CAN2_ORed_0_15_MB_IRQn } |
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#define | CAN_ORed_16_31_MB_IRQS { CAN0_ORed_16_31_MB_IRQn, NotAvail_IRQn, NotAvail_IRQn } |
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