S32 SDK
System Clock Generator (SCG)

Detailed Description

This module covers System Clock Generator module functionality.

System Clock Generator Hardware Abstraction Layer.

The system clock generator (SCG) module provides the system clocks of the MCU. The SCG contains a phase-locked loop (PLL), a slow internal reference clock (SIRC), a fast internal reference clock (FIRC), and the system oscillator clock (SOSC).

The S32 SDK provides a HAL driver for the System Clock Generator (SCG) module. This section describes the programming interface of the SCG HAL driver. The SCG HAL driver configures the SCG (System Clock Generator).

SCG driver provides three kinds of APIs:

  1. APIs for MCU system clock
  2. APIs for clock source configuration

APIs for MCU system clock

MCU system clock configuration includes clock source and dividers. There are dedicated control registers for RUN mode, VLPR mode and HSRUN mode. When MCU switches to new power mode, the configuration for corresponding mode will be used. SCG driver provides the APIs to set and get the values of this registers.

Here is an example on how to configure the clock source and dividers to RUN mode:

//Example code for how to setup system clock source and dividers for RUN mode:
config.divBus = 2;
config.divCore = 2;
config.divSlow = 2;

APIs for clock source configuration

SCG has four clock sources, system OSC, system PLL, fast IRC and slow IRC. For each clock source, SCG driver provides such APIs:

Here is an example on how to setup the clock source base on SCG HAL APIs.

//Example code for how to setup system OSC.
scg_sys_osc_config_t config;
// Get default configuration.
// Modify according to board setting.
// ...
// Setup system OSC.
// De-init system OSC.

Important Notes

Some configurations of the clock source can be done only when the clock source is disabled, so the function CLOCK_HAL_InitXxx will disable the clock source, then re-configure it and enable it. As a result, before CLOCK_HAL_InitXxx, please make sure the clock source is not used:

Data Structures

struct  scg_system_clock_config_t
 SCG system clock configuration. Implements scg_system_clock_config_t_Class. More...
 
struct  scg_sosc_config_t
 SCG system OSC configuration. Implements scg_sosc_config_t_Class. More...
 
struct  scg_sirc_config_t
 SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class. More...
 
struct  scg_firc_config_t
 SCG fast IRC clock configuration. Implements scg_firc_config_t_Class. More...
 
struct  scg_spll_config_t
 SCG system PLL configuration. Implements scg_spll_config_t_Class. More...
 
struct  scg_rtc_config_t
 SCG RTC configuration. Implements scg_rtc_config_t_Class. More...
 
struct  scg_clock_mode_config_t
 SCG Clock Mode Configuration structure. Implements scg_clock_mode_config_t_Class. More...
 
struct  scg_clockout_config_t
 SCG ClockOut Configuration structure. Implements scg_clockout_config_t_Class. More...
 
struct  scg_config_t
 SCG configure structure. Implements scg_config_t_Class. More...
 

Enumerations

enum  scg_async_clock_type_t { SCG_ASYNC_CLOCK_DIV1, SCG_ASYNC_CLOCK_DIV2, SCG_ASYNC_CLOCK_MAX }
 SCG asynchronous clock type. Implements scg_async_clock_type_t_Class. More...
 
enum  scg_async_clock_div_t {
  SCG_ASYNC_CLOCK_DISABLE = 0U, SCG_ASYNC_CLOCK_DIV_BY_1 = 1U, SCG_ASYNC_CLOCK_DIV_BY_2 = 2U, SCG_ASYNC_CLOCK_DIV_BY_4 = 3U,
  SCG_ASYNC_CLOCK_DIV_BY_8 = 4U, SCG_ASYNC_CLOCK_DIV_BY_16 = 5U, SCG_ASYNC_CLOCK_DIV_BY_32 = 6U, SCG_ASYNC_CLOCK_DIV_BY_64 = 7U
}
 SCG asynchronous clock divider value. Implements scg_async_clock_div_t_Class. More...
 
enum  scg_sosc_monitor_mode_t { SCG_SOSC_MONITOR_DISABLE = 0U, SCG_SOSC_MONITOR_INT = SCG_SOSCCSR_SOSCCM_MASK, SCG_SOSC_MONITOR_RESET }
 SCG system OSC monitor mode. Implements scg_sosc_monitor_mode_t_Class. More...
 
enum  scg_sosc_range_t { SCG_SOSC_RANGE_LOW = 1U, SCG_SOSC_RANGE_MID = 2U, SCG_SOSC_RANGE_HIGH = 3U }
 SCG OSC frequency range select Implements scg_sosc_range_t_Class. More...
 
enum  scg_sosc_gain_t { SCG_SOSC_GAIN_LOW, SCG_SOSC_GAIN_HIGH }
 SCG OSC high gain oscillator select. Implements scg_sosc_gain_t_Class. More...
 
enum  scg_sosc_ext_ref_t { SCG_SOSC_REF_EXT, SCG_SOSC_REF_OSC }
 SCG OSC external reference clock select. Implements scg_sosc_ext_ref_t_Class. More...
 
enum  scg_sirc_range_t { SCG_SIRC_RANGE_LOW, SCG_SIRC_RANGE_HIGH }
 SCG slow IRC clock frequency range. Implements scg_sirc_range_t_Class. More...
 
enum  scg_firc_range_t { SCG_FIRC_RANGE_48M, SCG_FIRC_RANGE_52M, SCG_FIRC_RANGE_56M, SCG_FIRC_RANGE_60M }
 SCG fast IRC clock frequency range. Implements scg_firc_range_t_Class. More...
 
enum  scg_spll_monitor_mode_t { SCG_SPLL_MONITOR_DISABLE = 0U, SCG_SPLL_MONITOR_INT = SCG_SPLLCSR_SPLLCM_MASK, SCG_SPLL_MONITOR_RESET }
 SCG system PLL monitor mode. Implements scg_spll_monitor_mode_t_Class. More...
 

Variables

uint32_t g_xtal0ClkFreq
 
uint32_t g_RtcClkInFreq
 

System Clock.

enum  scg_system_clock_type_t { SCG_SYSTEM_CLOCK_CORE, SCG_SYSTEM_CLOCK_BUS, SCG_SYSTEM_CLOCK_SLOW, SCG_SYSTEM_CLOCK_MAX }
 SCG system clock type. Implements scg_system_clock_type_t_Class. More...
 
enum  scg_system_clock_src_t {
  SCG_SYSTEM_CLOCK_SRC_SYS_OSC = 1U, SCG_SYSTEM_CLOCK_SRC_SIRC = 2U, SCG_SYSTEM_CLOCK_SRC_FIRC = 3U, SCG_SYSTEM_CLOCK_SRC_SYS_PLL = 6U,
  SCG_SYSTEM_CLOCK_SRC_NONE
}
 SCG system clock source. Implements scg_system_clock_src_t_Class. More...
 
enum  scg_system_clock_mode_t {
  SCG_SYSTEM_CLOCK_MODE_CURRENT = 0U, SCG_SYSTEM_CLOCK_MODE_RUN = 1U, SCG_SYSTEM_CLOCK_MODE_VLPR = 2U, SCG_SYSTEM_CLOCK_MODE_HSRUN = 3U,
  SCG_SYSTEM_CLOCK_MODE_NONE
}
 SCG system clock modes. Implements scg_system_clock_mode_t_Class. More...
 
enum  scg_system_clock_div_t {
  SCG_SYSTEM_CLOCK_DIV_BY_1 = 0U, SCG_SYSTEM_CLOCK_DIV_BY_2 = 1U, SCG_SYSTEM_CLOCK_DIV_BY_3 = 2U, SCG_SYSTEM_CLOCK_DIV_BY_4 = 3U,
  SCG_SYSTEM_CLOCK_DIV_BY_5 = 4U, SCG_SYSTEM_CLOCK_DIV_BY_6 = 5U, SCG_SYSTEM_CLOCK_DIV_BY_7 = 6U, SCG_SYSTEM_CLOCK_DIV_BY_8 = 7U,
  SCG_SYSTEM_CLOCK_DIV_BY_9 = 8U, SCG_SYSTEM_CLOCK_DIV_BY_10 = 9U, SCG_SYSTEM_CLOCK_DIV_BY_11 = 10U, SCG_SYSTEM_CLOCK_DIV_BY_12 = 11U,
  SCG_SYSTEM_CLOCK_DIV_BY_13 = 12U, SCG_SYSTEM_CLOCK_DIV_BY_14 = 13U, SCG_SYSTEM_CLOCK_DIV_BY_15 = 14U, SCG_SYSTEM_CLOCK_DIV_BY_16 = 15U
}
 SCG system clock divider value. Implements scg_system_clock_div_t_Class. More...
 
status_t SCG_HAL_SetSystemClockConfig (SCG_Type *base, scg_system_clock_mode_t mode, scg_system_clock_config_t const *config)
 Set the system clock configuration in specified mode. More...
 
void SCG_HAL_GetSystemClockConfig (const SCG_Type *base, scg_system_clock_mode_t mode, scg_system_clock_config_t *config)
 Get the system clock configuration for specified mode. More...
 

SCG Clockout.

enum  scg_clockout_src_t {
  SCG_CLOCKOUT_SRC_SCG_SLOW = 0U, SCG_CLOCKOUT_SRC_SOSC = 1U, SCG_CLOCKOUT_SRC_SIRC = 2U, SCG_CLOCKOUT_SRC_FIRC = 3U,
  SCG_CLOCKOUT_SRC_SPLL = 6U
}
 SCG ClockOut type. Implements scg_clockout_src_t_Class. More...
 

SCG Clockout Configuration

static scg_clockout_src_t SCG_HAL_GetClockoutSourceSel (const SCG_Type *base)
 Get SCG ClockOut source select. More...
 
static void SCG_HAL_SetClockoutSourceSel (SCG_Type *base, scg_clockout_src_t source)
 Set SCG ClockOut source select. More...
 

System OSC Clock.

void SCG_HAL_GetSysOscDefaultConfig (scg_sosc_config_t *config)
 Get the default system OSC configuration. More...
 
status_t SCG_HAL_InitSysOsc (SCG_Type *base, scg_sosc_config_t const *config)
 Initialize SCG system OSC. More...
 
status_t SCG_HAL_DeinitSysOsc (SCG_Type *base)
 De-initialize SCG system OSC. More...
 
uint32_t SCG_HAL_GetSysOscFreq (const SCG_Type *base)
 Get SCG system OSC clock frequency (SYSOSC). More...
 
uint32_t SCG_HAL_GetSysOscAsyncFreq (const SCG_Type *base, scg_async_clock_type_t type)
 Get SCG asynchronous clock frequency from system OSC. More...
 

Slow IRC Clock.

void SCG_HAL_GetSircDefaultConfig (scg_sirc_config_t *config)
 Get the default slow IRC clock configuration. More...
 
status_t SCG_HAL_InitSirc (SCG_Type *base, const scg_sirc_config_t *config)
 Initialize SCG slow IRC clock. More...
 
status_t SCG_HAL_DeinitSirc (SCG_Type *base)
 De-initialize SCG slow IRC. More...
 
uint32_t SCG_HAL_GetSircFreq (const SCG_Type *base)
 Get SCG SIRC clock frequency. More...
 
uint32_t SCG_HAL_GetSircAsyncFreq (const SCG_Type *base, scg_async_clock_type_t type)
 Get SCG asynchronous clock frequency from SIRC. More...
 

Fast IRC Clock.

void SCG_HAL_GetFircDefaultConfig (scg_firc_config_t *config)
 Get the default fast IRC clock configuration. More...
 
status_t SCG_HAL_InitFirc (SCG_Type *base, const scg_firc_config_t *config)
 Initialize SCG fast IRC clock. More...
 
status_t SCG_HAL_DeinitFirc (SCG_Type *base)
 De-initialize SCG fast IRC. More...
 
uint32_t SCG_HAL_GetFircFreq (const SCG_Type *base)
 Get SCG FIRC clock frequency. More...
 
uint32_t SCG_HAL_GetFircAsyncFreq (const SCG_Type *base, scg_async_clock_type_t type)
 Get SCG asynchronous clock frequency from FIRC. More...
 
static scg_system_clock_src_t SCG_HAL_GetSystemClockSrc (const SCG_Type *base)
 Get SCG system clock source. More...
 
uint32_t SCG_HAL_GetSystemClockFreq (const SCG_Type *base, scg_system_clock_type_t type)
 Get SCG system clock frequency. More...
 

System PLL Clock.

void SCG_HAL_GetSysPllDefaultConfig (scg_spll_config_t *config)
 Get the default system PLL configuration. More...
 
status_t SCG_HAL_InitSysPll (SCG_Type *base, scg_spll_config_t const *config)
 Initialize SCG system PLL. More...
 
status_t SCG_HAL_DeinitSysPll (SCG_Type *base)
 De-initialize SCG system PLL. More...
 
uint32_t SCG_HAL_GetSysPllFreq (const SCG_Type *base)
 Get SCG system PLL clock frequency. More...
 
uint32_t SCG_HAL_GetSysPllAsyncFreq (const SCG_Type *base, scg_async_clock_type_t type)
 Get SCG asynchronous clock frequency from system PLL. More...
 

RTC Clock.

void SCG_HAL_SetRtcClkInFreq (SCG_Type *base, uint32_t frequency)
 Set SCG RTC CLKIN clock frequency. More...
 
uint32_t SCG_HAL_GetRtcClkInFreq (SCG_Type *base)
 Get SCG RTC CLKIN clock frequency. More...
 

Enumeration Type Documentation

SCG asynchronous clock divider value. Implements scg_async_clock_div_t_Class.

Enumerator
SCG_ASYNC_CLOCK_DISABLE 

Clock output is disabled.

SCG_ASYNC_CLOCK_DIV_BY_1 

Divided by 1.

SCG_ASYNC_CLOCK_DIV_BY_2 

Divided by 2.

SCG_ASYNC_CLOCK_DIV_BY_4 

Divided by 4.

SCG_ASYNC_CLOCK_DIV_BY_8 

Divided by 8.

SCG_ASYNC_CLOCK_DIV_BY_16 

Divided by 16.

SCG_ASYNC_CLOCK_DIV_BY_32 

Divided by 32.

SCG_ASYNC_CLOCK_DIV_BY_64 

Divided by 64.

Definition at line 167 of file scg_hal.h.

SCG asynchronous clock type. Implements scg_async_clock_type_t_Class.

Enumerator
SCG_ASYNC_CLOCK_DIV1 

Clock divider 1

SCG_ASYNC_CLOCK_DIV2 

Clock divider 2

SCG_ASYNC_CLOCK_MAX 

Max value.

Definition at line 156 of file scg_hal.h.

SCG ClockOut type. Implements scg_clockout_src_t_Class.

Enumerator
SCG_CLOCKOUT_SRC_SCG_SLOW 

SCG SLOW.

SCG_CLOCKOUT_SRC_SOSC 

System OSC.

SCG_CLOCKOUT_SRC_SIRC 

Slow IRC.

SCG_CLOCKOUT_SRC_FIRC 

Fast IRC.

SCG_CLOCKOUT_SRC_SPLL 

System PLL.

Definition at line 142 of file scg_hal.h.

SCG fast IRC clock frequency range. Implements scg_firc_range_t_Class.

Enumerator
SCG_FIRC_RANGE_48M 

Fast IRC is trimmed to 48MHz.

SCG_FIRC_RANGE_52M 

Fast IRC is trimmed to 52MHz.

SCG_FIRC_RANGE_56M 

Fast IRC is trimmed to 56MHz.

SCG_FIRC_RANGE_60M 

Fast IRC is trimmed to 60MHz.

Definition at line 280 of file scg_hal.h.

SCG slow IRC clock frequency range. Implements scg_sirc_range_t_Class.

Enumerator
SCG_SIRC_RANGE_LOW 

Slow IRC low range clock (2 MHz).

SCG_SIRC_RANGE_HIGH 

Slow IRC high range clock (8 MHz).

Definition at line 252 of file scg_hal.h.

SCG OSC external reference clock select. Implements scg_sosc_ext_ref_t_Class.

Enumerator
SCG_SOSC_REF_EXT 
SCG_SOSC_REF_OSC 

Definition at line 216 of file scg_hal.h.

SCG OSC high gain oscillator select. Implements scg_sosc_gain_t_Class.

Enumerator
SCG_SOSC_GAIN_LOW 
SCG_SOSC_GAIN_HIGH 

Definition at line 206 of file scg_hal.h.

SCG system OSC monitor mode. Implements scg_sosc_monitor_mode_t_Class.

Enumerator
SCG_SOSC_MONITOR_DISABLE 

Monitor disable.

SCG_SOSC_MONITOR_INT 

Interrupt when system OSC error detected.

SCG_SOSC_MONITOR_RESET 

Reset when system OSC error detected.

Definition at line 183 of file scg_hal.h.

SCG OSC frequency range select Implements scg_sosc_range_t_Class.

Enumerator
SCG_SOSC_RANGE_LOW 

Low frequency range selected for the crystal OSC (32 kHz to 40 kHz).

SCG_SOSC_RANGE_MID 

Medium frequency range selected for the crystal OSC (1 Mhz to 8 Mhz).

SCG_SOSC_RANGE_HIGH 

High frequency range selected for the crystal OSC (8 Mhz to 32 Mhz).

Definition at line 195 of file scg_hal.h.

SCG system PLL monitor mode. Implements scg_spll_monitor_mode_t_Class.

Enumerator
SCG_SPLL_MONITOR_DISABLE 

Monitor disable.

SCG_SPLL_MONITOR_INT 

Interrupt when system PLL error detected.

SCG_SPLL_MONITOR_RESET 

Reset when system PLL error detected.

Definition at line 311 of file scg_hal.h.

SCG system clock divider value. Implements scg_system_clock_div_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_DIV_BY_1 

Divided by 1.

SCG_SYSTEM_CLOCK_DIV_BY_2 

Divided by 2.

SCG_SYSTEM_CLOCK_DIV_BY_3 

Divided by 3.

SCG_SYSTEM_CLOCK_DIV_BY_4 

Divided by 4.

SCG_SYSTEM_CLOCK_DIV_BY_5 

Divided by 5.

SCG_SYSTEM_CLOCK_DIV_BY_6 

Divided by 6.

SCG_SYSTEM_CLOCK_DIV_BY_7 

Divided by 7.

SCG_SYSTEM_CLOCK_DIV_BY_8 

Divided by 8.

SCG_SYSTEM_CLOCK_DIV_BY_9 

Divided by 9.

SCG_SYSTEM_CLOCK_DIV_BY_10 

Divided by 10.

SCG_SYSTEM_CLOCK_DIV_BY_11 

Divided by 11.

SCG_SYSTEM_CLOCK_DIV_BY_12 

Divided by 12.

SCG_SYSTEM_CLOCK_DIV_BY_13 

Divided by 13.

SCG_SYSTEM_CLOCK_DIV_BY_14 

Divided by 14.

SCG_SYSTEM_CLOCK_DIV_BY_15 

Divided by 15.

SCG_SYSTEM_CLOCK_DIV_BY_16 

Divided by 16.

Definition at line 100 of file scg_hal.h.

SCG system clock modes. Implements scg_system_clock_mode_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_MODE_CURRENT 

Current mode.

SCG_SYSTEM_CLOCK_MODE_RUN 

Run mode.

SCG_SYSTEM_CLOCK_MODE_VLPR 

Very Low Power Run mode.

SCG_SYSTEM_CLOCK_MODE_HSRUN 

High Speed Run mode.

SCG_SYSTEM_CLOCK_MODE_NONE 

MAX value.

Definition at line 87 of file scg_hal.h.

SCG system clock source. Implements scg_system_clock_src_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_SRC_SYS_OSC 

System OSC.

SCG_SYSTEM_CLOCK_SRC_SIRC 

Slow IRC.

SCG_SYSTEM_CLOCK_SRC_FIRC 

Fast IRC.

SCG_SYSTEM_CLOCK_SRC_SYS_PLL 

System PLL.

SCG_SYSTEM_CLOCK_SRC_NONE 

MAX value.

Definition at line 74 of file scg_hal.h.

SCG system clock type. Implements scg_system_clock_type_t_Class.

Enumerator
SCG_SYSTEM_CLOCK_CORE 

Core clock.

SCG_SYSTEM_CLOCK_BUS 

BUS clock.

SCG_SYSTEM_CLOCK_SLOW 

System slow clock.

SCG_SYSTEM_CLOCK_MAX 

Max value.

Definition at line 62 of file scg_hal.h.

Function Documentation

status_t SCG_HAL_DeinitFirc ( SCG_Type base)

De-initialize SCG fast IRC.

This function disables the SCG fast IRC.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Status of module de-initialization
Return values
STATUS_SUCCESSFIRC is deinitialized.
STATUS_BUSYFIRC is used by system clock.
Note
This function can not detect whether FIRC is used by some IPs.
status_t SCG_HAL_DeinitSirc ( SCG_Type base)

De-initialize SCG slow IRC.

This function disables the SCG slow IRC.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Status of module de-initialization
Return values
STATUS_SUCCESSSIRC is deinitialized.
STATUS_BUSYSIRC is used by system clock.
Note
This function can not detect whether SIRC is used by some IPs.
status_t SCG_HAL_DeinitSysOsc ( SCG_Type base)

De-initialize SCG system OSC.

This function disables the SCG system OSC clock.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Status of module de-initialization
Return values
STATUS_SUCCESSSystem OSC is deinitialized.
STATUS_BUSYSystem OSC is used by system clock.
Note
This function can not detect whether system OSC is used by some IPs.
status_t SCG_HAL_DeinitSysPll ( SCG_Type base)

De-initialize SCG system PLL.

This function disables the SCG system PLL.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Status of module de-initialization
Return values
STATUS_SUCCESSsystem PLL is deinitialized.
STATUS_BUSYsystem PLL is used by system clock.
Note
This function can not detect whether system PLL is used by some IPs.
static scg_clockout_src_t SCG_HAL_GetClockoutSourceSel ( const SCG_Type base)
inlinestatic

Get SCG ClockOut source select.

This function gets the SCG clockOut source

Parameters
[in]baseRegister base address for the SCG instance.
Returns
ClockOut source. Implements SCG_HAL_GetClockoutSourceSel_Activity

Definition at line 447 of file scg_hal.h.

uint32_t SCG_HAL_GetFircAsyncFreq ( const SCG_Type base,
scg_async_clock_type_t  type 
)

Get SCG asynchronous clock frequency from FIRC.

Parameters
[in]baseRegister base address for the SCG instance.
[in]typeThe asynchronous clock type.
Returns
Clock frequency, if clock is invalid, return 0.
void SCG_HAL_GetFircDefaultConfig ( scg_firc_config_t config)

Get the default fast IRC clock configuration.

This function gets the default fast IRC clock configuration (FIRC). The default trim coarse value and trim fine value are all 0. If updateTrim is false, then trimCoar and trimFine must be set. If updateTrim is ture, then it is not necessary to set trimCoar and trimFine.

Parameters
[out]configPointer to the configuration structure.
uint32_t SCG_HAL_GetFircFreq ( const SCG_Type base)

Get SCG FIRC clock frequency.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock frequency, if clock is invalid, return 0.
uint32_t SCG_HAL_GetRtcClkInFreq ( SCG_Type base)

Get SCG RTC CLKIN clock frequency.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock frequency
uint32_t SCG_HAL_GetSircAsyncFreq ( const SCG_Type base,
scg_async_clock_type_t  type 
)

Get SCG asynchronous clock frequency from SIRC.

Parameters
[in]baseRegister base address for the SCG instance.
[in]typeThe asynchronous clock type.
Returns
Clock frequency, if clock is invalid, return 0.
void SCG_HAL_GetSircDefaultConfig ( scg_sirc_config_t config)

Get the default slow IRC clock configuration.

This function gets the default slow IRC clock configuration (SIRC).

Parameters
[out]configPointer to the configuration structure.
uint32_t SCG_HAL_GetSircFreq ( const SCG_Type base)

Get SCG SIRC clock frequency.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock frequency, if clock is invalid, return 0.
uint32_t SCG_HAL_GetSysOscAsyncFreq ( const SCG_Type base,
scg_async_clock_type_t  type 
)

Get SCG asynchronous clock frequency from system OSC.

Parameters
[in]baseRegister base address for the SCG instance.
[in]typeThe asynchronous clock type.
Returns
Clock frequency, if clock is invalid, return 0.
void SCG_HAL_GetSysOscDefaultConfig ( scg_sosc_config_t config)

Get the default system OSC configuration.

This function gets the default SCG system OSC configuration.

Parameters
[out]configPointer to the configuration structure.
uint32_t SCG_HAL_GetSysOscFreq ( const SCG_Type base)

Get SCG system OSC clock frequency (SYSOSC).

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock frequency, if clock is invalid, return 0.
uint32_t SCG_HAL_GetSysPllAsyncFreq ( const SCG_Type base,
scg_async_clock_type_t  type 
)

Get SCG asynchronous clock frequency from system PLL.

Parameters
[in]baseRegister base address for the SCG instance.
[in]typeThe asynchronous clock type.
Returns
Clock frequency, if clock is invalid, return 0.
void SCG_HAL_GetSysPllDefaultConfig ( scg_spll_config_t config)

Get the default system PLL configuration.

This function gets the default SCG system PLL configuration.

Parameters
[out]configPointer to the configuration structure.
uint32_t SCG_HAL_GetSysPllFreq ( const SCG_Type base)

Get SCG system PLL clock frequency.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock frequency, if clock is invalid, return 0.
void SCG_HAL_GetSystemClockConfig ( const SCG_Type base,
scg_system_clock_mode_t  mode,
scg_system_clock_config_t config 
)

Get the system clock configuration for specified mode.

This function gets the system configuration for specified mode.

Parameters
[in]baseRegister base address for the SCG instance.
[in]modespecifies the mode.
[out]configPointer to the configuration.
uint32_t SCG_HAL_GetSystemClockFreq ( const SCG_Type base,
scg_system_clock_type_t  type 
)

Get SCG system clock frequency.

This function gets the SCG system clock frequency, these clocks are used for core, platform, external and bus clock domains.

Parameters
[in]baseRegister base address for the SCG instance.
[in]typeWhich type of clock to get, core clock or slow clock.
Returns
Clock frequency.
static scg_system_clock_src_t SCG_HAL_GetSystemClockSrc ( const SCG_Type base)
inlinestatic

Get SCG system clock source.

This function gets the SCG system clock source, these clocks are used for core, platform, external and bus clock domains.

Parameters
[in]baseRegister base address for the SCG instance.
Returns
Clock source. Implements SCG_HAL_GetSystemClockSrc_Activity

Definition at line 727 of file scg_hal.h.

status_t SCG_HAL_InitFirc ( SCG_Type base,
const scg_firc_config_t config 
)

Initialize SCG fast IRC clock.

This function enables the SCG fast IRC clock according to the configuration.

Parameters
[in]baseRegister base address for the SCG instance.
[in]configPointer to the configuration structure.
Returns
Status of module initialization
Return values
STATUS_SUCCESSFIRC is initialized.
STATUS_BUSYFIRC has been enabled and used by system clock.
STATUS_ERRORFIRC initialization routine detected an error
Note
This function can not detect whether system OSC has been enabled and used by some IPs.
status_t SCG_HAL_InitSirc ( SCG_Type base,
const scg_sirc_config_t config 
)

Initialize SCG slow IRC clock.

This function enables the SCG slow IRC clock according to the configuration.

Parameters
[in]baseRegister base address for the SCG instance.
[in]configPointer to the configuration structure.
Returns
Status of module initialization
Return values
STATUS_SUCCESSSIRC is initialized.
STATUS_BUSYSIRC has been enabled and used by system clock.
Note
This function can not detect whether SIRC is used by some IPs.
status_t SCG_HAL_InitSysOsc ( SCG_Type base,
scg_sosc_config_t const *  config 
)

Initialize SCG system OSC.

This function enables the SCG system OSC clock according to the configuration.

Parameters
[in]baseRegister base address for the SCG instance.
[in]configPointer to the configuration structure.
Returns
Status of module initialization
Return values
STATUS_SUCCESSSystem OSC is initialized.
STATUS_BUSYSystem OSC has been enabled and used by system clock.
Note
This function can not detect whether system OSC has been enabled and used by some IPs.
status_t SCG_HAL_InitSysPll ( SCG_Type base,
scg_spll_config_t const *  config 
)

Initialize SCG system PLL.

This function enables the SCG system PLL clock according to the configuration. The system PLL could use system OSC or FIRC as the clock source, please make sure the source clock is valid before this function.

Parameters
[in]baseRegister base address for the SCG instance.
[in]configPointer to the configuration structure.
Returns
Status of module initialization
Return values
STATUS_SUCCESSSystem PLL is initialized.
STATUS_BUSYSystem PLL has been enabled and used by system clock.
Note
This function can not detect whether system PLL has been enabled and used by some IPs.
static void SCG_HAL_SetClockoutSourceSel ( SCG_Type base,
scg_clockout_src_t  source 
)
inlinestatic

Set SCG ClockOut source select.

This function sets the SCG ClockOut source

Parameters
[in]baseRegister base address for the SCG instance.
[in]sourceused for ClockOut Implements SCG_HAL_SetClockoutSourceSel_Activity

Definition at line 485 of file scg_hal.h.

void SCG_HAL_SetRtcClkInFreq ( SCG_Type base,
uint32_t  frequency 
)

Set SCG RTC CLKIN clock frequency.

Parameters
[in]baseRegister base address for the SCG instance.
[in]frequencyThe frequency of the RTC_CLKIN
status_t SCG_HAL_SetSystemClockConfig ( SCG_Type base,
scg_system_clock_mode_t  mode,
scg_system_clock_config_t const *  config 
)

Set the system clock configuration in specified mode.

This function sets the system configuration in specified mode.

Parameters
[in]baseRegister base address for the SCG instance.
[in]modespecifies the mode.
[in]configPointer to the configuration.
Returns
Status of the system clock source setting
Return values
STATUS_SUCCESSthe new system clock source has been set
STATUS_ERRORconfiguration for the new system clock source is not valid

Variable Documentation

uint32_t g_RtcClkInFreq

Definition at line 70 of file clock_S32K144.c.

uint32_t g_xtal0ClkFreq

Definition at line 73 of file clock_S32K144.c.