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trgmux_hal.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2013 - 2015, Freescale Semiconductor, Inc.
3
* Copyright 2016-2017 NXP
4
* All rights reserved.
5
*
6
* THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9
* IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16
* THE POSSIBILITY OF SUCH DAMAGE.
17
*/
18
19
#ifndef TRGMUX_HAL_H
20
#define TRGMUX_HAL_H
21
44
#include <stdint.h>
45
#include <stdbool.h>
46
#include "
device_registers.h
"
47
#include "
status.h
"
48
54
/*******************************************************************************
55
* Definitions
56
*******************************************************************************/
57
62
typedef
enum
63
{
64
TRGMUX_TRIG_SOURCE_DISABLED
= 0x0U,
65
TRGMUX_TRIG_SOURCE_VDD
= 0x1U,
66
TRGMUX_TRIG_SOURCE_TRGMUX_IN0
= 0x2U,
67
TRGMUX_TRIG_SOURCE_TRGMUX_IN1
= 0x3U,
68
TRGMUX_TRIG_SOURCE_TRGMUX_IN2
= 0x4U,
69
TRGMUX_TRIG_SOURCE_TRGMUX_IN3
= 0x5U,
70
TRGMUX_TRIG_SOURCE_TRGMUX_IN4
= 0x6U,
71
TRGMUX_TRIG_SOURCE_TRGMUX_IN5
= 0x7U,
72
TRGMUX_TRIG_SOURCE_TRGMUX_IN6
= 0x8U,
73
TRGMUX_TRIG_SOURCE_TRGMUX_IN7
= 0x9U,
74
TRGMUX_TRIG_SOURCE_TRGMUX_IN8
= 0xAU,
75
TRGMUX_TRIG_SOURCE_TRGMUX_IN9
= 0xBU,
76
TRGMUX_TRIG_SOURCE_TRGMUX_IN10
= 0xCU,
77
TRGMUX_TRIG_SOURCE_TRGMUX_IN11
= 0xDU,
78
TRGMUX_TRIG_SOURCE_CMP0_OUT
= 0xEU,
79
TRGMUX_TRIG_SOURCE_LPIT_CH0
= 0x11U,
80
TRGMUX_TRIG_SOURCE_LPIT_CH1
= 0x12U,
81
TRGMUX_TRIG_SOURCE_LPIT_CH2
= 0x13U,
82
TRGMUX_TRIG_SOURCE_LPIT_CH3
= 0x14U,
83
TRGMUX_TRIG_SOURCE_LPTMR0
= 0x15U,
84
TRGMUX_TRIG_SOURCE_FTM0_INIT_TRIG
= 0x16U,
85
TRGMUX_TRIG_SOURCE_FTM0_EXT_TRIG
= 0x17U,
86
TRGMUX_TRIG_SOURCE_FTM1_INIT_TRIG
= 0x18U,
87
TRGMUX_TRIG_SOURCE_FTM1_EXT_TRIG
= 0x19U,
88
TRGMUX_TRIG_SOURCE_FTM2_INIT_TRIG
= 0x1AU,
89
TRGMUX_TRIG_SOURCE_FTM2_EXT_TRIG
= 0x1BU,
90
TRGMUX_TRIG_SOURCE_FTM3_INIT_TRIG
= 0x1CU,
91
TRGMUX_TRIG_SOURCE_FTM3_EXT_TRIG
= 0x1DU,
92
TRGMUX_TRIG_SOURCE_ADC0_SC1A_COCO
= 0x1EU,
93
TRGMUX_TRIG_SOURCE_ADC0_SC1B_COCO
= 0x1FU,
94
TRGMUX_TRIG_SOURCE_ADC1_SC1A_COCO
= 0x20U,
95
TRGMUX_TRIG_SOURCE_ADC1_SC1B_COCO
= 0x21U,
96
TRGMUX_TRIG_SOURCE_PDB0_CH0_TRIG
= 0x22U,
97
TRGMUX_TRIG_SOURCE_PDB0_PULSE_OUT
= 0x24U,
98
TRGMUX_TRIG_SOURCE_PDB1_CH0_TRIG
= 0x25U,
99
TRGMUX_TRIG_SOURCE_PDB1_PULSE_OUT
= 0x27U,
100
TRGMUX_TRIG_SOURCE_RTC_ALARM
= 0x2BU,
101
TRGMUX_TRIG_SOURCE_RTC_SECOND
= 0x2CU,
102
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG0
= 0x2DU,
103
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG1
= 0x2EU,
104
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG2
= 0x2FU,
105
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG3
= 0x30U,
106
TRGMUX_TRIG_SOURCE_LPUART0_RX_DATA
= 0x31U,
107
TRGMUX_TRIG_SOURCE_LPUART0_TX_DATA
= 0x32U,
108
TRGMUX_TRIG_SOURCE_LPUART0_RX_IDLE
= 0x33U,
109
TRGMUX_TRIG_SOURCE_LPUART1_RX_DATA
= 0x34U,
110
TRGMUX_TRIG_SOURCE_LPUART1_TX_DATA
= 0x35U,
111
TRGMUX_TRIG_SOURCE_LPUART1_RX_IDLE
= 0x36U,
112
TRGMUX_TRIG_SOURCE_LPI2C0_MASTER_TRIGGER
= 0x37U,
113
TRGMUX_TRIG_SOURCE_LPI2C0_SLAVE_TRIGGER
= 0x38U,
114
TRGMUX_TRIG_SOURCE_LPSPI0_FRAME
= 0x3BU,
115
TRGMUX_TRIG_SOURCE_LPSPI0_RX_DATA
= 0x3CU,
116
TRGMUX_TRIG_SOURCE_LPSPI1_FRAME
= 0x3DU,
117
TRGMUX_TRIG_SOURCE_LPSPI1_RX_DATA
= 0x3EU,
118
TRGMUX_TRIG_SOURCE_SIM_SW_TRIG
= 0x3FU
119
}
trgmux_trigger_source_t
;
120
125
typedef
enum
126
{
127
TRGMUX_TARGET_MODULE_DMA_CH0
= 0U,
128
TRGMUX_TARGET_MODULE_DMA_CH1
= 1U,
129
TRGMUX_TARGET_MODULE_DMA_CH2
= 2U,
130
TRGMUX_TARGET_MODULE_DMA_CH3
= 3U,
131
TRGMUX_TARGET_MODULE_TRGMUX_OUT0
= 4U,
132
TRGMUX_TARGET_MODULE_TRGMUX_OUT1
= 5U,
133
TRGMUX_TARGET_MODULE_TRGMUX_OUT2
= 6U,
134
TRGMUX_TARGET_MODULE_TRGMUX_OUT3
= 7U,
135
TRGMUX_TARGET_MODULE_TRGMUX_OUT4
= 8U,
136
TRGMUX_TARGET_MODULE_TRGMUX_OUT5
= 9U,
137
TRGMUX_TARGET_MODULE_TRGMUX_OUT6
= 10U,
138
TRGMUX_TARGET_MODULE_TRGMUX_OUT7
= 11U,
139
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA0
= 12U,
140
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA1
= 13U,
141
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA2
= 14U,
142
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA3
= 15U,
143
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA0
= 16U,
144
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA1
= 17U,
145
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA2
= 18U,
146
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA3
= 19U,
147
TRGMUX_TARGET_MODULE_CMP0_SAMPLE_INPUT
= 28U,
148
TRGMUX_TARGET_MODULE_FTM0_HWTRIG0
= 40U,
149
TRGMUX_TARGET_MODULE_FTM0_FAULT0
= 41U,
150
TRGMUX_TARGET_MODULE_FTM0_FAULT1
= 42U,
151
TRGMUX_TARGET_MODULE_FTM0_FAULT2
= 43U,
152
TRGMUX_TARGET_MODULE_FTM1_HWTRIG0
= 44U,
153
TRGMUX_TARGET_MODULE_FTM1_FAULT0
= 45U,
154
TRGMUX_TARGET_MODULE_FTM1_FAULT1
= 46U,
155
TRGMUX_TARGET_MODULE_FTM1_FAULT2
= 47U,
156
TRGMUX_TARGET_MODULE_FTM2_HWTRIG0
= 48U,
157
TRGMUX_TARGET_MODULE_FTM2_FAULT0
= 49U,
158
TRGMUX_TARGET_MODULE_FTM2_FAULT1
= 50U,
159
TRGMUX_TARGET_MODULE_FTM2_FAULT2
= 51U,
160
TRGMUX_TARGET_MODULE_FTM3_HWTRIG0
= 52U,
161
TRGMUX_TARGET_MODULE_FTM3_FAULT0
= 53U,
162
TRGMUX_TARGET_MODULE_FTM3_FAULT1
= 54U,
163
TRGMUX_TARGET_MODULE_FTM3_FAULT2
= 55U,
164
TRGMUX_TARGET_MODULE_PDB0_TRG_IN
= 56U,
165
TRGMUX_TARGET_MODULE_PDB1_TRG_IN
= 60U,
166
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM0
= 68U,
167
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM1
= 69U,
168
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM2
= 70U,
169
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM3
= 71U,
170
TRGMUX_TARGET_MODULE_LPIT_TRG_CH0
= 72U,
171
TRGMUX_TARGET_MODULE_LPIT_TRG_CH1
= 73U,
172
TRGMUX_TARGET_MODULE_LPIT_TRG_CH2
= 74U,
173
TRGMUX_TARGET_MODULE_LPIT_TRG_CH3
= 75U,
174
TRGMUX_TARGET_MODULE_LPUART0_TRG
= 76U,
175
TRGMUX_TARGET_MODULE_LPUART1_TRG
= 80U,
176
TRGMUX_TARGET_MODULE_LPI2C0_TRG
= 84U,
177
TRGMUX_TARGET_MODULE_LPSPI0_TRG
= 92U,
178
TRGMUX_TARGET_MODULE_LPSPI1_TRG
= 96U,
179
TRGMUX_TARGET_MODULE_LPTMR0_ALT0
= 100U
180
}
trgmux_target_module_t
;
181
182
183
/*******************************************************************************
184
* API
185
*******************************************************************************/
186
187
#if defined(__cplusplus)
188
extern
"C"
{
189
#endif
190
191
202
status_t
TRGMUX_HAL_Init
(
TRGMUX_Type
*
const
base);
203
214
void
TRGMUX_HAL_SetTrigSourceForTargetModule
(
TRGMUX_Type
*
const
base,
215
const
trgmux_trigger_source_t
triggerSource,
216
const
trgmux_target_module_t
targetModule);
217
228
trgmux_trigger_source_t
TRGMUX_HAL_GetTrigSourceForTargetModule
(
const
TRGMUX_Type
*
const
base,
229
const
trgmux_target_module_t
targetModule);
230
243
void
TRGMUX_HAL_SetLockForTargetModule
(
TRGMUX_Type
*
const
base,
244
const
trgmux_target_module_t
targetModule);
245
256
bool
TRGMUX_HAL_GetLockForTargetModule
(
const
TRGMUX_Type
*
const
base,
257
const
trgmux_target_module_t
targetModule);
258
259
#if defined(__cplusplus)
260
}
261
#endif
262
265
#endif
/* TRGMUX_HAL_H */
266
/*******************************************************************************
267
* EOF
268
*******************************************************************************/
TRGMUX_TRIG_SOURCE_TRGMUX_IN10
Definition:
trgmux_hal.h:76
TRGMUX_TRIG_SOURCE_LPI2C0_SLAVE_TRIGGER
Definition:
trgmux_hal.h:113
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA2
Definition:
trgmux_hal.h:141
TRGMUX_TARGET_MODULE_LPIT_TRG_CH3
Definition:
trgmux_hal.h:173
TRGMUX_TRIG_SOURCE_RTC_ALARM
Definition:
trgmux_hal.h:100
TRGMUX_TRIG_SOURCE_ADC1_SC1A_COCO
Definition:
trgmux_hal.h:94
TRGMUX_TRIG_SOURCE_ADC0_SC1A_COCO
Definition:
trgmux_hal.h:92
TRGMUX_TRIG_SOURCE_LPIT_CH3
Definition:
trgmux_hal.h:82
TRGMUX_TRIG_SOURCE_ADC1_SC1B_COCO
Definition:
trgmux_hal.h:95
TRGMUX_TRIG_SOURCE_ADC0_SC1B_COCO
Definition:
trgmux_hal.h:93
TRGMUX_TRIG_SOURCE_PDB0_PULSE_OUT
Definition:
trgmux_hal.h:97
TRGMUX_TARGET_MODULE_DMA_CH0
Definition:
trgmux_hal.h:127
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA2
Definition:
trgmux_hal.h:145
TRGMUX_TRIG_SOURCE_LPTMR0
Definition:
trgmux_hal.h:83
device_registers.h
TRGMUX_TARGET_MODULE_TRGMUX_OUT7
Definition:
trgmux_hal.h:138
TRGMUX_HAL_Init
status_t TRGMUX_HAL_Init(TRGMUX_Type *const base)
Restore the TRGMUX module to reset value.
Definition:
trgmux_hal.c:58
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA3
Definition:
trgmux_hal.h:142
TRGMUX_TRIG_SOURCE_LPUART0_RX_IDLE
Definition:
trgmux_hal.h:108
TRGMUX_TRIG_SOURCE_LPIT_CH1
Definition:
trgmux_hal.h:80
TRGMUX_TARGET_MODULE_FTM1_FAULT2
Definition:
trgmux_hal.h:155
TRGMUX_TARGET_MODULE_FTM0_HWTRIG0
Definition:
trgmux_hal.h:148
TRGMUX_TARGET_MODULE_DMA_CH3
Definition:
trgmux_hal.h:130
TRGMUX_TARGET_MODULE_FTM3_FAULT1
Definition:
trgmux_hal.h:162
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM2
Definition:
trgmux_hal.h:168
TRGMUX_TARGET_MODULE_CMP0_SAMPLE_INPUT
Definition:
trgmux_hal.h:147
TRGMUX_TARGET_MODULE_PDB0_TRG_IN
Definition:
trgmux_hal.h:164
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA3
Definition:
trgmux_hal.h:146
TRGMUX_TRIG_SOURCE_LPSPI0_FRAME
Definition:
trgmux_hal.h:114
TRGMUX_TRIG_SOURCE_LPUART1_RX_DATA
Definition:
trgmux_hal.h:109
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM1
Definition:
trgmux_hal.h:167
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG3
Definition:
trgmux_hal.h:105
TRGMUX_TRIG_SOURCE_FTM2_EXT_TRIG
Definition:
trgmux_hal.h:89
TRGMUX_TARGET_MODULE_FTM2_HWTRIG0
Definition:
trgmux_hal.h:156
TRGMUX_TRIG_SOURCE_FTM1_INIT_TRIG
Definition:
trgmux_hal.h:86
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG0
Definition:
trgmux_hal.h:102
TRGMUX_HAL_GetLockForTargetModule
bool TRGMUX_HAL_GetLockForTargetModule(const TRGMUX_Type *const base, const trgmux_target_module_t targetModule)
Get the Lock bit status of the TRGMUX register of a target module.
Definition:
trgmux_hal.c:241
TRGMUX_TARGET_MODULE_FTM2_FAULT2
Definition:
trgmux_hal.h:159
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG1
Definition:
trgmux_hal.h:103
TRGMUX_TRIG_SOURCE_TRGMUX_IN9
Definition:
trgmux_hal.h:75
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA0
Definition:
trgmux_hal.h:139
TRGMUX_TARGET_MODULE_TRGMUX_OUT4
Definition:
trgmux_hal.h:135
TRGMUX_TARGET_MODULE_DMA_CH2
Definition:
trgmux_hal.h:129
TRGMUX_TRIG_SOURCE_LPI2C0_MASTER_TRIGGER
Definition:
trgmux_hal.h:112
TRGMUX_TARGET_MODULE_TRGMUX_OUT6
Definition:
trgmux_hal.h:137
TRGMUX_TRIG_SOURCE_TRGMUX_IN11
Definition:
trgmux_hal.h:77
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM3
Definition:
trgmux_hal.h:169
TRGMUX_HAL_SetLockForTargetModule
void TRGMUX_HAL_SetLockForTargetModule(TRGMUX_Type *const base, const trgmux_target_module_t targetModule)
Lock the TRGMUX register of a target module.
Definition:
trgmux_hal.c:222
TRGMUX_TRIG_SOURCE_TRGMUX_IN3
Definition:
trgmux_hal.h:69
TRGMUX_TARGET_MODULE_FTM1_FAULT1
Definition:
trgmux_hal.h:154
TRGMUX_TARGET_MODULE_LPUART0_TRG
Definition:
trgmux_hal.h:174
TRGMUX_TRIG_SOURCE_VDD
Definition:
trgmux_hal.h:65
TRGMUX_TRIG_SOURCE_TRGMUX_IN2
Definition:
trgmux_hal.h:68
TRGMUX_TARGET_MODULE_ADC0_ADHWT_TLA1
Definition:
trgmux_hal.h:140
TRGMUX_TARGET_MODULE_FTM0_FAULT2
Definition:
trgmux_hal.h:151
TRGMUX_TRIG_SOURCE_TRGMUX_IN1
Definition:
trgmux_hal.h:67
TRGMUX_TARGET_MODULE_FTM2_FAULT0
Definition:
trgmux_hal.h:157
TRGMUX_TARGET_MODULE_FTM1_FAULT0
Definition:
trgmux_hal.h:153
trgmux_target_module_t
trgmux_target_module_t
Describes all possible outputs (target modules) of the TRGMUX IP.
Definition:
trgmux_hal.h:125
TRGMUX_TRIG_SOURCE_FTM0_INIT_TRIG
Definition:
trgmux_hal.h:84
TRGMUX_TRIG_SOURCE_TRGMUX_IN5
Definition:
trgmux_hal.h:71
TRGMUX_TRIG_SOURCE_TRGMUX_IN4
Definition:
trgmux_hal.h:70
TRGMUX_TARGET_MODULE_FTM2_FAULT1
Definition:
trgmux_hal.h:158
TRGMUX_TARGET_MODULE_FTM3_FAULT2
Definition:
trgmux_hal.h:163
TRGMUX_TARGET_MODULE_FTM3_HWTRIG0
Definition:
trgmux_hal.h:160
TRGMUX_TRIG_SOURCE_TRGMUX_IN8
Definition:
trgmux_hal.h:74
TRGMUX_TRIG_SOURCE_DISABLED
Definition:
trgmux_hal.h:64
TRGMUX_TARGET_MODULE_LPI2C0_TRG
Definition:
trgmux_hal.h:176
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA1
Definition:
trgmux_hal.h:144
TRGMUX_TRIG_SOURCE_FTM1_EXT_TRIG
Definition:
trgmux_hal.h:87
TRGMUX_TRIG_SOURCE_LPSPI0_RX_DATA
Definition:
trgmux_hal.h:115
status_t
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition:
status.h:31
TRGMUX_TRIG_SOURCE_TRGMUX_IN0
Definition:
trgmux_hal.h:66
TRGMUX_TRIG_SOURCE_LPIT_CH2
Definition:
trgmux_hal.h:81
TRGMUX_TARGET_MODULE_LPIT_TRG_CH2
Definition:
trgmux_hal.h:172
TRGMUX_TRIG_SOURCE_SIM_SW_TRIG
Definition:
trgmux_hal.h:118
TRGMUX_HAL_SetTrigSourceForTargetModule
void TRGMUX_HAL_SetTrigSourceForTargetModule(TRGMUX_Type *const base, const trgmux_trigger_source_t triggerSource, const trgmux_target_module_t targetModule)
Configures a source trigger for a target module.
Definition:
trgmux_hal.c:166
TRGMUX_TARGET_MODULE_LPIT_TRG_CH0
Definition:
trgmux_hal.h:170
TRGMUX_TARGET_MODULE_TRGMUX_OUT2
Definition:
trgmux_hal.h:133
TRGMUX_TARGET_MODULE_PDB1_TRG_IN
Definition:
trgmux_hal.h:165
TRGMUX_TARGET_MODULE_FTM0_FAULT1
Definition:
trgmux_hal.h:150
TRGMUX_TARGET_MODULE_ADC1_ADHWT_TLA0
Definition:
trgmux_hal.h:143
TRGMUX_TRIG_SOURCE_FTM2_INIT_TRIG
Definition:
trgmux_hal.h:88
TRGMUX_TARGET_MODULE_LPTMR0_ALT0
Definition:
trgmux_hal.h:179
TRGMUX_TARGET_MODULE_FTM3_FAULT0
Definition:
trgmux_hal.h:161
TRGMUX_TRIG_SOURCE_LPUART0_TX_DATA
Definition:
trgmux_hal.h:107
trgmux_trigger_source_t
trgmux_trigger_source_t
Describes all possible inputs (trigger sources) of the TRGMUX IP.
Definition:
trgmux_hal.h:62
TRGMUX_TARGET_MODULE_LPIT_TRG_CH1
Definition:
trgmux_hal.h:171
TRGMUX_TARGET_MODULE_TRGMUX_OUT3
Definition:
trgmux_hal.h:134
TRGMUX_TRIG_SOURCE_TRGMUX_IN6
Definition:
trgmux_hal.h:72
TRGMUX_TARGET_MODULE_FLEXIO_TRG_TIM0
Definition:
trgmux_hal.h:166
TRGMUX_HAL_GetTrigSourceForTargetModule
trgmux_trigger_source_t TRGMUX_HAL_GetTrigSourceForTargetModule(const TRGMUX_Type *const base, const trgmux_target_module_t targetModule)
Get the source trigger configured for a target module.
Definition:
trgmux_hal.c:197
TRGMUX_TRIG_SOURCE_FTM3_EXT_TRIG
Definition:
trgmux_hal.h:91
TRGMUX_TARGET_MODULE_TRGMUX_OUT0
Definition:
trgmux_hal.h:131
status.h
TRGMUX_TRIG_SOURCE_LPSPI1_FRAME
Definition:
trgmux_hal.h:116
TRGMUX_TRIG_SOURCE_RTC_SECOND
Definition:
trgmux_hal.h:101
TRGMUX_TARGET_MODULE_TRGMUX_OUT5
Definition:
trgmux_hal.h:136
TRGMUX_TARGET_MODULE_FTM0_FAULT0
Definition:
trgmux_hal.h:149
TRGMUX_Type
Definition:
S32K144.h:11168
TRGMUX_TRIG_SOURCE_LPUART1_TX_DATA
Definition:
trgmux_hal.h:110
TRGMUX_TRIG_SOURCE_LPUART0_RX_DATA
Definition:
trgmux_hal.h:106
TRGMUX_TRIG_SOURCE_LPIT_CH0
Definition:
trgmux_hal.h:79
TRGMUX_TRIG_SOURCE_PDB0_CH0_TRIG
Definition:
trgmux_hal.h:96
TRGMUX_TRIG_SOURCE_FLEXIO_TRIG2
Definition:
trgmux_hal.h:104
TRGMUX_TRIG_SOURCE_PDB1_PULSE_OUT
Definition:
trgmux_hal.h:99
TRGMUX_TRIG_SOURCE_FTM3_INIT_TRIG
Definition:
trgmux_hal.h:90
TRGMUX_TRIG_SOURCE_TRGMUX_IN7
Definition:
trgmux_hal.h:73
TRGMUX_TARGET_MODULE_FTM1_HWTRIG0
Definition:
trgmux_hal.h:152
TRGMUX_TRIG_SOURCE_FTM0_EXT_TRIG
Definition:
trgmux_hal.h:85
TRGMUX_TARGET_MODULE_LPUART1_TRG
Definition:
trgmux_hal.h:175
TRGMUX_TRIG_SOURCE_PDB1_CH0_TRIG
Definition:
trgmux_hal.h:98
TRGMUX_TARGET_MODULE_TRGMUX_OUT1
Definition:
trgmux_hal.h:132
TRGMUX_TRIG_SOURCE_CMP0_OUT
Definition:
trgmux_hal.h:78
TRGMUX_TRIG_SOURCE_LPUART1_RX_IDLE
Definition:
trgmux_hal.h:111
TRGMUX_TRIG_SOURCE_LPSPI1_RX_DATA
Definition:
trgmux_hal.h:117
TRGMUX_TARGET_MODULE_LPSPI1_TRG
Definition:
trgmux_hal.h:178
TRGMUX_TARGET_MODULE_DMA_CH1
Definition:
trgmux_hal.h:128
TRGMUX_TARGET_MODULE_LPSPI0_TRG
Definition:
trgmux_hal.h:177
platform
hal
inc
trgmux_hal.h
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