S32 SDK
flexio_i2s_driver.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2014 - 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
19 #ifndef FLEXIO_I2S_DRIVER_H
20 #define FLEXIO_I2S_DRIVER_H
21 
22 #include <stddef.h>
23 #include <stdbool.h>
24 #include "device_registers.h"
25 #include "flexio_hal.h"
26 #include "flexio.h"
27 #include "edma_driver.h"
28 
54 /*******************************************************************************
55  * Enumerations.
56  ******************************************************************************/
57 
58 
59 /*******************************************************************************
60 * Definitions
61 ******************************************************************************/
62 
63 
70 typedef struct
71 {
73  uint32_t baudRate;
74  uint8_t bitsWidth;
75  uint8_t txPin;
76  uint8_t rxPin;
77  uint8_t sckPin;
78  uint8_t wsPin;
83  void *callbackParam;
84  uint8_t rxDMAChannel;
85  uint8_t txDMAChannel;
87 
88 
95 typedef struct
96 {
98  uint8_t bitsWidth;
99  uint8_t txPin;
100  uint8_t rxPin;
101  uint8_t sckPin;
102  uint8_t wsPin;
108  uint8_t rxDMAChannel;
109  uint8_t txDMAChannel;
111 
112 
121 typedef struct
122 {
124  flexio_common_state_t flexioCommon; /* Common flexio drivers structure */
125  const uint8_t *txData; /* Transmit buffer. */
126  uint8_t *rxData; /* Receive buffer. */
127  uint32_t txRemainingBytes; /* Number of remaining bytes to be transmitted. */
128  uint32_t rxRemainingBytes; /* Number of remaining bytes to be received. */
129  uint32_t dummyDmaData; /* Dummy location for DMA transfers. */
130  uint8_t rxDMAChannel; /* Rx DMA channel number */
131  uint8_t txDMAChannel; /* Tx DMA channel number */
132  uint8_t bitsWidth; /* Number of bits in a word */
133  uint8_t byteWidth; /* Number of bytes in a word */
134  bool master; /* Current instance is in master mode */
135  flexio_driver_type_t driverType; /* Driver type: interrupts/polling/DMA */
136  status_t status; /* Current status of the driver */
137  bool driverIdle; /* Idle/busy state of the driver */
138  semaphore_t idleSemaphore; /* Semaphore used by blocking functions */
139  bool blocking; /* Specifies if the current transfer is blocking */
140  flexio_callback_t callback; /* User callback function */
141  void *callbackParam; /* Parameter for the callback function */
144 
154 
155 
156 /*******************************************************************************
157  * API
158  ******************************************************************************/
164 #if defined(__cplusplus)
165 extern "C" {
166 #endif
167 
184 status_t FLEXIO_I2S_DRV_MasterInit(uint32_t instance,
185  const flexio_i2s_master_user_config_t * userConfigPtr,
186  flexio_i2s_master_state_t * master);
187 
188 
200 
201 
219  uint32_t baudRate,
220  uint8_t bitsWidth);
221 
222 
233 
234 
250  const uint8_t * txBuff,
251  uint32_t txSize);
252 
253 
254 
268  const uint8_t * txBuff,
269  uint32_t txSize,
270  uint32_t timeout);
271 
272 
288  uint8_t * rxBuff,
289  uint32_t rxSize);
290 
291 
304  uint8_t * rxBuff,
305  uint32_t rxSize,
306  uint32_t timeout);
307 
308 
318 
319 
334 status_t FLEXIO_I2S_DRV_MasterGetStatus(flexio_i2s_master_state_t * master, uint32_t *bytesRemaining);
335 
336 
350  uint8_t * rxBuff,
351  uint32_t rxSize);
352 
353 
367  const uint8_t * txBuff,
368  uint32_t txSize);
369 
370 
387 status_t FLEXIO_I2S_DRV_SlaveInit(uint32_t instance,
388  const flexio_i2s_slave_user_config_t * userConfigPtr,
389  flexio_i2s_slave_state_t * slave);
390 
391 
404 {
405  return FLEXIO_I2S_DRV_MasterDeinit(slave);
406 }
407 
408 
419  uint8_t bitsWidth);
420 
421 
438  const uint8_t * txBuff,
439  uint32_t txSize)
440 {
441  return FLEXIO_I2S_DRV_MasterSendData(slave, txBuff, txSize);
442 }
443 
444 
445 
460  const uint8_t * txBuff,
461  uint32_t txSize,
462  uint32_t timeout)
463 {
464  return FLEXIO_I2S_DRV_MasterSendDataBlocking(slave, txBuff, txSize, timeout);
465 }
466 
467 
484  uint8_t * rxBuff,
485  uint32_t rxSize)
486 {
487  return FLEXIO_I2S_DRV_MasterReceiveData(slave, rxBuff, rxSize);
488 }
489 
490 
504  uint8_t * rxBuff,
505  uint32_t rxSize,
506  uint32_t timeout)
507 {
508  return FLEXIO_I2S_DRV_MasterReceiveDataBlocking(slave, rxBuff, rxSize, timeout);
509 }
510 
511 
522 {
524 }
525 
526 
542 static inline status_t FLEXIO_I2S_DRV_SlaveGetStatus(flexio_i2s_slave_state_t * slave, uint32_t *bytesRemaining)
543 {
544  return FLEXIO_I2S_DRV_MasterGetStatus(slave, bytesRemaining);
545 }
546 
547 
562  uint8_t * rxBuff,
563  uint32_t rxSize)
564 {
565  return FLEXIO_I2S_DRV_MasterSetRxBuffer(slave, rxBuff, rxSize);
566 }
567 
568 
583  const uint8_t * txBuff,
584  uint32_t txSize)
585 {
586  return FLEXIO_I2S_DRV_MasterSetTxBuffer(slave, txBuff, txSize);
587 }
588 
589 
591 #if defined(__cplusplus)
592 }
593 #endif
594 
597 #endif /* FLEXIO_I2S_DRIVER_H */
598 /*******************************************************************************
599  * EOF
600  ******************************************************************************/
status_t FLEXIO_I2S_DRV_MasterReceiveDataBlocking(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking receive transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterReceiveData(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking receive transaction on the I2S bus.
static status_t FLEXIO_I2S_DRV_SlaveTransferAbort(flexio_i2s_slave_state_t *slave)
Aborts a non-blocking I2S slave transaction.
status_t FLEXIO_I2S_DRV_MasterSetTxBuffer(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize)
Provide a buffer for transmitting data.
status_t FLEXIO_I2S_DRV_MasterSendData(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking send transaction on the I2S bus.
Master internal context structure.
Slave configuration structure.
void(* flexio_callback_t)(void *driverState, flexio_event_t event, void *userData)
flexio callback function
Definition: flexio.h:74
static status_t FLEXIO_I2S_DRV_SlaveSetTxBuffer(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize)
Provide a buffer for transmitting data.
flexio_i2s_master_state_t flexio_i2s_slave_state_t
Slave internal context structure.
status_t FLEXIO_I2S_DRV_MasterDeinit(flexio_i2s_master_state_t *master)
De-initialize the FLEXIO_I2S master mode driver.
status_t FLEXIO_I2S_DRV_SlaveInit(uint32_t instance, const flexio_i2s_slave_user_config_t *userConfigPtr, flexio_i2s_slave_state_t *slave)
Initialize the FLEXIO_I2S slave mode driver.
static status_t FLEXIO_I2S_DRV_SlaveSendData(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking send transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterSendDataBlocking(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking send transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterSetConfig(flexio_i2s_master_state_t *master, uint32_t baudRate, uint8_t bitsWidth)
Set the baud rate and bit width for any subsequent I2S communication.
status_t FLEXIO_I2S_DRV_MasterGetStatus(flexio_i2s_master_state_t *master, uint32_t *bytesRemaining)
Get the status of the current non-blocking I2S master transaction.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
flexio_driver_type_t driverType
static status_t FLEXIO_I2S_DRV_SlaveSetRxBuffer(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize)
Provide a buffer for receiving data.
status_t FLEXIO_I2S_DRV_MasterInit(uint32_t instance, const flexio_i2s_master_user_config_t *userConfigPtr, flexio_i2s_master_state_t *master)
Initialize the FLEXIO_I2S master mode driver.
static status_t FLEXIO_I2S_DRV_SlaveGetStatus(flexio_i2s_slave_state_t *slave, uint32_t *bytesRemaining)
Get the status of the current non-blocking I2S slave transaction.
flexio_driver_type_t
Driver type: interrupts/polling/DMA Implements : flexio_driver_type_t_Class.
Definition: flexio.h:42
status_t FLEXIO_I2S_DRV_MasterSetRxBuffer(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize)
Provide a buffer for receiving data.
Master configuration structure.
status_t FLEXIO_I2S_DRV_MasterGetBaudRate(flexio_i2s_master_state_t *master, uint32_t *baudRate)
Get the currently configured baud rate.
status_t FLEXIO_I2S_DRV_MasterTransferAbort(flexio_i2s_master_state_t *master)
Aborts a non-blocking I2S master transaction.
static status_t FLEXIO_I2S_DRV_SlaveReceiveData(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking receive transaction on the I2S bus.
static status_t FLEXIO_I2S_DRV_SlaveDeinit(flexio_i2s_slave_state_t *slave)
De-initialize the FLEXIO_I2S slave mode driver.
static status_t FLEXIO_I2S_DRV_SlaveReceiveDataBlocking(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking receive transaction on the I2S bus.
static status_t FLEXIO_I2S_DRV_SlaveSendDataBlocking(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking send transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_SlaveSetConfig(flexio_i2s_slave_state_t *slave, uint8_t bitsWidth)
Set the bit width for any subsequent I2S communication.