S32 SDK
pdb_hal.h
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1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
19 #ifndef PDB_HAL_H
20 #define PDB_HAL_H
21 
22 #include <stdint.h>
23 #include <stdbool.h>
24 #include <stddef.h>
25 #include "device_registers.h"
26 
57 /******************************************************************************
58  * Definitions
59  *****************************************************************************/
60 
70 typedef enum
71 {
81 
86 typedef enum
87 {
97 
105 typedef enum
106 {
124 
131 typedef enum
132 {
138 
145 typedef struct
146 {
153  bool dmaEnable;
154  bool intEnable;
156 
157 #if defined(__cplusplus)
158 extern "C" {
159 #endif
160 
161 /*******************************************************************************
162  * API
163  ******************************************************************************/
164 
173 void PDB_HAL_Init(PDB_Type * const base);
174 
183 void PDB_HAL_ConfigTimer(PDB_Type * const base, const pdb_timer_config_t *const configPtr);
184 
193 static inline void PDB_HAL_SetSoftTriggerCmd(PDB_Type * const base)
194 {
195  DEV_ASSERT(base != NULL);
197 }
198 
207 static inline void PDB_HAL_Enable(PDB_Type * const base)
208 {
209  DEV_ASSERT(base != NULL);
211 }
220 static inline void PDB_HAL_Disable(PDB_Type * const base)
221 {
222  DEV_ASSERT(base != NULL);
224 }
225 
235 static inline bool PDB_HAL_GetTimerIntFlag(PDB_Type const * const base)
236 {
237  DEV_ASSERT(base != NULL);
238  return (1U == ((base->SC & PDB_SC_PDBIF_MASK) >> PDB_SC_PDBIF_SHIFT));
239 }
240 
249 static inline void PDB_HAL_ClearTimerIntFlag(PDB_Type * const base)
250 {
251  DEV_ASSERT(base != NULL);
252  volatile uint32_t dummy_read;
254 
255  /* This read-after-write guarantees that the write to clear operation is completed,
256  * for the case when memory write buffering is enabled. */
257  dummy_read = REG_READ32(&(base->SC));
258  (void) dummy_read;
259 }
260 
279 static inline void PDB_HAL_SetLoadValuesCmd(PDB_Type * const base)
280 {
281  DEV_ASSERT(base != NULL);
282  REG_BIT_SET32(&(base->SC), PDB_SC_LDOK_MASK);
283 }
284 
297 static inline void PDB_HAL_SetTimerModulusValue(PDB_Type * const base, uint32_t value)
298 {
299  DEV_ASSERT(base != NULL);
300  REG_RMW32(&(base->MOD), PDB_MOD_MOD_MASK, PDB_MOD_MOD(value));
301 }
302 
312 static inline uint32_t PDB_HAL_GetTimerValue(PDB_Type const * const base)
313 {
314  DEV_ASSERT(base != NULL);
315  return ((base->CNT & PDB_CNT_CNT_MASK) >> PDB_CNT_CNT_SHIFT);
316 }
317 
329 static inline void PDB_HAL_SetValueForTimerInterrupt(PDB_Type * const base, uint32_t value)
330 {
331  DEV_ASSERT(base != NULL);
332  REG_RMW32(&(base->IDLY), PDB_IDLY_IDLY_MASK, PDB_IDLY_IDLY(value));
333 }
334 
345 void PDB_HAL_SetAdcPreTriggerBackToBackEnable(PDB_Type * const base, uint32_t chn, uint32_t preChnMask, bool enable);
346 
357 void PDB_HAL_SetAdcPreTriggerOutputEnable(PDB_Type * const base, uint32_t chn, uint32_t preChnMask, bool enable);
358 
369 void PDB_HAL_SetAdcPreTriggerEnable(PDB_Type * const base, uint32_t chn, uint32_t preChnMask, bool enable);
370 
383 static inline uint32_t PDB_HAL_GetAdcPreTriggerFlags(PDB_Type const * const base, uint32_t chn, uint32_t preChnMask)
384 {
385  DEV_ASSERT(base != NULL);
387  return (preChnMask & ((base->CH[chn].S & PDB_S_CF_MASK) >> PDB_S_CF_SHIFT));
388 }
389 
400 void PDB_HAL_ClearAdcPreTriggerFlags(PDB_Type * const base, uint32_t chn, uint32_t preChnMask);
401 
413 static inline uint32_t PDB_HAL_GetAdcPreTriggerSeqErrFlags(PDB_Type const * const base, uint32_t chn, uint32_t preChnMask)
414 {
415  DEV_ASSERT(base != NULL);
417  return (preChnMask & ((base->CH[chn].S & PDB_S_ERR_MASK) >> PDB_S_ERR_SHIFT));
418 }
419 
429 void PDB_HAL_ClearAdcPreTriggerSeqErrFlags(PDB_Type * const base, uint32_t chn, uint32_t preChnMask);
430 
441 void PDB_HAL_SetAdcPreTriggerDelayValue(PDB_Type * const base, uint32_t chn, uint32_t preChn, uint32_t value);
442 
452 void PDB_HAL_SetCmpPulseOutEnable(PDB_Type * const base, uint32_t pulseChnMask, bool enable);
453 
464 static inline void PDB_HAL_SetCmpPulseOutDelayForHigh(PDB_Type * const base, uint32_t pulseChn, uint32_t value)
465 {
466  DEV_ASSERT(base != NULL);
468  base->POnDLY[pulseChn].ACCESS16BIT.DLY1 = (uint16_t)PDB_POnDLY_ACCESS16BIT_DLY1_DLY1(value);
469 }
470 
481 static inline void PDB_HAL_SetCmpPulseOutDelayForLow(PDB_Type * const base, uint32_t pulseChn, uint32_t value)
482 {
483  DEV_ASSERT(base != NULL);
485  base->POnDLY[pulseChn].ACCESS16BIT.DLY2 = (uint16_t)PDB_POnDLY_ACCESS16BIT_DLY2_DLY2(value);
486 }
487 
488 #if defined(__cplusplus)
489 }
490 #endif
491 
496 #endif /* PDB_HAL_H */
497 
498 /******************************************************************************
499  * EOF
500  *****************************************************************************/
#define PDB_S_CF_MASK
Definition: S32K144.h:8374
#define REG_BIT_SET32(address, mask)
32 bits bits setting macro.
Definition: S32K144.h:231
#define PDB_S_CF_SHIFT
Definition: S32K144.h:8375
void PDB_HAL_ClearAdcPreTriggerFlags(PDB_Type *const base, uint32_t chn, uint32_t preChnMask)
Clears the flag which indicates that the PDB counter has reached the pre-trigger delay value...
Definition: pdb_hal.c:196
__I uint32_t CNT
Definition: S32K144.h:8241
__IO uint32_t MOD
Definition: S32K144.h:8240
#define REG_READ32(address)
32 bits memory read macro.
Definition: S32K144.h:217
static void PDB_HAL_Disable(PDB_Type *const base)
Switches to disable the PDB module.
Definition: pdb_hal.h:220
bool seqErrIntEnable
Definition: pdb_hal.h:148
void PDB_HAL_ClearAdcPreTriggerSeqErrFlags(PDB_Type *const base, uint32_t chn, uint32_t preChnMask)
Clears the flag which indicates that a sequence error has been detected.
Definition: pdb_hal.c:215
#define PDB_CNT_CNT_SHIFT
Definition: S32K144.h:8348
union PDB_Type::@17 POnDLY[PDB_POnDLY_COUNT]
#define REG_RMW32(address, mask, value)
32 bit clear bits and set with new value
Definition: S32K144.h:246
#define PDB_SC_SWTRIG_MASK
Definition: S32K144.h:8329
#define PDB_IDLY_IDLY(x)
Definition: S32K144.h:8355
#define PDB_SC_PDBIF_MASK
Definition: S32K144.h:8309
Defines the type of structure for basic timer in PDB.
Definition: pdb_hal.h:145
static uint32_t PDB_HAL_GetTimerValue(PDB_Type const *const base)
Gets the PDB counter value of PDB timer.
Definition: pdb_hal.h:312
static uint32_t PDB_HAL_GetAdcPreTriggerSeqErrFlags(PDB_Type const *const base, uint32_t chn, uint32_t preChnMask)
Gets the flag which indicates whether a sequence error is detected.
Definition: pdb_hal.h:413
#define PDB_CNT_CNT_MASK
Definition: S32K144.h:8347
#define DEV_ASSERT(x)
Definition: devassert.h:78
#define FEATURE_PDB_ADC_CHANNEL_COUNT
#define PDB_MOD_MOD_MASK
Definition: S32K144.h:8342
#define PDB_IDLY_IDLY_MASK
Definition: S32K144.h:8352
struct PDB_Type::@16 CH[PDB_CH_COUNT]
void PDB_HAL_Init(PDB_Type *const base)
Resets the PDB registers to a known state.
Definition: pdb_hal.c:39
#define PDB_POnDLY_ACCESS16BIT_DLY1_DLY1(x)
Definition: S32K144.h:8406
struct PDB_Type::@17::@18 ACCESS16BIT
pdb_load_value_mode_t
Defines the type of value load mode for the PDB module.
Definition: pdb_hal.h:70
pdb_clk_prescaler_div_t
Defines the type of prescaler divider for the PDB counter clock. Implements : pdb_clk_prescaler_div_t...
Definition: pdb_hal.h:86
static void PDB_HAL_SetTimerModulusValue(PDB_Type *const base, uint32_t value)
Sets the modulus value for the PDB module.
Definition: pdb_hal.h:297
pdb_trigger_src_t
Defines the type of trigger source mode for the PDB.
Definition: pdb_hal.h:105
static void PDB_HAL_ClearTimerIntFlag(PDB_Type *const base)
Clears the PDB delay interrupt flag.
Definition: pdb_hal.h:249
pdb_clk_prescaler_mult_factor_t clkPreMultFactor
Definition: pdb_hal.h:150
pdb_load_value_mode_t loadValueMode
Definition: pdb_hal.h:147
#define REG_BIT_CLEAR32(address, mask)
32 bits bits clearing macro.
Definition: S32K144.h:238
#define FEATURE_PDB_PODLY_COUNT
#define PDB_POnDLY_ACCESS16BIT_DLY2_DLY2(x)
Definition: S32K144.h:8401
void PDB_HAL_SetAdcPreTriggerDelayValue(PDB_Type *const base, uint32_t chn, uint32_t preChn, uint32_t value)
Sets the pre-trigger delay value.
Definition: pdb_hal.c:240
void PDB_HAL_SetAdcPreTriggerOutputEnable(PDB_Type *const base, uint32_t chn, uint32_t preChnMask, bool enable)
Switches to enable the pre-trigger output.
Definition: pdb_hal.c:147
#define PDB_SC_PDBIF_SHIFT
Definition: S32K144.h:8310
void PDB_HAL_ConfigTimer(PDB_Type *const base, const pdb_timer_config_t *const configPtr)
Configure the PDB timer.
Definition: pdb_hal.c:76
pdb_clk_prescaler_div_t clkPreDiv
Definition: pdb_hal.h:149
pdb_clk_prescaler_mult_factor_t
Defines the type of the multiplication source mode for PDB.
Definition: pdb_hal.h:131
static void PDB_HAL_SetCmpPulseOutDelayForLow(PDB_Type *const base, uint32_t pulseChn, uint32_t value)
Sets the counter delay value for the pulse-out goes low.
Definition: pdb_hal.h:481
void PDB_HAL_SetCmpPulseOutEnable(PDB_Type *const base, uint32_t pulseChnMask, bool enable)
Switches to enable the pulse-out trigger.
Definition: pdb_hal.c:255
pdb_trigger_src_t triggerInput
Definition: pdb_hal.h:151
static void PDB_HAL_SetLoadValuesCmd(PDB_Type *const base)
Loads the delay registers value for the PDB module.
Definition: pdb_hal.h:279
static uint32_t PDB_HAL_GetAdcPreTriggerFlags(PDB_Type const *const base, uint32_t chn, uint32_t preChnMask)
Gets the flag which indicates whether the PDB counter has reached the pre-trigger delay value...
Definition: pdb_hal.h:383
#define PDB_MOD_MOD(x)
Definition: S32K144.h:8345
__IO uint32_t SC
Definition: S32K144.h:8239
static void PDB_HAL_SetCmpPulseOutDelayForHigh(PDB_Type *const base, uint32_t pulseChn, uint32_t value)
Sets the counter delay value for the pulse-out goes high.
Definition: pdb_hal.h:464
void PDB_HAL_SetAdcPreTriggerBackToBackEnable(PDB_Type *const base, uint32_t chn, uint32_t preChnMask, bool enable)
Switches to enable the pre-trigger back-to-back mode.
Definition: pdb_hal.c:123
static bool PDB_HAL_GetTimerIntFlag(PDB_Type const *const base)
Gets the PDB delay interrupt flag.
Definition: pdb_hal.h:235
#define PDB_S_ERR_MASK
Definition: S32K144.h:8370
void PDB_HAL_SetAdcPreTriggerEnable(PDB_Type *const base, uint32_t chn, uint32_t preChnMask, bool enable)
Switches to enable the pre-trigger.
Definition: pdb_hal.c:171
#define PDB_SC_LDOK_MASK
Definition: S32K144.h:8293
#define PDB_SC_PDBEN_MASK
Definition: S32K144.h:8313
__IO uint32_t S
Definition: S32K144.h:8245
#define PDB_S_ERR_SHIFT
Definition: S32K144.h:8371
static void PDB_HAL_Enable(PDB_Type *const base)
Switches on to enable the PDB module.
Definition: pdb_hal.h:207
static void PDB_HAL_SetSoftTriggerCmd(PDB_Type *const base)
Triggers the PDB by software if enabled.
Definition: pdb_hal.h:193
__IO uint32_t IDLY
Definition: S32K144.h:8242
bool continuousModeEnable
Definition: pdb_hal.h:152
static void PDB_HAL_SetValueForTimerInterrupt(PDB_Type *const base, uint32_t value)
Sets the interrupt delay milestone of the PDB counter.
Definition: pdb_hal.h:329