59 #if FEATURE_PORT_HAS_PULL_SELECTION
71 #if FEATURE_PORT_HAS_SLEW_RATE
77 PORT_FAST_SLEW_RATE = 0U,
78 PORT_SLOW_SLEW_RATE = 1U
82 #if FEATURE_PORT_HAS_DRIVE_STRENGTH
108 #if FEATURE_PORT_HAS_DIGITAL_FILTER
125 #if FEATURE_PORT_HAS_DMA_REQUEST
141 #if defined(__cplusplus)
150 #if FEATURE_PORT_HAS_PULL_SELECTION
178 uint32_t regValue = base->
PCR[pin];
181 base->
PCR[pin] = regValue;
186 uint32_t regValue = base->
PCR[pin];
189 base->
PCR[pin] = regValue;
200 #if FEATURE_PORT_HAS_SLEW_RATE
210 static inline void PORT_HAL_SetSlewRateMode(
PORT_Type*
const base,
212 const port_slew_rate_t rateSelect)
216 uint32_t rateSelectValue = (uint32_t)rateSelect;
217 uint32_t regValue = base->
PCR[pin];
218 regValue &= ~(PORT_PCR_SRE_MASK);
219 regValue |= PORT_PCR_SRE(rateSelectValue);
220 base->
PCR[pin] = regValue;
224 #if FEATURE_PORT_HAS_PASSIVE_FILTER
241 const bool isPassiveFilterEnabled)
244 uint32_t regValue = base->
PCR[pin];
247 base->
PCR[pin] = regValue;
251 #if FEATURE_PORT_HAS_OPEN_DRAIN
261 static inline void PORT_HAL_SetOpenDrainMode(
PORT_Type*
const base,
263 const bool isOpenDrainEnabled)
266 uint32_t regValue = base->
PCR[pin];
267 regValue &= ~(PORT_PCR_ODE_MASK);
268 regValue |= PORT_PCR_ODE(isOpenDrainEnabled);
269 base->
PCR[pin] = regValue;
273 #if FEATURE_PORT_HAS_DRIVE_STRENGTH
290 uint32_t driveSelectValue = (uint32_t)driveSelect;
291 uint32_t regValue = base->
PCR[pin];
294 base->
PCR[pin] = regValue;
314 uint32_t regValue = base->
PCR[pin];
317 base->
PCR[pin] = regValue;
320 #if FEATURE_PORT_HAS_PIN_CONTROL_LOCK
333 const bool isPinLockEnabled)
336 uint32_t regValue = base->
PCR[pin];
339 base->
PCR[pin] = regValue;
343 #if FEATURE_PORT_HAS_DIGITAL_FILTER
357 const bool isDigitalFilterEnabled)
361 uint32_t digitalFilterValue = (isDigitalFilterEnabled ==
true) ? 1UL : 0UL;
362 uint32_t regValue = base->
DFER;
363 regValue &= ~(1U << pin);
364 regValue |= (digitalFilterValue << pin);
365 base->
DFER = regValue;
382 base->
DFCR = (uint32_t)clockSource;
455 uint32_t regValue = base->
PCR[pin];
458 base->
PCR[pin] = regValue;
481 uint32_t regValue = base->
PCR[pin];
505 uint32_t regValue = base->
PCR[pin];
507 return (
bool)regValue;
520 uint32_t regValue = base->
PCR[pin];
523 base->
PCR[pin] = regValue;
537 uint32_t regValue = base->
ISFR;
554 #if defined(__cplusplus)
rtc_interrupt_config_t * intConfig
static void PORT_HAL_SetDigitalFilterClock(PORT_Type *const base, const port_digital_filter_clock_source_t clockSource)
Configures the clock source for the digital input filters. Changing the filter clock source should on...
static port_interrupt_config_t PORT_HAL_GetPinIntSel(const PORT_Type *const base, const uint32_t pin)
Gets the current port pin interrupt/DMA request configuration.
#define PORT_PCR_PFE_MASK
static void PORT_HAL_SetPassiveFilterMode(PORT_Type *const base, const uint32_t pin, const bool isPassiveFilterEnabled)
Configures the passive filter if the pin is used as a digital input.
static void PORT_HAL_SetDriveStrengthMode(PORT_Type *const base, const uint32_t pin, const port_drive_strength_t driveSelect)
Configures the drive strength if the pin is used as a digital output.
static bool PORT_HAL_GetPinIntMode(const PORT_Type *const base, const uint32_t pin)
Reads the individual pin-interrupt status flag.
static void PORT_HAL_SetDigitalFilterWidth(PORT_Type *const base, const uint8_t width)
Configures the maximum size of the glitches (in clock cycles) that the digital filter absorbs for ena...
#define PORT_PCR_IRQC_MASK
void PORT_HAL_SetHighGlobalPinCtrlCmd(PORT_Type *const base, const uint16_t highPinSelect, const uint16_t config)
Configures the high half of pin control register for the same settings. This function operates pin 16...
static void PORT_HAL_ClearPortIntFlagCmd(PORT_Type *const base)
Clears the entire port interrupt status flag.
#define PORT_PCR_DSE_MASK
static void PORT_HAL_ClearPinIntFlagCmd(PORT_Type *const base, const uint32_t pin)
Clears the individual pin-interrupt status flag.
port_pull_config_t
Internal resistor pull feature selection Implements : port_pull_config_t_Class.
port_interrupt_config_t
Configures the interrupt generation condition. Implements : port_interrupt_config_t_Class.
#define PORT_PCR_IRQC_SHIFT
static void PORT_HAL_SetPinCtrlLockMode(PORT_Type *const base, const uint32_t pin, const bool isPinLockEnabled)
Locks or unlocks the pin control register bits[15:0].
port_drive_strength_t
Configures the drive strength. Implements : port_drive_strength_t_Class.
#define PORT_PCR_ISF_MASK
static void PORT_HAL_SetMuxModeSel(PORT_Type *const base, const uint32_t pin, const port_mux_t mux)
Configures the pin muxing.
void PORT_HAL_SetLowGlobalPinCtrlCmd(PORT_Type *const base, const uint16_t lowPinSelect, const uint16_t config)
Configures the low half of the pin control register for the same settings. This function operates pin...
#define PORT_PCR_MUX_MASK
port_digital_filter_clock_source_t
Digital filter clock source selection Implements : port_digital_filter_clock_source_t_Class.
__IO uint32_t PCR[PORT_PCR_COUNT]
#define PORT_PCR_ISF_SHIFT
static void PORT_HAL_SetPinIntSel(PORT_Type *const base, const uint32_t pin, const port_interrupt_config_t intConfig)
Configures the port pin interrupt/DMA request.
port_mux_t
Pin mux selection Implements : port_mux_t_Class.
static void PORT_HAL_SetPullSel(PORT_Type *const base, const uint32_t pin, const port_pull_config_t pullConfig)
Configures the internal resistor.
static uint32_t PORT_HAL_GetPortIntFlag(const PORT_Type *const base)
Reads the entire port interrupt status flag.
static void PORT_HAL_SetDigitalFilterMode(PORT_Type *const base, const uint32_t pin, const bool isDigitalFilterEnabled)
Enables or disables the digital filter in one single port. Each bit of the 32-bit register represents...