#include <S32K144.h>
DMA - Register Layout Typedef
Definition at line 2246 of file S32K144.h.
TCD Transfer Attributes, array offset: 0x1006, array step: 0x20
Definition at line 2275 of file S32K144.h.
Clear DONE Status Bit Register, offset: 0x1C
Definition at line 2257 of file S32K144.h.
Clear Enable Error Interrupt Register, offset: 0x18
Definition at line 2253 of file S32K144.h.
Clear Enable Request Register, offset: 0x1A
Definition at line 2255 of file S32K144.h.
Clear Error Register, offset: 0x1E
Definition at line 2259 of file S32K144.h.
Clear Interrupt Request Register, offset: 0x1F
Definition at line 2260 of file S32K144.h.
Control Register, offset: 0x0
Definition at line 2247 of file S32K144.h.
TCD Control and Status, array offset: 0x101C, array step: 0x20
Definition at line 2289 of file S32K144.h.
TCD Destination Address, array offset: 0x1010, array step: 0x20
Definition at line 2282 of file S32K144.h.
Channel n Priority Register, array offset: 0x100, array step: 0x1
Definition at line 2270 of file S32K144.h.
TCD Last Destination Address Adjustment/Scatter Gather Address, array offset: 0x1018, array step: 0x20
Definition at line 2288 of file S32K144.h.
TCD Signed Destination Address Offset, array offset: 0x1014, array step: 0x20
Definition at line 2283 of file S32K144.h.
Enable Asynchronous Request in Stop Register, offset: 0x44
Definition at line 2268 of file S32K144.h.
Enable Error Interrupt Register, offset: 0x14
Definition at line 2252 of file S32K144.h.
TCD Current Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x1016, array step: 0x20
TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Disabled), array offset: 0x101E, array step: 0x20
Definition at line 2285 of file S32K144.h.
TCD Current Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x1016, array step: 0x20
TCD Beginning Minor Loop Link, Major Loop Count (Channel Linking Enabled), array offset: 0x101E, array step: 0x20
Definition at line 2286 of file S32K144.h.
Enable Request Register, offset: 0xC
Definition at line 2250 of file S32K144.h.
Error Register, offset: 0x2C
Definition at line 2264 of file S32K144.h.
Error Status Register, offset: 0x4
Definition at line 2248 of file S32K144.h.
Hardware Request Status Register, offset: 0x34
Definition at line 2266 of file S32K144.h.
Interrupt Request Register, offset: 0x24
Definition at line 2262 of file S32K144.h.
TCD Minor Byte Count (Minor Loop Mapping Disabled), array offset: 0x1008, array step: 0x20
Definition at line 2277 of file S32K144.h.
TCD Signed Minor Loop Offset (Minor Loop Mapping Enabled and Offset Disabled), array offset: 0x1008, array step: 0x20
Definition at line 2278 of file S32K144.h.
TCD Signed Minor Loop Offset (Minor Loop Mapping and Offset Enabled), array offset: 0x1008, array step: 0x20
Definition at line 2279 of file S32K144.h.
TCD Source Address, array offset: 0x1000, array step: 0x20
Definition at line 2273 of file S32K144.h.
Set Enable Error Interrupt Register, offset: 0x19
Definition at line 2254 of file S32K144.h.
Set Enable Request Register, offset: 0x1B
Definition at line 2256 of file S32K144.h.
TCD Last Source Address Adjustment, array offset: 0x100C, array step: 0x20
Definition at line 2281 of file S32K144.h.
TCD Signed Source Address Offset, array offset: 0x1004, array step: 0x20
Definition at line 2274 of file S32K144.h.
Set START Bit Register, offset: 0x1D
Definition at line 2258 of file S32K144.h.
The documentation for this struct was generated from the following file:
- D:/Bamboo/home/xml-data/build-dir/AS-NIG1-DOCS/layout_S32K144_170331/platform/devices/S32K144/include/S32K144.h