S32 SDK
edma_driver.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2013 - 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
44 #if !defined(EDMA_DRIVER_H)
45 #define EDMA_DRIVER_H
46 
47 #include "device_registers.h"
48 #include "edma_hal.h"
49 #include "dmamux_hal.h"
50 #include "clock_manager.h"
51 #include "status.h"
52 #include <stddef.h>
53 
60 extern DMA_Type * const g_edmaBase[DMA_INSTANCE_COUNT];
61 
64 
67 
71 
72 
73 #if defined FEATURE_EDMA_HAS_ERROR_IRQ
74 
76 #endif
77 
78 /*******************************************************************************
79  * Definitions
80  ******************************************************************************/
89 #define STCD_SIZE(number) (((number) * 32U) - 1U)
90 #define STCD_ADDR(address) (((uint32_t)address + 31UL) & ~0x1FUL)
91 
98 #define EDMA_ERR_LSB_MASK 1U
99 
107 typedef struct {
109 #if FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U
110  edma_arbitration_algorithm_t groupArbitration;
111  edma_group_priority_t groupPriority;
113 #endif
117 
125 typedef enum {
130 
137 typedef void (*edma_callback_t)(void *parameter, edma_chn_status_t status);
138 
142 typedef struct {
143  uint8_t channel;
147  void *parameter;
150 
158 typedef struct {
161  uint8_t channel;
164  void * callbackParam;
166 
170 typedef enum {
175 
179 typedef struct {
180  uint32_t address;
181  uint32_t length;
184 
194 typedef struct {
196 } edma_state_t;
197 
204 typedef struct {
210  int32_t minorLoopOffset;
219 
226 typedef struct {
227  uint32_t srcAddr;
228  uint32_t destAddr;
231  int16_t srcOffset;
234  int16_t destOffset;
256 
260 typedef struct {
261  uint32_t SADDR;
262  int16_t SOFF;
263  uint16_t ATTR;
264  uint32_t NBYTES;
265  int32_t SLAST;
266  uint32_t DADDR;
267  int16_t DOFF;
268  uint16_t CITER;
269  int32_t DLAST_SGA;
270  uint16_t CSR;
271  uint16_t BITER;
273 /*******************************************************************************
274  * API
275  ******************************************************************************/
276 
277 #if defined(__cplusplus)
278 extern "C" {
279 #endif
280 
310 status_t EDMA_DRV_Init(edma_state_t *edmaState, const edma_user_config_t *userConfig,
311  edma_chn_state_t * const chnStateArray[],
312  const edma_channel_config_t * const chnConfigArray[],
313  uint8_t chnCount);
314 
323 
324 /* @} */
325 
347 status_t EDMA_DRV_ChannelInit(edma_chn_state_t *edmaChannelState, const edma_channel_config_t *edmaChannelConfig);
348 
359 status_t EDMA_DRV_ReleaseChannel(uint8_t channel);
360 
361 /* @} */
362 
374 void EDMA_DRV_PushConfigToReg(uint8_t channel, const edma_transfer_config_t *tcd);
375 
387 
417  uint32_t srcAddr, uint32_t destAddr,
418  edma_transfer_size_t transferSize, uint32_t dataBufferSize);
419 
434 status_t EDMA_DRV_ConfigLoopTransfer(uint8_t channel, const edma_transfer_config_t * transferConfig);
435 
467  edma_transfer_size_t transferSize, uint32_t bytesOnEachRequest,
468  const edma_scatter_gather_list_t *srcList,
469  const edma_scatter_gather_list_t *destList, uint8_t tcdCount);
470 
471 /* @} */
472 
486 status_t EDMA_DRV_StartChannel(uint8_t channel);
487 
497 status_t EDMA_DRV_StopChannel(uint8_t channel);
498 
499 /* @} */
500 
523 status_t EDMA_DRV_InstallCallback(uint8_t channel, edma_callback_t callback, void *parameter);
524 
525 /* @} */
526 
539 
540 /* @} */
541 
542 
543 /* @} */
544 
545 #if defined(__cplusplus)
546 }
547 #endif
548 
551 #endif /* EDMA_DRIVER_H */
552 /*******************************************************************************
553  * EOF
554  ******************************************************************************/
555 
void EDMA_DRV_PushConfigToSTCD(const edma_transfer_config_t *config, edma_software_tcd_t *stcd)
Copies the channel configuration to the software TCD structure.
Definition: edma_driver.c:815
eDMA TCD Implements : edma_software_tcd_t_Class
Definition: edma_driver.h:260
uint32_t minorByteTransferCount
Definition: edma_driver.h:242
#define DMAMUX_INSTANCE_COUNT
Definition: S32K144.h:3115
#define DMA_INSTANCE_COUNT
Definition: S32K144.h:2298
DMAMUX_Type *const g_dmamuxBase[DMAMUX_INSTANCE_COUNT]
Array for DMAMUX module register base address.
Definition: edma_common.c:50
edma_modulo_t destModulo
Definition: edma_driver.h:241
edma_callback_t callback
Definition: edma_driver.h:163
The user configuration structure for the eDMA driver.
Definition: edma_driver.h:107
edma_transfer_type_t
A type for the DMA transfer. Implements : edma_transfer_type_t_Class.
Definition: edma_driver.h:170
The user configuration structure for the an eDMA driver channel.
Definition: edma_driver.h:158
#define FEATURE_EDMA_MODULE_CHANNELS
status_t EDMA_DRV_ReleaseChannel(uint8_t channel)
Releases an eDMA channel.
Definition: edma_driver.c:359
status_t EDMA_DRV_StopChannel(uint8_t channel)
Stops the eDMA channel.
Definition: edma_driver.c:790
IRQn_Type
Defines the Interrupt Numbers definitions.
Definition: S32K144.h:269
status_t EDMA_DRV_Deinit(void)
De-initializes the eDMA module.
Definition: edma_driver.c:199
status_t EDMA_DRV_Init(edma_state_t *edmaState, const edma_user_config_t *userConfig, edma_chn_state_t *const chnStateArray[], const edma_channel_config_t *const chnConfigArray[], uint8_t chnCount)
Initializes the eDMA module.
Definition: edma_driver.c:91
edma_channel_priority_t priority
Definition: edma_driver.h:159
const clock_names_t g_edmaClockNames[DMA_INSTANCE_COUNT]
Array for eDMA clock sources.
Definition: edma_common.c:61
dma_request_source_t
Structure for the DMA hardware request.
const IRQn_Type g_edmaIrqId[FEATURE_CHANNEL_INTERRUPT_LINES]
Array for eDMA channel interrupt vector number.
Definition: edma_common.c:53
uint32_t scatterGatherNextDescAddr
Definition: edma_driver.h:245
status_t EDMA_DRV_ConfigLoopTransfer(uint8_t channel, const edma_transfer_config_t *transferConfig)
Configures the DMA transfer in loop mode.
Definition: edma_driver.c:577
status_t EDMA_DRV_ChannelInit(edma_chn_state_t *edmaChannelState, const edma_channel_config_t *edmaChannelConfig)
Initializes an eDMA channel.
Definition: edma_driver.c:246
Runtime state structure for the eDMA driver.
Definition: edma_driver.h:194
edma_chn_status_t
Channel status for eDMA channel.
Definition: edma_driver.h:125
edma_transfer_size_t destTransferSize
Definition: edma_driver.h:230
edma_callback_t callback
Definition: edma_driver.h:144
edma_arbitration_algorithm_t
eDMA channel arbitration algorithm used for selection among channels. Implements : edma_arbitration_a...
Definition: edma_hal.h:54
void EDMA_DRV_PushConfigToReg(uint8_t channel, const edma_transfer_config_t *tcd)
Copies the channel configuration to the TCD registers.
Definition: edma_driver.c:853
edma_arbitration_algorithm_t chnArbitration
Definition: edma_driver.h:108
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:31
edma_modulo_t srcModulo
Definition: edma_driver.h:240
status_t EDMA_DRV_ConfigScatterGatherTransfer(uint8_t channel, edma_software_tcd_t *stcd, edma_transfer_size_t transferSize, uint32_t bytesOnEachRequest, const edma_scatter_gather_list_t *srcList, const edma_scatter_gather_list_t *destList, uint8_t tcdCount)
Configures the DMA transfer in a scatter-gather mode.
Definition: edma_driver.c:614
edma_transfer_size_t srcTransferSize
Definition: edma_driver.h:229
Data structure for configuring a discrete memory transfer. Implements : edma_scatter_gather_list_t_Cl...
Definition: edma_driver.h:179
#define FEATURE_CHANNEL_INTERRUPT_LINES
volatile edma_chn_status_t status
Definition: edma_driver.h:148
edma_transfer_size_t
eDMA transfer configuration Implements : edma_transfer_size_t_Class
Definition: edma_hal.h:132
edma_chn_status_t EDMA_DRV_GetChannelStatus(uint8_t channel)
Gets the eDMA channel status.
Definition: edma_driver.c:953
edma_transfer_type_t type
Definition: edma_driver.h:182
status_t EDMA_DRV_StartChannel(uint8_t channel)
Starts an eDMA channel.
Definition: edma_driver.c:765
const IRQn_Type g_edmaErrIrqId[FEATURE_ERROR_INTERRUPT_LINES]
Array for eDMA module's error interrupt vector number.
Definition: edma_common.c:57
clock_names_t
Clock names.
edma_modulo_t
eDMA modulo configuration Implements : edma_modulo_t_Class
Definition: edma_hal.h:94
#define FEATURE_ERROR_INTERRUPT_LINES
DMA_Type *const g_edmaBase[DMA_INSTANCE_COUNT]
Array for the eDMA module register base address.
Definition: edma_common.c:47
edma_channel_priority_t
eDMA channel priority setting Implements : edma_channel_priority_t_Class
Definition: edma_hal.h:62
void(* edma_callback_t)(void *parameter, edma_chn_status_t status)
Definition for the eDMA channel callback function.
Definition: edma_driver.h:137
dma_request_source_t source
Definition: edma_driver.h:162
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t channel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
Definition: edma_driver.c:487
eDMA loop transfer configuration.
Definition: edma_driver.h:204
eDMA transfer size configuration.
Definition: edma_driver.h:226
edma_loop_transfer_config_t * loopTransferConfig
Definition: edma_driver.h:251
status_t EDMA_DRV_InstallCallback(uint8_t channel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
Definition: edma_driver.c:285
const clock_names_t g_dmamuxClockNames[DMAMUX_INSTANCE_COUNT]
Definition: edma_common.c:62
Data structure for the eDMA channel state. Implements : edma_chn_state_t_Class.
Definition: edma_driver.h:142