82 #if FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U
87 EDMA_GRP0_PRIO_LOW_GRP1_PRIO_HIGH = 0U,
88 EDMA_GRP0_PRIO_HIGH_GRP1_PRIO_LOW = 1U
89 } edma_group_priority_t;
153 #if defined(__cplusplus)
209 regValTemp = base->
CR;
212 base->
CR = regValTemp;
228 regValTemp = base->
CR;
230 regValTemp |=
DMA_CR_HOE(haltOnError ? 1UL : 0UL);
231 base->
CR = regValTemp;
249 regValTemp = base->
CR;
252 base->
CR = regValTemp;
452 #ifdef DEV_ERROR_DETECT
458 regValTemp = base->
DCHPRI[index];
463 base->
DCHPRI[index] = regValTemp;
477 #ifdef DEV_ERROR_DETECT
483 regValTemp = base->
DCHPRI[index];
486 base->
DCHPRI[index] = regValTemp;
499 regValTemp = base->
CR;
502 base->
CR = regValTemp;
517 #if FEATURE_EDMA_CHANNEL_GROUP_COUNT > 0x1U
524 void EDMA_HAL_SetGroupPriority(
DMA_Type * base, edma_group_priority_t priority);
533 static inline edma_group_priority_t EDMA_HAL_GetGroupPriority(
DMA_Type * base)
535 return (edma_group_priority_t)(((base->
CR & DMA_CR_GRP0PRI_MASK) > 0) ? \
536 EDMA_GRP0_PRIO_HIGH_GRP1_PRIO_LOW : EDMA_GRP0_PRIO_LOW_GRP1_PRIO_HIGH);
549 regValTemp = base->
CR;
550 regValTemp &= ~(DMA_CR_ERGA_MASK);
551 regValTemp |= DMA_CR_ERGA(groupArbitration);
552 base->
CR = regValTemp;
587 regValTemp = base->
CR;
590 base->
CR = regValTemp;
608 regValTemp = base->
CR;
610 regValTemp |=
DMA_CR_CLM(continuous ? 1UL : 0UL);
611 base->
CR = regValTemp;
647 #ifdef DEV_ERROR_DETECT
650 base->
CERR = (uint8_t)channel;
674 #ifdef DEV_ERROR_DETECT
677 return (((base->
HRS >> channel) & 1U) != 0U);
690 #ifdef DEV_ERROR_DETECT
693 base->
CDNE = (uint8_t)channel;
705 #ifdef DEV_ERROR_DETECT
708 base->
SSRT = (uint8_t)channel;
722 #ifdef DEV_ERROR_DETECT
726 return (((base->
INT >> channel) & 1U) != 0U);
739 #ifdef DEV_ERROR_DETECT
742 base->
CINT = (uint8_t)channel;
745 #ifdef FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT
746 #if (FEATURE_EDMA_ASYNCHRO_REQUEST_CHANNEL_COUNT > 0x0U)
757 #ifdef DEV_ERROR_DETECT
761 uint32_t channelMask;
762 regValTemp = base->
EARS;
763 channelMask = (uint32_t)(1U << channel);
764 regValTemp &= ~(channelMask);
765 regValTemp |= (((uint32_t)((enable ? 1U : 0U) << channel)) & channelMask);
766 base->
EARS = regValTemp;
796 #ifdef DEV_ERROR_DETECT
815 #ifdef DEV_ERROR_DETECT
818 base->
TCD[channel].
SOFF = (uint16_t)offset;
883 #ifdef DEV_ERROR_DETECT
890 regValTemp = base->
TCD[channel].
NBYTES.MLOFFYES;
893 base->
TCD[channel].
NBYTES.MLOFFYES = regValTemp;
912 #ifdef DEV_ERROR_DETECT
919 regValTemp = base->
TCD[channel].
NBYTES.MLOFFYES;
922 base->
TCD[channel].
NBYTES.MLOFFYES = regValTemp;
954 #ifdef DEV_ERROR_DETECT
957 base->
TCD[channel].
SLAST = (uint32_t)size;
970 #ifdef DEV_ERROR_DETECT
989 #ifdef DEV_ERROR_DETECT
992 base->
TCD[channel].
DOFF = (uint16_t)offset;
1009 #ifdef DEV_ERROR_DETECT
1046 #ifdef DEV_ERROR_DETECT
1049 uint16_t regValTemp;
1050 regValTemp = base->
TCD[channel].
CSR;
1053 base->
TCD[channel].
CSR = regValTemp;
1071 #ifdef DEV_ERROR_DETECT
1074 uint16_t regValTemp;
1075 regValTemp = base->
TCD[channel].
CSR;
1078 base->
TCD[channel].
CSR = regValTemp;
1080 regValTemp = base->
TCD[channel].
CSR;
1083 base->
TCD[channel].
CSR = regValTemp;
1096 #ifdef DEV_ERROR_DETECT
1099 uint16_t regValTemp;
1100 regValTemp = base->
TCD[channel].
CSR;
1103 base->
TCD[channel].
CSR = regValTemp;
1119 #ifdef DEV_ERROR_DETECT
1122 uint16_t regValTemp;
1123 regValTemp = base->
TCD[channel].
CSR;
1126 base->
TCD[channel].
CSR = regValTemp;
1145 #ifdef DEV_ERROR_DETECT
1148 uint16_t regValTemp;
1149 regValTemp = base->
TCD[channel].
CSR;
1152 base->
TCD[channel].
CSR = regValTemp;
1168 #ifdef DEV_ERROR_DETECT
1171 uint16_t regValTemp;
1172 regValTemp = base->
TCD[channel].
CSR;
1175 base->
TCD[channel].
CSR = regValTemp;
1189 #ifdef DEV_ERROR_DETECT
1192 uint32_t regValTemp;
1193 regValTemp = base->
TCD[channel].
CSR;
1196 base->
TCD[channel].
CSR = (uint16_t) regValTemp;
1209 #ifdef DEV_ERROR_DETECT
1287 #ifdef DEV_ERROR_DETECT
1295 #if defined(__cplusplus)
static void EDMA_HAL_TCDSetSrcAddr(DMA_Type *base, uint32_t channel, uint32_t address)
Configures the source address for the hardware TCD.
#define DMA_TCD_CSR_BWC(x)
static void EDMA_HAL_TCDSetChannelMajorLink(DMA_Type *base, uint32_t channel, uint32_t majorLinkChannel, bool enable)
Configures the major channel link the TCD.
void EDMA_HAL_TCDSetScatterGatherLink(DMA_Type *base, uint32_t channel, uint32_t nextTCDAddr)
Configures the memory address for the next transfer TCD for the TCD.
#define DMA_TCD_NBYTES_MLOFFYES_DMLOE_MASK
#define DMA_CR_EMLM_SHIFT
static void EDMA_HAL_SetContinuousLinkCmd(DMA_Type *base, bool continuous)
Enables or disables the continuous transfer mode.
#define DMA_DCHPRI_CHPRI_MASK
#define DMA_TCD_CSR_INTHALF_MASK
#define DMA_TCD_CSR_DONE_MASK
#define DMA_TCD_CSR_BWC_MASK
static bool EDMA_HAL_GetSourceAddressError(const DMA_Type *base)
Checks for source address errors.
static bool EDMA_HAL_GetTransferCancelledError(const DMA_Type *base)
Checks for cancelled transfers.
#define DMA_DCHPRI_ECP(x)
#define DMA_TCD_CSR_MAJORLINKCH(x)
#define DMA_TCD_CSR_ESG(x)
static bool EDMA_HAL_TCDGetChannelActiveStatus(const DMA_Type *base, uint32_t channel)
Checks whether the channel is running for the TCD.
void EDMA_HAL_TCDClearReg(DMA_Type *base, uint32_t channel)
Clears all registers to 0 for the hardware TCD.
static bool EDMA_HAL_GetIntStatusFlag(const DMA_Type *base, uint32_t channel)
Gets the eDMA channel interrupt request status.
uint32_t EDMA_HAL_TCDGetUnfinishedBytes(const DMA_Type *base, uint32_t channel)
Gets the number of bytes haven't transferred for the TCD.
static void EDMA_HAL_SetChannelPreemptMode(DMA_Type *base, uint32_t channel, bool preemptive, bool preemptible)
Sets the preemption feature for the eDMA channel.
static void EDMA_HAL_TCDSetDestMinorLoopOffsetCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/disables the destination minor loop offset feature for the TCD.
#define FEATURE_EDMA_MODULE_CHANNELS
static void EDMA_HAL_TCDSetSrcLastAdjust(DMA_Type *base, uint32_t channel, int32_t size)
Configures the last source address adjustment for the TCD.
void EDMA_HAL_TCDSetMajorCount(DMA_Type *base, uint32_t channel, uint32_t count)
Sets the major iteration count according to minor loop channel link setting.
static void EDMA_HAL_TCDTriggerChannelStart(DMA_Type *base, uint32_t channel)
Triggers the start bits for the TCD.
static void EDMA_HAL_TCDSetSrcMinorLoopOffsetCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/disables the source minor loop offset feature for the TCD.
#define DMA_TCD_CSR_INTMAJOR(x)
static bool EDMA_HAL_GetDestinationBusError(const DMA_Type *base)
Checks for destination bus errors.
static void EDMA_HAL_ClearIntStatusFlag(DMA_Type *base, uint8_t channel)
Clears the interrupt status for the eDMA channel or all channels.
uint32_t EDMA_HAL_TCDGetCurrentMajorCount(const DMA_Type *base, uint32_t channel)
Returns the current major iteration count.
void EDMA_HAL_CancelTransferWithError(DMA_Type *base)
Cancels the remaining data transfer and treats it as an error condition.
#define DMA_TCD_CSR_ACTIVE_MASK
#define DMA_TCD_NBYTES_MLOFFYES_SMLOE_MASK
static void EDMA_HAL_TCDSetScatterGatherCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables the scatter/gather feature for the TCD.
void EDMA_HAL_SetErrorIntCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the error interrupt for channels.
static bool EDMA_HAL_GetMinorMajorLoopConfigError(const DMA_Type *base)
Checks for minor/major loop configuration errors.
#define DMA_TCD_CSR_DONE_SHIFT
#define DMA_TCD_CSR_MAJORLINKCH_MASK
static void EDMA_HAL_TCDSetSrcOffset(DMA_Type *base, uint32_t channel, int16_t offset)
Configures the source address signed offset for the hardware TCD.
#define DMA_DCHPRI_DPA(x)
static void EDMA_HAL_TCDSetDestAddr(DMA_Type *base, uint32_t channel, uint32_t address)
Configures the destination address for the TCD.
static void EDMA_HAL_SetHaltCmd(DMA_Type *base, bool halt)
Halts/Un-halts the DMA Operations.
static uint8_t EDMA_HAL_GetChannelWithError(const DMA_Type *base)
Error channel number.
static void EDMA_HAL_TCDSetDestLastAdjust(DMA_Type *base, uint32_t channel, int32_t adjust)
Configures the last source address adjustment.
static void EDMA_HAL_SetChannelPriority(DMA_Type *base, uint32_t channel, edma_channel_priority_t priority)
Sets the eDMA channel priority.
edma_arbitration_algorithm_t
eDMA channel arbitration algorithm used for selection among channels. Implements : edma_arbitration_a...
static void EDMA_HAL_SetHaltOnErrorCmd(DMA_Type *base, bool haltOnError)
Halts or does not halt the eDMA module when an error occurs.
static bool EDMA_HAL_GetScatterGatherError(const DMA_Type *base)
Checks for scatter/gather configuration errors.
void EDMA_HAL_CancelTransfer(DMA_Type *base)
Cancels the remaining data transfer.
static bool EDMA_HAL_GetValidErrorNotCleared(const DMA_Type *base)
Checks for valid errors.
void EDMA_HAL_TCDSetMinorLoopOffset(DMA_Type *base, uint32_t channel, int32_t offset)
Configures the minor loop offset for the TCD.
#define DMA_TCD_CSR_INTMAJOR_MASK
void EDMA_HAL_TCDSetChannelMinorLink(DMA_Type *base, uint32_t channel, uint32_t linkChannel, bool enable)
Sets the channel minor link for the TCD.
static void EDMA_HAL_SetMinorLoopMappingCmd(DMA_Type *base, bool enable)
Enables/Disables the minor loop mapping.
void EDMA_HAL_TCDSetAttribute(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo, edma_transfer_size_t srcTransferSize, edma_transfer_size_t destTransferSize)
Configures the transfer attribute for the eDMA channel.
#define DMA_TCD_CSR_INTHALF(x)
#define DMA_TCD_CSR_START_MASK
#define DMA_TCD_CSR_ACTIVE_SHIFT
#define DMA_TCD_CSR_MAJORELINK_MASK
edma_transfer_size_t
eDMA transfer configuration Implements : edma_transfer_size_t_Class
union DMA_Type::@6::@7 NBYTES
edma_bandwidth_config_t
Bandwidth control configuration Implements : edma_bandwidth_config_t_Class.
static bool EDMA_HAL_TCDGetDoneStatusFlag(const DMA_Type *base, uint32_t channel)
Gets the channel done status.
static bool EDMA_HAL_GetSourceOffsetError(const DMA_Type *base)
Checks for source offset errors.
static void EDMA_HAL_ClearErrorIntStatusFlag(DMA_Type *base, uint8_t channel)
Clears the error interrupt status for the eDMA channel or channels.
static void EDMA_HAL_TCDSetDisableDmaRequestAfterTCDDoneCmd(DMA_Type *base, uint32_t channel, bool disable)
Disables/Enables the DMA request after the major loop completes for the TCD.
#define DMA_ES_ERRCHN_SHIFT
__IO uint8_t DCHPRI[DMA_DCHPRI_COUNT]
edma_modulo_t
eDMA modulo configuration Implements : edma_modulo_t_Class
#define DMA_TCD_CSR_START(x)
#define DMA_TCD_CSR_DREQ_MASK
#define FEATURE_EDMA_CHN_TO_DCHPRI_INDEX(x)
#define DMA_CR_ERCA_SHIFT
static void EDMA_HAL_TCDSetDestOffset(DMA_Type *base, uint32_t channel, int16_t offset)
Configures the destination address signed offset for the TCD.
#define DMA_TCD_CSR_MAJORELINK(x)
#define DMA_DCHPRI_DPA_MASK
static void EDMA_HAL_TCDSetBandwidth(DMA_Type *base, uint32_t channel, edma_bandwidth_config_t bandwidth)
Configures the bandwidth for the TCD.
static uint32_t EDMA_HAL_GetErrorIntStatusFlag(const DMA_Type *base)
Gets the eDMA error interrupt status.
#define DMA_TCD_NBYTES_MLOFFYES_DMLOE(x)
edma_channel_priority_t
eDMA channel priority setting Implements : edma_channel_priority_t_Class
static void EDMA_HAL_SetAsyncRequestInStopModeCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables an asynchronous request in stop mode.
void EDMA_HAL_SetDmaRequestCmd(DMA_Type *base, uint8_t channel, bool enable)
Enables/Disables the DMA request for the channel or all channels.
static bool EDMA_HAL_GetDestinationOffsetError(const DMA_Type *base)
Checks for destination offset errors.
static void EDMA_HAL_TCDSetIntCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables the interrupt after the major loop completes for the TCD.
uint32_t EDMA_HAL_TCDGetFinishedBytes(const DMA_Type *base, uint32_t channel)
Gets the number of bytes already transferred for the TCD.
static void EDMA_HAL_ClearDoneStatusFlag(DMA_Type *base, uint8_t channel)
Clears the done status for a channel or all channels.
#define DMA_DCHPRI_ECP_MASK
static void EDMA_HAL_TriggerChannelStart(DMA_Type *base, uint8_t channel)
Triggers the eDMA channel.
static bool EDMA_HAL_GetDestinationAddressError(const DMA_Type *base)
Checks for destination address errors.
struct DMA_Type::@6 TCD[DMA_TCD_COUNT]
static edma_arbitration_algorithm_t EDMA_HAL_GetChannelArbitrationMode(const DMA_Type *base)
Gets the channel arbitration algorithm.
void EDMA_HAL_Init(DMA_Type *base)
Initializes eDMA module to known state.
void EDMA_HAL_TCDSetNbytes(DMA_Type *base, uint32_t channel, uint32_t nbytes)
Configures the nbytes for the eDMA channel.
#define DMA_DCHPRI_CHPRI(x)
static void EDMA_HAL_TCDSetHalfCompleteIntCmd(DMA_Type *base, uint32_t channel, bool enable)
Enables/Disables the half complete interrupt for the TCD.
static bool EDMA_HAL_GetDmaRequestStatusFlag(const DMA_Type *base, uint32_t channel)
Gets the eDMA channel DMA request status.
uint32_t EDMA_HAL_TCDGetNbytes(const DMA_Type *base, uint32_t channel)
Gets the nbytes configuration data for the TCD.
#define DMA_TCD_CSR_ESG_MASK
static void EDMA_HAL_SetDebugCmd(DMA_Type *base, bool enable)
Enables/Disables the eDMA DEBUG mode.
static void EDMA_HAL_SetChannelArbitrationMode(DMA_Type *base, edma_arbitration_algorithm_t channelArbitration)
Sets the channel arbitration algorithm.
uint32_t EDMA_HAL_TCDGetBeginMajorCount(const DMA_Type *base, uint32_t channel)
Returns the begin major iteration count.
#define DMA_TCD_CSR_DREQ(x)
static bool EDMA_HAL_GetChannelPriorityError(const DMA_Type *base)
Checks for channel priority errors.
static bool EDMA_HAL_GetSourceBusError(const DMA_Type *base)
Checks for source bus errors.
#define DMA_TCD_NBYTES_MLOFFYES_SMLOE(x)