S32 SDK

#include <S32K144.h>

Data Fields

uint8_t RESERVED_0 [8]
 
__IO uint32_t ACTLR
 
uint8_t RESERVED_1 [3316]
 
__I uint32_t CPUID
 
__IO uint32_t ICSR
 
__IO uint32_t VTOR
 
__IO uint32_t AIRCR
 
__IO uint32_t SCR
 
__IO uint32_t CCR
 
__IO uint32_t SHPR1
 
__IO uint32_t SHPR2
 
__IO uint32_t SHPR3
 
__IO uint32_t SHCSR
 
__IO uint32_t CFSR
 
__IO uint32_t HFSR
 
__IO uint32_t DFSR
 
__IO uint32_t MMFAR
 
__IO uint32_t BFAR
 
__IO uint32_t AFSR
 
uint8_t RESERVED_2 [72]
 
__IO uint32_t CPACR
 
uint8_t RESERVED_3 [424]
 
__IO uint32_t FPCCR
 
__IO uint32_t FPCAR
 
__IO uint32_t FPDSCR
 

Detailed Description

S32_SCB - Size of Registers Arrays S32_SCB - Register Layout Typedef

Definition at line 9759 of file S32K144.h.

Field Documentation

__IO uint32_t ACTLR

Auxiliary Control Register,, offset: 0x8

Definition at line 9761 of file S32K144.h.

__IO uint32_t AFSR

Auxiliary Fault Status Register, offset: 0xD3C

Definition at line 9778 of file S32K144.h.

__IO uint32_t AIRCR

Application Interrupt and Reset Control Register, offset: 0xD0C

Definition at line 9766 of file S32K144.h.

__IO uint32_t BFAR

BusFault Address Register, offset: 0xD38

Definition at line 9777 of file S32K144.h.

__IO uint32_t CCR

Configuration and Control Register, offset: 0xD14

Definition at line 9768 of file S32K144.h.

__IO uint32_t CFSR

Configurable Fault Status Registers, offset: 0xD28

Definition at line 9773 of file S32K144.h.

__IO uint32_t CPACR

Coprocessor Access Control Register, offset: 0xD88

Definition at line 9780 of file S32K144.h.

__I uint32_t CPUID

CPUID Base Register, offset: 0xD00

Definition at line 9763 of file S32K144.h.

__IO uint32_t DFSR

Debug Fault Status Register, offset: 0xD30

Definition at line 9775 of file S32K144.h.

__IO uint32_t FPCAR

Floating-point Context Address Register, offset: 0xF38

Definition at line 9783 of file S32K144.h.

__IO uint32_t FPCCR

Floating-point Context Control Register, offset: 0xF34

Definition at line 9782 of file S32K144.h.

__IO uint32_t FPDSCR

Floating-point Default Status Control Register, offset: 0xF3C

Definition at line 9784 of file S32K144.h.

__IO uint32_t HFSR

HardFault Status register, offset: 0xD2C

Definition at line 9774 of file S32K144.h.

__IO uint32_t ICSR

Interrupt Control and State Register, offset: 0xD04

Definition at line 9764 of file S32K144.h.

__IO uint32_t MMFAR

MemManage Address Register, offset: 0xD34

Definition at line 9776 of file S32K144.h.

uint8_t RESERVED_0[8]

Definition at line 9760 of file S32K144.h.

uint8_t RESERVED_1[3316]

Definition at line 9762 of file S32K144.h.

uint8_t RESERVED_2[72]

Definition at line 9779 of file S32K144.h.

uint8_t RESERVED_3[424]

Definition at line 9781 of file S32K144.h.

__IO uint32_t SCR

System Control Register, offset: 0xD10

Definition at line 9767 of file S32K144.h.

__IO uint32_t SHCSR

System Handler Control and State Register, offset: 0xD24

Definition at line 9772 of file S32K144.h.

__IO uint32_t SHPR1

System Handler Priority Register 1, offset: 0xD18

Definition at line 9769 of file S32K144.h.

__IO uint32_t SHPR2

System Handler Priority Register 2, offset: 0xD1C

Definition at line 9770 of file S32K144.h.

__IO uint32_t SHPR3

System Handler Priority Register 3, offset: 0xD20

Definition at line 9771 of file S32K144.h.

__IO uint32_t VTOR

Vector Table Offset Register, offset: 0xD08

Definition at line 9765 of file S32K144.h.


The documentation for this struct was generated from the following file: