S32 SDK

#include <S32K144.h>

Data Fields

__I uint32_t CPxTYPE
 
__I uint32_t CPxNUM
 
__I uint32_t CPxMASTER
 
__I uint32_t CPxCOUNT
 
__I uint32_t CPxCFG0
 
__I uint32_t CPxCFG1
 
__I uint32_t CPxCFG2
 
__I uint32_t CPxCFG3
 
__I uint32_t CP0TYPE
 
__I uint32_t CP0NUM
 
__I uint32_t CP0MASTER
 
__I uint32_t CP0COUNT
 
__I uint32_t CP0CFG0
 
__I uint32_t CP0CFG1
 
__I uint32_t CP0CFG2
 
__I uint32_t CP0CFG3
 
uint8_t RESERVED_0 [960]
 
__IO uint32_t OCMDR [MSCM_OCMDR_COUNT]
 

Detailed Description

MSCM - Register Layout Typedef

Definition at line 7835 of file S32K144.h.

Field Documentation

__I uint32_t CP0CFG0

Processor 0 Configuration Register 0, offset: 0x30

Definition at line 7848 of file S32K144.h.

__I uint32_t CP0CFG1

Processor 0 Configuration Register 1, offset: 0x34

Definition at line 7849 of file S32K144.h.

__I uint32_t CP0CFG2

Processor 0 Configuration Register 2, offset: 0x38

Definition at line 7850 of file S32K144.h.

__I uint32_t CP0CFG3

Processor 0 Configuration Register 3, offset: 0x3C

Definition at line 7851 of file S32K144.h.

__I uint32_t CP0COUNT

Processor 0 Count Register, offset: 0x2C

Definition at line 7847 of file S32K144.h.

__I uint32_t CP0MASTER

Processor 0 Master Register, offset: 0x28

Definition at line 7846 of file S32K144.h.

__I uint32_t CP0NUM

Processor 0 Number Register, offset: 0x24

Definition at line 7845 of file S32K144.h.

__I uint32_t CP0TYPE

Processor 0 Type Register, offset: 0x20

Definition at line 7844 of file S32K144.h.

__I uint32_t CPxCFG0

Processor X Configuration Register 0, offset: 0x10

Definition at line 7840 of file S32K144.h.

__I uint32_t CPxCFG1

Processor X Configuration Register 1, offset: 0x14

Definition at line 7841 of file S32K144.h.

__I uint32_t CPxCFG2

Processor X Configuration Register 2, offset: 0x18

Definition at line 7842 of file S32K144.h.

__I uint32_t CPxCFG3

Processor X Configuration Register 3, offset: 0x1C

Definition at line 7843 of file S32K144.h.

__I uint32_t CPxCOUNT

Processor X Count Register, offset: 0xC

Definition at line 7839 of file S32K144.h.

__I uint32_t CPxMASTER

Processor X Master Register, offset: 0x8

Definition at line 7838 of file S32K144.h.

__I uint32_t CPxNUM

Processor X Number Register, offset: 0x4

Definition at line 7837 of file S32K144.h.

__I uint32_t CPxTYPE

Processor X Type Register, offset: 0x0

Definition at line 7836 of file S32K144.h.

__IO uint32_t OCMDR[MSCM_OCMDR_COUNT]

On-Chip Memory Descriptor Register, array offset: 0x400, array step: 0x4

Definition at line 7853 of file S32K144.h.

uint8_t RESERVED_0[960]

Definition at line 7852 of file S32K144.h.


The documentation for this struct was generated from the following file: