system_S32K118.c
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1 /*
2  * Copyright 2017-2018 NXP
3  * All rights reserved.
4  *
5  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
6  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
7  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
8  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
9  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
10  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
11  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
12  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
13  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
14  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
15  * THE POSSIBILITY OF SUCH DAMAGE.
16  */
17 
45 #include "device_registers.h"
46 #include "system_S32K118.h"
47 #include "stdbool.h"
48 
49 /* ----------------------------------------------------------------------------
50  -- Core clock
51  ---------------------------------------------------------------------------- */
52 
54 
55 /*FUNCTION**********************************************************************
56  *
57  * Function Name : SystemInit
58  * Description : This function disables the watchdog, enables FPU
59  * and the power mode protection if the corresponding feature macro
60  * is enabled. SystemInit is called from startup_device file.
61  *
62  * Implements : SystemInit_Activity
63  *END**************************************************************************/
64 void SystemInit(void)
65 {
66 /**************************************************************************/
67 /* WDOG DISABLE*/
68 /**************************************************************************/
69 
70 #if (DISABLE_WDOG)
71  /* Write of the WDOG unlock key to CNT register, must be done in order to allow any modifications*/
72  WDOG->CNT = (uint32_t ) FEATURE_WDOG_UNLOCK_VALUE;
73  /* The dummy read is used in order to make sure that the WDOG registers will be configured only
74  * after the write of the unlock value was completed. */
75  (void)WDOG->CNT;
76 
77  /* Initial write of WDOG configuration register:
78  * enables support for 32-bit refresh/unlock command write words,
79  * clock select from LPO, update enable, watchdog disabled */
80  WDOG->CS = (uint32_t ) ( (1UL << WDOG_CS_CMD32EN_SHIFT) |
82  (0U << WDOG_CS_EN_SHIFT) |
83  (1U << WDOG_CS_UPDATE_SHIFT) );
84 
85  /* Configure timeout */
86  WDOG->TOVAL = (uint32_t )0xFFFF;
87 #endif /* (DISABLE_WDOG) */
88 }
89 
90 /*FUNCTION**********************************************************************
91  *
92  * Function Name : SystemCoreClockUpdate
93  * Description : This function must be called whenever the core clock is changed
94  * during program execution. It evaluates the clock register settings and calculates
95  * the current core clock.
96  *
97  * Implements : SystemCoreClockUpdate_Activity
98  *END**************************************************************************/
100 {
101  uint32_t SCGOUTClock = 0U; /* Variable to store output clock frequency of the SCG module */
102  uint32_t regValue; /* Temporary variable */
103  uint32_t divider;
104  bool validSystemClockSource = true;
105 
106  divider = ((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U;
107 
108  switch ((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT)
109  {
110  case 0x1:
111  /* System OSC */
112  SCGOUTClock = CPU_XTAL_CLK_HZ;
113  break;
114  case 0x2:
115  /* Slow IRC */
116  regValue = (SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT;
117  if (regValue != 0UL)
118  {
119  SCGOUTClock = FEATURE_SCG_SIRC_HIGH_RANGE_FREQ;
120  }
121  else
122  {
123  validSystemClockSource = false;
124  }
125  break;
126  case 0x3:
127  /* Fast IRC */
128  regValue = (SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT;
129  if (regValue == 0x0UL)
130  {
131  SCGOUTClock = FEATURE_SCG_FIRC_FREQ0;
132  }
133  else
134  {
135  validSystemClockSource = false;
136  }
137  break;
138  default:
139  validSystemClockSource = false;
140  break;
141  }
142 
143  if (validSystemClockSource == true)
144  {
145  SystemCoreClock = (SCGOUTClock / divider);
146  }
147 }
148 
149 /*FUNCTION**********************************************************************
150  *
151  * Function Name : SystemSoftwareReset
152  * Description : This function is used to initiate a system reset
153  *
154  * Implements : SystemSoftwareReset_Activity
155  *END**************************************************************************/
157 {
158  uint32_t regValue;
159 
160  /* Read Application Interrupt and Reset Control Register */
161  regValue = S32_SCB->AIRCR;
162 
163  /* Clear register key */
164  regValue &= ~( S32_SCB_AIRCR_VECTKEY_MASK);
165 
166  /* Configure System reset request bit and Register Key */
168  regValue |= S32_SCB_AIRCR_SYSRESETREQ(0x1u);
169 
170  /* Write computed register value */
171  S32_SCB->AIRCR = regValue;
172 }
173 
174 /*******************************************************************************
175  * EOF
176  ******************************************************************************/
#define SCG_FIRCCFG_RANGE_SHIFT
Definition: S32K118.h:9569
#define WDOG_CS_CMD32EN_SHIFT
Definition: S32K118.h:10226
#define FEATURE_SCG_SIRC_HIGH_RANGE_FREQ
#define WDOG_CS_CLK_SHIFT
Definition: S32K118.h:10210
void SystemSoftwareReset(void)
Initiates a system reset.
#define SCG_CSR_SCS_MASK
Definition: S32K118.h:9400
#define DEFAULT_SYSTEM_CLOCK
#define FEATURE_SCG_FIRC_FREQ0
#define S32_SCB_AIRCR_SYSRESETREQ(x)
Definition: S32K118.h:9126
#define SCG_FIRCCFG_RANGE_MASK
Definition: S32K118.h:9568
#define FEATURE_WDOG_UNLOCK_VALUE
#define SCG_CSR_DIVCORE_SHIFT
Definition: S32K118.h:9397
#define FEATURE_WDOG_CLK_FROM_LPO
void SystemCoreClockUpdate(void)
Updates the SystemCoreClock variable.
#define SCG_CSR_DIVCORE_MASK
Definition: S32K118.h:9396
#define S32_SCB_AIRCR_VECTKEY(x)
Definition: S32K118.h:9134
#define S32_SCB
Definition: S32K118.h:9048
#define SCG_CSR_SCS_SHIFT
Definition: S32K118.h:9401
#define CPU_XTAL_CLK_HZ
Device specific configuration file for S32K118.
uint32_t SystemCoreClock
System clock frequency (core clock)
void SystemInit(void)
Setup the SoC.
#define SCG
Definition: S32K118.h:9352
#define S32_SCB_AIRCR_VECTKEY_MASK
Definition: S32K118.h:9131
#define SCG_SIRCCFG_RANGE_SHIFT
Definition: S32K118.h:9530
#define SCG_SIRCCFG_RANGE_MASK
Definition: S32K118.h:9529
#define WDOG_CS_UPDATE_SHIFT
Definition: S32K118.h:10198
#define WDOG_CS_EN_SHIFT
Definition: S32K118.h:10206
#define FEATURE_SCB_VECTKEY
#define WDOG
Definition: S32K118.h:10159