#include <platform/devices/S32K118/include/S32K118.h>

Data Fields

volatile uint32_t PCCCR
 
volatile uint32_t PCCLCR
 
volatile uint32_t PCCSAR
 
volatile uint32_t PCCCVR
 
uint8_t RESERVED_0 [16]
 
volatile uint32_t PCCRMR
 

Detailed Description

LMEM - Size of Registers Arrays LMEM - Register Layout Typedef

Definition at line 4974 of file S32K118.h.

Field Documentation

volatile uint32_t PCCCR

< Defines 'read / write' permissions Cache control register, offset: 0x0

Definition at line 4975 of file S32K118.h.

volatile uint32_t PCCCVR

< Defines 'read / write' permissions Cache read/write value register, offset: 0xC

Definition at line 4978 of file S32K118.h.

volatile uint32_t PCCLCR

< Defines 'read / write' permissions Cache line control register, offset: 0x4

Definition at line 4976 of file S32K118.h.

volatile uint32_t PCCRMR

< Defines 'read / write' permissions Cache regions mode register, offset: 0x20

Definition at line 4980 of file S32K118.h.

volatile uint32_t PCCSAR

< Defines 'read / write' permissions Cache search address register, offset: 0x8

Definition at line 4977 of file S32K118.h.

uint8_t RESERVED_0[16]

Definition at line 4979 of file S32K118.h.


The documentation for this struct was generated from the following file: