ftm_common.c
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1 /*
2  * Copyright (c) 2016, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
63 #include "ftm_common.h"
64 #include "ftm_hw_access.h"
65 
66 /*******************************************************************************
67  * Variables
68  ******************************************************************************/
69 
72 
78 
79 #ifdef ERRATA_E10856
80 bool faultDetection = false;
81 #endif
82 
85 
89 #if (FTM_INSTANCE_COUNT > 2U)
90  {SIM_FTM2_CLOCKSEL, FTM2_CLK},
91 #endif
92 #if (FTM_INSTANCE_COUNT > 3U)
93  {SIM_FTM3_CLOCKSEL, FTM3_CLK},
94 #endif
95 #if (FTM_INSTANCE_COUNT > 4U)
96  {SIM_FTM4_CLOCKSEL, FTM4_CLK},
97 #endif
98 #if (FTM_INSTANCE_COUNT > 5U)
99  {SIM_FTM5_CLOCKSEL, FTM5_CLK},
100 #endif
101 #if (FTM_INSTANCE_COUNT > 6U)
102  {SIM_FTM6_CLOCKSEL, FTM6_CLK},
103 #endif
104 #if (FTM_INSTANCE_COUNT > 7U)
105  {SIM_FTM7_CLOCKSEL, FTM7_CLK},
106 #endif
107  };
108 
109 /*FUNCTION**********************************************************************
110  *
111  * Function Name : FTM_DRV_Init
112  * Description : Initializes the FTM driver and get the clock frequency value
113  * which select one of three possible clock sources for the FTM counter.
114  *
115  * Implements : FTM_DRV_Init_Activity
116  *END**************************************************************************/
117 status_t FTM_DRV_Init(uint32_t instance,
118  const ftm_user_config_t * info,
119  ftm_state_t * state)
120 {
121  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
122  DEV_ASSERT(info != NULL);
123  DEV_ASSERT(state != NULL);
124  FTM_Type * ftmBase = g_ftmBase[instance];
125  status_t status = STATUS_SUCCESS;
126  uint8_t index = 0U;
127 
128  /* Check if this instance is already initialized */
129  if (ftmStatePtr[instance] != NULL)
130  {
131  status = STATUS_ERROR;
132  }
133  else
134  {
135  /* Configure state structure. */
136  state->ftmClockSource = info->ftmClockSource;
138  state->ftmPeriod = 0U;
139  ftmStatePtr[instance] = state;
140 
141  for (index = 0U; index < FEATURE_FTM_CHANNEL_COUNT; index++)
142  {
143  state->measurementResults[index] = 0U;
144  state->channelsCallbacksParams[index] = NULL;
145  state->channelsCallbacks[index] = NULL;
146  state->enableNotification[index] = false;
147  }
148 
149  /* The reset operation doesn't care about write protection. FTM_DRV_Reset will
150  * disable this protection.*/
151  FTM_DRV_Reset(ftmBase);
152  FTM_DRV_InitModule(ftmBase, info->ftmPrescaler);
153  /* Get clock name used to configure the FlexTimer module */
155  /* Check the functional clock is selected for FTM */
156  DEV_ASSERT(state->ftmSourceClockFrequency > 0U);
157  }
158 
159  if (STATUS_SUCCESS == status)
160  {
161  /* Check if the mode operation in PWM mode */
163  {
164  /* Configure sync for between registers and buffers */
165  status = FTM_DRV_SetSync(instance, &(info->syncMethod));
166  }
167 
168  /* Enable the generation of initialization trigger on chip module */
169  FTM_DRV_SetInitTriggerCmd(ftmBase, info->enableInitializationTrigger);
170  FTM_DRV_SetBdmMode(ftmBase, info->BDMMode);
171 
172  /* Check if enable interrupt in counter mode */
173  if (info->isTofIsrEnabled)
174  {
175  FTM_DRV_SetTimerOverflowInt(ftmBase, true);
177  }
178  else
179  {
180  FTM_DRV_SetTimerOverflowInt(ftmBase, false);
182  }
183  }
184 
185  return status;
186 }
187 
188 /*FUNCTION**********************************************************************
189  *
190  * Function Name : FTM_DRV_Deinit
191  * Description : Shuts down the FTM driver.
192  * First, FTM_DRV_Init must be called. Then this function will disables the FTM module.
193  *
194  * Implements : FTM_DRV_Deinit_Activity
195  *END**************************************************************************/
196 status_t FTM_DRV_Deinit(uint32_t instance)
197 {
198  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
199  FTM_Type * ftmBase = g_ftmBase[instance];
200 
201  /* Reset all FTM register */
202  FTM_DRV_Reset(ftmBase);
203  ftmStatePtr[instance] = NULL;
204 
205  return STATUS_SUCCESS;
206 }
207 
208 /*FUNCTION**********************************************************************
209  *
210  * Function Name : FTM_DRV_MaskOutputChannels
211  * Description : This function will mask the output of the channels and at match
212  * events will be ignored by the masked channels.
213  *
214  * Implements : FTM_DRV_MaskOutputChannels_Activity
215  *END**************************************************************************/
217  uint32_t channelsMask,
218  bool softwareTrigger)
219 {
220  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
221  FTM_Type * ftmBase = g_ftmBase[instance];
222 
223  FTM_DRV_SetOutmaskReg(ftmBase, channelsMask);
224  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
225 
226  return STATUS_SUCCESS;
227 }
228 
229 /*FUNCTION**********************************************************************
230  *
231  * Function Name : FTM_DRV_SetInitialCounterValue
232  * Description : This function configure the initial counter value. The counter
233  * will get this value after an overflow event.
234  *
235  * Implements : FTM_DRV_SetInitialCounterValue_Activity
236  *END**************************************************************************/
238  uint16_t counterValue,
239  bool softwareTrigger)
240 {
241  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
242  FTM_Type * ftmBase = g_ftmBase[instance];
243 
244  FTM_DRV_SetCounterInitVal(ftmBase, counterValue);
245  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
246 
247  return STATUS_SUCCESS;
248 }
249 
250 /*FUNCTION**********************************************************************
251  *
252  * Function Name : FTM_DRV_SetHalfCycleReloadPoint
253  * Description : This function configure the value of the counter which will
254  * generates an reload point.
255  *
256  * Implements : FTM_DRV_SetHalfCycleReloadPoint_Activity
257  *END**************************************************************************/
259  uint16_t reloadPoint,
260  bool softwareTrigger)
261 {
262  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
263  FTM_Type * ftmBase = g_ftmBase[instance];
264 
265  FTM_DRV_SetHalfCycleValue(ftmBase, reloadPoint);
266  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
267 
268  return STATUS_SUCCESS;
269 }
270 
271 /*FUNCTION**********************************************************************
272  *
273  * Function Name : FTM_DRV_SetSoftOutChnValue
274  * Description : This function will force the output value of a channel to a specific value.
275  * Before using this function it's mandatory to mask the match events using
276  * FTM_DRV_MaskOutputChannels and to enable software output control using
277  * FTM_DRV_SetSoftwareOutputChannelControl.
278  *
279  * Implements : FTM_DRV_SetSoftOutChnValue_Activity
280  *END**************************************************************************/
282  uint8_t channelsValues,
283  bool softwareTrigger)
284 {
285  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
286  FTM_Type * ftmBase = g_ftmBase[instance];
287  FTM_DRV_SetAllChnSoftwareCtrlVal(ftmBase, channelsValues);
288  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
289 
290  return STATUS_SUCCESS;
291 }
292 
293 /*FUNCTION**********************************************************************
294  *
295  * Function Name : FTM_DRV_SetSoftwareOutputChannelControl
296  * Description : This function will configure which output channel can be
297  * software controlled.
298  *
299  * Implements : FTM_DRV_SetSoftwareOutputChannelControl_Activity
300  *END**************************************************************************/
302  uint8_t channelsMask,
303  bool softwareTrigger)
304 {
305  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
306  FTM_Type * ftmBase = g_ftmBase[instance];
307  FTM_DRV_SetAllChnSoftwareCtrlCmd(ftmBase, channelsMask);
308  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
309 
310  return STATUS_SUCCESS;
311 }
312 
313 /*FUNCTION**********************************************************************
314  *
315  * Function Name : FTM_DRV_SetAllChnSoftwareOutputControl
316  * Description : This function will control list of channels by software to force
317  * the output to specified value.
318  *
319  * Implements : FTM_DRV_SetAllChnSoftwareOutputControl_Activity
320  *END**************************************************************************/
322  uint8_t channelMask,
323  uint8_t channelValueMask)
324 {
325  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
326  FTM_Type * ftmBase = g_ftmBase[instance];
327 
328  /* Enable the software output control by channel mask */
329  FTM_DRV_SetAllChnSoftwareCtrlCmd(ftmBase, channelMask);
330  /* Set the value mask to force for the channel output */
331  FTM_DRV_SetAllChnSoftwareCtrlVal(ftmBase, channelValueMask);
332 
333  return STATUS_SUCCESS;
334 }
335 
336 /*FUNCTION**********************************************************************
337  *
338  * Function Name : FTM_DRV_SetInvertingControl
339  * Description : This function will configure if the second channel of a pair
340  * will be inverted or not.
341  *
342  * Implements : FTM_DRV_SetInvertingControl_Activity
343  *END**************************************************************************/
345  uint8_t channelsPairMask,
346  bool softwareTrigger)
347 {
348  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
349  FTM_Type * ftmBase = g_ftmBase[instance];
350 
351  FTM_DRV_SetInvctrlReg(ftmBase, channelsPairMask);
352  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
353 
354  return STATUS_SUCCESS;
355 }
356 
357 /*FUNCTION**********************************************************************
358  *
359  * Function Name : FTM_DRV_SetModuloCounterValue
360  * Description : This function configure the maximum counter value.
361  *
362  * Implements : FTM_DRV_SetModuloCounterValue_Activity
363  *END**************************************************************************/
365  uint16_t counterValue,
366  bool softwareTrigger)
367 {
368  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
369  FTM_Type * ftmBase = g_ftmBase[instance];
370 
371  FTM_DRV_SetMod(ftmBase, counterValue);
372  FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
373 
374  return STATUS_SUCCESS;
375 }
376 
377 /*FUNCTION**********************************************************************
378  *
379  * Function Name : FTM_DRV_SetOutputlevel
380  * Description : This function will set the channel edge or level on the selection
381  * of the channel mode.
382  *
383  * Implements : FTM_DRV_SetOutputlevel_Activity
384  *END**************************************************************************/
386  uint8_t channel,
387  uint8_t level)
388 {
389  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
391  FTM_Type * ftmBase = g_ftmBase[instance];
392 
393  /* Sets the channel edge or level selection */
394  FTM_DRV_SetChnEdgeLevel(ftmBase, channel, level);
395 
396  return STATUS_SUCCESS;
397 }
398 
399 /*FUNCTION**********************************************************************
400  *
401  * Function Name : FTM_DRV_SetSync
402  * Description : This function configure the synchronization for PWM register
403  * (CnV, MOD, CINT, HCR, OUTMASK).If this function is used whit wrong parameters
404  * it's possible to generate wrong waveform. Registers synchronization need to
405  * be configured for PWM and output compare mode.
406  *
407  * Implements : FTM_DRV_SetSync_Activity
408  *END**************************************************************************/
409 status_t FTM_DRV_SetSync(uint32_t instance,
410  const ftm_pwm_sync_t * param)
411 {
412  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
413  DEV_ASSERT(param != NULL);
414  FTM_Type * ftmBase = g_ftmBase[instance];
415  status_t retStatus = STATUS_SUCCESS;
416  bool hardwareSync = param->hardwareSync0 || param->hardwareSync1 || param->hardwareSync2;
417 
418  /* Software and hardware triggers are not allowed in the same time */
419  if ((param->softwareSync && hardwareSync) || (true != (param->softwareSync || hardwareSync)))
420  {
421  retStatus = STATUS_ERROR;
422  }
423  else if (param->softwareSync)
424  {
425  /* Configure sync for OUTMASK register */
426  FTM_DRV_SetOutmaskSoftwareSyncModeCmd(ftmBase, true);
427  /* Configure sync for INVCTRL register */
428  FTM_DRV_SetInvctrlSoftwareSyncModeCmd(ftmBase, true);
429  /* Configure sync for SWOCTRL register */
430  FTM_DRV_SetSwoctrlSoftwareSyncModeCmd(ftmBase, true);
431  /* Configure sync for MOD, HCR, CNTIN, and CnV registers */
432  FTM_DRV_SetModCntinCvSoftwareSyncModeCmd(ftmBase, true);
433  /* Configure synchronization method (waiting next loading point or now) */
434  FTM_DRV_SetCounterSoftwareSyncModeCmd(ftmBase, param->syncPoint);
435  }
436  else
437  {
438  /* Configure sync for OUTMASK register */
439  FTM_DRV_SetOutmaskHardwareSyncModeCmd(ftmBase, true);
440  /* Configure sync for INVCTRL register */
441  FTM_DRV_SetInvctrlHardwareSyncModeCmd(ftmBase, true);
442  /* Configure sync for SWOCTRL register */
443  FTM_DRV_SetSwoctrlHardwareSyncModeCmd(ftmBase, true);
444  /* Configure sync for MOD, HCR, CNTIN, and CnV registers */
445  FTM_DRV_SetModCntinCvHardwareSyncModeCmd(ftmBase, true);
446  /* Configure synchronization method (waiting next loading point or now) */
447  FTM_DRV_SetCounterHardwareSyncModeCmd(ftmBase, (bool)param->syncPoint);
448  }
449 
450  if (STATUS_SUCCESS == retStatus)
451  {
452  /* Enhanced PWM sync is used */
453  FTM_DRV_SetPwmSyncModeCmd(ftmBase, true);
454  /* Configure trigger source for sync */
455  FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 0U, param->hardwareSync0);
456  FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 1U, param->hardwareSync1);
457  FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 2U, param->hardwareSync2);
458  /* Configure loading points */
459  FTM_DRV_SetMaxLoadingCmd(ftmBase, param->maxLoadingPoint);
460  FTM_DRV_SetMinLoadingCmd(ftmBase, param->minLoadingPoint);
461  /* Configure sync for OUTMASK register */
462  FTM_DRV_SetOutmaskPwmSyncModeCmd(ftmBase, (bool)param->maskRegSync);
463  /* Configure sync for INVCTRL register */
464  FTM_DRV_SetInvctrlPwmSyncModeCmd(ftmBase, param->inverterSync);
465  /* Configure sync for SWOCTRL register */
466  FTM_DRV_SetSwoctrlPwmSyncModeCmd(ftmBase, param->outRegSync);
467  /* Configure sync for MOD, HCR, CNTIN, and CnV registers */
468  FTM_DRV_SetCntinPwmSyncModeCmd(ftmBase, param->initCounterSync);
469  /* Configure if FTM clears TRIGj (j=0,1,2) when the hardware trigger j is detected. */
470  FTM_DRV_SetHwTriggerSyncModeCmd(ftmBase, param->autoClearTrigger);
471  }
472 
473  return retStatus;
474 }
475 
476 /*FUNCTION**********************************************************************
477  *
478  * Function Name : FTM_DRV_EnableInterrupts
479  * Description : This function will enable the generation a list of interrupts.
480  * It includes the FTM overflow interrupts, the reload point interrupt, the fault
481  * interrupt and the channel (n) interrupt.
482  *
483  * Implements : FTM_DRV_EnableInterrupts_Activity
484  *END**************************************************************************/
486  uint32_t interruptMask)
487 {
488  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
489  FTM_Type * ftmBase = g_ftmBase[instance];
490  uint32_t chnlInts = (interruptMask & 0x000000FFU);
491  uint8_t channel = 0U;
492 
493  /* Enable the timer overflow interrupt */
494  if ((interruptMask & (uint32_t)FTM_TIME_OVER_FLOW_INT_ENABLE) != 0x0U)
495  {
496  FTM_DRV_SetTimerOverflowInt(ftmBase, true);
498  }
499 
500  /* Enable the fault interrupt */
501  if ((interruptMask & (uint32_t)FTM_FAULT_INT_ENABLE) != 0x0U)
502  {
503  FTM_DRV_SetFaultInt(ftmBase, true);
505  }
506 
507  /* Enable the reload interrupt */
508  if ((interruptMask & (uint32_t)FTM_RELOAD_INT_ENABLE) != 0x0U)
509  {
510  FTM_DRV_SetReIntEnabledCmd(ftmBase, true);
512  }
513 
514  /* Enable the channel interrupts */
515  while (chnlInts != 0U)
516  {
517  if ((chnlInts & 0x1U) != 0x0U)
518  {
519  FTM_DRV_EnableChnInt(ftmBase, channel);
520  INT_SYS_EnableIRQ(g_ftmIrqId[instance][channel]);
521  }
522  channel++;
523  chnlInts = chnlInts >> 1U;
524  }
525 
526  return STATUS_SUCCESS;
527 }
528 
529 /*FUNCTION**********************************************************************
530  *
531  * Function Name : FTM_DRV_DisableInterrupts
532  * Description : This function is used to disable some interrupts.
533  *
534  * Implements : FTM_DRV_DisableInterrupts_Activity
535  *END**************************************************************************/
536 void FTM_DRV_DisableInterrupts(uint32_t instance,
537  uint32_t interruptMask)
538 {
539  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
540  FTM_Type * ftmBase = g_ftmBase[instance];
541  uint32_t chnlInts = (interruptMask & 0x000000FFU);
542  uint8_t channel = 0U;
543 
544  /* Disable the timer overflow interrupt */
545  if ((interruptMask & (uint32_t)FTM_TIME_OVER_FLOW_INT_ENABLE) != 0x0U)
546  {
547  FTM_DRV_SetTimerOverflowInt(ftmBase, false);
549  }
550 
551  /* Disable the fault interrupt */
552  if ((interruptMask & (uint32_t)FTM_FAULT_INT_ENABLE) != 0x0U)
553  {
554  FTM_DRV_SetFaultInt(ftmBase, false);
556  }
557 
558  /* Disable the reload interrupt */
559  if ((interruptMask & (uint32_t)FTM_RELOAD_INT_ENABLE) != 0x0U)
560  {
561  FTM_DRV_SetReIntEnabledCmd(ftmBase, false);
563  }
564 
565  /* Disable the channel interrupts */
566  while (chnlInts != 0U)
567  {
568  if ((chnlInts & 0x1U) != 0x0U)
569  {
570  FTM_DRV_DisableChnInt(ftmBase, channel);
571  INT_SYS_DisableIRQ(g_ftmIrqId[instance][channel]);
572  }
573  channel++;
574  chnlInts = chnlInts >> 1U;
575  }
576 }
577 
578 /*FUNCTION**********************************************************************
579  *
580  * Function Name : FTM_DRV_GetEnabledInterrupts
581  * Description : This function will get the enabled FTM interrupts.
582  *
583  * Implements : FTM_DRV_GetEnabledInterrupts_Activity
584  *END**************************************************************************/
585 uint32_t FTM_DRV_GetEnabledInterrupts(uint32_t instance)
586 {
587  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
588  FTM_Type const * ftmBase = g_ftmBase[instance];
589  uint32_t enabledInterrupts = 0U;
590  uint8_t channel = FEATURE_FTM_CHANNEL_COUNT;
591 
592 
593  /* Check if timer overflow interrupt is enabled */
594  if (FTM_DRV_IsOverflowIntEnabled(ftmBase) == true)
595  {
596  enabledInterrupts |= (uint32_t)FTM_TIME_OVER_FLOW_INT_ENABLE;
597  }
598 
599  /* Check if fault interrupt is enabled */
600  if (FTM_DRV_IsFaultIntEnabled(ftmBase) == true)
601  {
602  enabledInterrupts |= (uint32_t)FTM_FAULT_INT_ENABLE;
603  }
604 
605  /* Check if the reload interrupt is enabled */
606  if (FTM_DRV_IsReloadIntEnabled(ftmBase) == true)
607  {
608  enabledInterrupts |= (uint32_t)FTM_RELOAD_INT_ENABLE;
609  }
610 
611  /* Check if the channel interrupts are enabled */
612  while (channel > 0U)
613  {
614  channel--;
615  if (FTM_DRV_IsChnIntEnabled(ftmBase, channel) == true)
616  {
617  enabledInterrupts |= (1UL << (uint32_t)channel);
618  }
619  }
620 
621  return enabledInterrupts;
622 }
623 
624 /*FUNCTION**********************************************************************
625  *
626  * Function Name : FTM_DRV_GetStatusFlags
627  * Description : This function will get the FTM status flags.
628  *
629  * Implements : FTM_DRV_GetStatusFlags_Activity
630  *END**************************************************************************/
631 uint32_t FTM_DRV_GetStatusFlags(uint32_t instance)
632 {
633  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
634  FTM_Type const * ftmBase = g_ftmBase[instance];
635  uint8_t channel = 0U;
636  uint32_t statusFlags = 0U;
637 
638  /* Check the timer flag */
639  if (FTM_DRV_HasTimerOverflowed(ftmBase) == true)
640  {
641  statusFlags |= (uint32_t)FTM_TIME_OVER_FLOW_FLAG;
642  }
643 
644  /* Check fault flag */
645  if (FTM_DRV_GetDetectedFaultInput(ftmBase) == true)
646  {
647  statusFlags |= (uint32_t)FTM_FAULT_FLAG;
648  }
649 
650  /* Check reload flag */
651  if (FTM_DRV_GetReloadFlag(ftmBase) == true)
652  {
653  statusFlags |= (uint32_t)FTM_RELOAD_FLAG;
654  }
655 
656  /* Check channel trigger flag */
657  if (FTM_DRV_IsChnTriggerGenerated(ftmBase) == true)
658  {
659  statusFlags |= (uint32_t)FTM_CHANNEL_TRIGGER_FLAG;
660  }
661 
662  /* Lower 8 bits contain the channel status flags */
663  for (channel = 0U; channel < FEATURE_FTM_CHANNEL_COUNT; channel++)
664  {
665  if (FTM_DRV_HasChnEventOccurred(ftmBase, channel) == true)
666  {
667  statusFlags |= (1UL << (uint32_t)channel);
668  }
669  }
670 
671  return statusFlags;
672 }
673 
674 /*FUNCTION**********************************************************************
675  *
676  * Function Name : FTM_DRV_ClearStatusFlags
677  * Description : This function is used to clear the FTM status flags.
678  *
679  * Implements : FTM_DRV_ClearStatusFlags_Activity
680  *END**************************************************************************/
681 void FTM_DRV_ClearStatusFlags(uint32_t instance,
682  uint32_t flagMask)
683 {
684  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
685  FTM_Type * ftmBase = g_ftmBase[instance];
686  uint32_t chnlMask = (flagMask & 0x000000FFU);
687  uint8_t channel = 0U;
688 
689  /* Clear the timer overflow flag by writing a 0 to the bit while it is set */
690  if ((flagMask & (uint32_t)FTM_TIME_OVER_FLOW_FLAG) != 0x0U)
691  {
692  FTM_DRV_ClearTimerOverflow(ftmBase);
693  }
694 
695  /* Clear fault flag by writing a 0 to the bit while it is set */
696  if ((flagMask & (uint32_t)FTM_FAULT_FLAG) != 0x0U)
697  {
698  FTM_DRV_ClearFaultsIsr(ftmBase);
699  }
700 
701  /* Check reload flag by writing a 0 to the bit while it is set */
702  if ((flagMask & (uint32_t)FTM_RELOAD_FLAG) != 0x0U)
703  {
704  FTM_DRV_ClearReloadFlag(ftmBase);
705  }
706 
707  /* Clear channel trigger flag */
708  if ((flagMask & (uint32_t)FTM_CHANNEL_TRIGGER_FLAG) != 0x0U)
709  {
710  FTM_DRV_ClearChnTriggerFlag(ftmBase);
711  }
712 
713  /* Clear the channel status flags by writing a 0 to the bit */
714  for (channel = 0U; channel < FEATURE_FTM_CHANNEL_COUNT; channel++)
715  {
716  if ((chnlMask & 0x00000001U) != 0x0U)
717  {
718  FTM_DRV_ClearChnEventStatus(ftmBase, channel);
719  }
720  chnlMask = chnlMask >> 1U;
721  }
722 }
723 
724 /*FUNCTION**********************************************************************
725  *
726  * Function Name : FTM_DRV_GetFrequency
727  * Description : Retrieves the frequency of the clock source feeding the FTM counter.
728  * Function will return a 0 if no clock source is selected and the FTM counter is disabled.
729  * The returned value is clock sources for the FTM counter.
730  *
731  * Implements : FTM_DRV_GetFrequency_Activity
732  *END**************************************************************************/
733 uint32_t FTM_DRV_GetFrequency(uint32_t instance)
734 {
735  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
736  FTM_Type const * ftmBase = g_ftmBase[instance];
737  status_t returnCode = STATUS_SUCCESS;
738  clock_names_t ftmClkName;
739  uint8_t clkPs;
740  uint32_t frequency = 0U;
741  const ftm_state_t * state = ftmStatePtr[instance];
742  clkPs = (uint8_t)(1U << FTM_DRV_GetClockPs(ftmBase));
743 
744  switch (state->ftmClockSource)
745  {
747  returnCode = CLOCK_SYS_GetFreq(g_ftmExtClockSel[instance][1], &frequency);
748  if (0U == frequency)
749  {
750  ftmClkName = g_ftmExtClockSel[instance][0];
751  }
752  else
753  {
754  ftmClkName = g_ftmExtClockSel[instance][1];
755  }
756 
757  /* Get the clock frequency value */
758  returnCode = CLOCK_SYS_GetFreq(ftmClkName, &frequency);
759  break;
761  /* Get the clock frequency value */
762  returnCode = CLOCK_SYS_GetFreq(SIM_RTCCLK_CLK, &frequency);
763  break;
765  /* Get the clock frequency value */
766  returnCode = CLOCK_SYS_GetFreq(CORE_CLK, &frequency);
767  break;
768  default:
769  /* Nothing to do */
770  break;
771  }
772 
773  /* Checks the functional clock of FTM module */
774  (void)returnCode;
775  DEV_ASSERT(returnCode == STATUS_SUCCESS);
776 
777  return (uint32_t)(frequency / clkPs);
778 }
779 
780 /*FUNCTION**********************************************************************
781  *
782  * Function Name : FTM_DRV_ConvertFreqToPeriodTicks
783  * Description : This function converts the input parameters representing
784  * frequency in Hz to a period value in ticks needed by the hardware timer.
785  *
786  * Implements : FTM_DRV_ConvertFreqToPeriodTicks_Activity
787  *END**************************************************************************/
788 uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance,
789  uint32_t freqencyHz)
790 {
791  DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
792  DEV_ASSERT(freqencyHz != 0U);
793  uint32_t uFTMhz;
794  const ftm_state_t * state = ftmStatePtr[instance];
795  uFTMhz = state->ftmSourceClockFrequency;
796 
797  return (uint16_t)(uFTMhz / freqencyHz);
798 }
799 
800 /*******************************************************************************
801 * EOF
802 ******************************************************************************/
const IRQn_Type g_ftmReloadIrqId[FTM_INSTANCE_COUNT]
Definition: ftm_common.c:77
const IRQn_Type g_ftmFaultIrqId[FTM_INSTANCE_COUNT]
Definition: ftm_common.c:75
ftm_reg_update_t initCounterSync
Definition: ftm_common.h:425
#define FTM_Reload_IRQS
Definition: S32K118.h:3899
status_t FTM_DRV_SetSoftwareOutputChannelControl(uint32_t instance, uint8_t channelsMask, bool softwareTrigger)
This function will configure which output channel can be software controlled.
Definition: ftm_common.c:301
ic_callback_t channelsCallbacks[(8U)]
Definition: ftm_common.h:399
ftm_pwm_sync_t syncMethod
Definition: ftm_common.h:438
FlexTimer state structure of the driver.
Definition: ftm_common.h:391
ftm_state_t * ftmStatePtr[FTM_INSTANCE_COUNT]
Pointer to runtime state structure.
Definition: ftm_common.c:84
status_t FTM_DRV_SetSync(uint32_t instance, const ftm_pwm_sync_t *param)
This function configures sync mechanism for some FTM registers (MOD, CNINT, HCR, CnV, OUTMASK, INVCTRL, SWOCTRL).
Definition: ftm_common.c:409
#define FTM_IRQS
Definition: S32K118.h:3895
ftm_bdm_mode_t BDMMode
Definition: ftm_common.h:444
bool hardwareSync2
Definition: ftm_common.h:416
#define FEATURE_FTM_CHANNEL_COUNT
Configuration structure that the user needs to set.
Definition: ftm_common.h:436
uint16_t ftmPeriod
Definition: ftm_common.h:395
FlexTimer Registers sync parameters Please don't use software and hardware trigger simultaneously Imp...
Definition: ftm_common.h:408
uint16_t measurementResults[(8U)]
Definition: ftm_common.h:397
status_t FTM_DRV_SetInitialCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the initial counter value. The counter will get this value after an overflow ...
Definition: ftm_common.c:237
status_t FTM_DRV_SetOutputlevel(uint32_t instance, uint8_t channel, uint8_t level)
This function will set the channel edge or level on the selection of the channel mode.
Definition: ftm_common.c:385
bool hardwareSync1
Definition: ftm_common.h:414
const IRQn_Type g_ftmOverflowIrqId[FTM_INSTANCE_COUNT]
Definition: ftm_common.c:76
bool enableNotification[(8U)]
Definition: ftm_common.h:400
status_t FTM_DRV_SetHalfCycleReloadPoint(uint32_t instance, uint16_t reloadPoint, bool softwareTrigger)
This function configure the value of the counter which will generates an reload point.
Definition: ftm_common.c:258
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
const IRQn_Type g_ftmIrqId[FTM_INSTANCE_COUNT][FEATURE_FTM_CHANNEL_COUNT]
Interrupt vectors for the FTM peripheral.
Definition: ftm_common.c:74
#define DEV_ASSERT(x)
Definition: devassert.h:77
uint32_t FTM_DRV_GetFrequency(uint32_t instance)
Retrieves the frequency of the clock source feeding the FTM counter.
Definition: ftm_common.c:733
uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance, uint32_t freqencyHz)
This function is used to covert the given frequency to period in ticks.
Definition: ftm_common.c:788
void FTM_DRV_ClearStatusFlags(uint32_t instance, uint32_t flagMask)
This function is used to clear the FTM status flags.
Definition: ftm_common.c:681
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
ftm_clock_source_t ftmClockSource
Definition: ftm_common.h:393
bool hardwareSync0
Definition: ftm_common.h:412
#define FTM_Fault_IRQS
Definition: S32K118.h:3897
ftm_pwm_sync_mode_t syncPoint
Definition: ftm_common.h:427
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:44
IRQn_Type
Defines the Interrupt Numbers definitions.
Definition: S32K118.h:188
bool maxLoadingPoint
Definition: ftm_common.h:418
#define FTM_INSTANCE_COUNT
Definition: S32K118.h:3868
status_t FTM_DRV_SetInvertingControl(uint32_t instance, uint8_t channelsPairMask, bool softwareTrigger)
This function will configure if the second channel of a pair will be inverted or not.
Definition: ftm_common.c:344
bool enableInitializationTrigger
Definition: ftm_common.h:447
#define FTM_Overflow_IRQS
Definition: S32K118.h:3898
ftm_reg_update_t inverterSync
Definition: ftm_common.h:422
ftm_config_mode_t ftmMode
Definition: ftm_common.h:394
status_t FTM_DRV_EnableInterrupts(uint32_t instance, uint32_t interruptMask)
This function will enable the generation a list of interrupts. It includes the FTM overflow interrupt...
Definition: ftm_common.c:485
status_t FTM_DRV_SetModuloCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the maximum counter value.
Definition: ftm_common.c:364
ftm_config_mode_t ftmMode
Definition: ftm_common.h:440
void * channelsCallbacksParams[(8U)]
Definition: ftm_common.h:398
uint32_t FTM_DRV_GetEnabledInterrupts(uint32_t instance)
This function will get the enabled FTM interrupts.
Definition: ftm_common.c:585
status_t FTM_DRV_Deinit(uint32_t instance)
Shuts down the FTM driver.
Definition: ftm_common.c:196
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
status_t FTM_DRV_MaskOutputChannels(uint32_t instance, uint32_t channelsMask, bool softwareTrigger)
This function will mask the output of the channels and at match events will be ignored by the masked ...
Definition: ftm_common.c:216
ftm_reg_update_t maskRegSync
Definition: ftm_common.h:424
static void FTM_DRV_ClearChnEventStatus(FTM_Type *const ftmBase, uint8_t channel)
Clears the FTM peripheral timer all channel event status.
Definition: ftm_common.h:796
static const clock_names_t g_ftmExtClockSel[FTM_INSTANCE_COUNT][2]
Select external clock pin or clock source for peripheral.
Definition: ftm_common.c:87
bool minLoadingPoint
Definition: ftm_common.h:420
bool autoClearTrigger
Definition: ftm_common.h:426
#define FTM_BASE_PTRS
Definition: S32K118.h:3883
status_t FTM_DRV_Init(uint32_t instance, const ftm_user_config_t *info, ftm_state_t *state)
Initializes the FTM driver.
Definition: ftm_common.c:117
status_t FTM_DRV_SetSoftOutChnValue(uint32_t instance, uint8_t channelsValues, bool softwareTrigger)
This function will force the output value of a channel to a specific value. Before using this functio...
Definition: ftm_common.c:281
clock_names_t
Clock names.
uint32_t FTM_DRV_GetStatusFlags(uint32_t instance)
This function will get the FTM status flags.
Definition: ftm_common.c:631
void FTM_DRV_DisableInterrupts(uint32_t instance, uint32_t interruptMask)
This function is used to disable some interrupts.
Definition: ftm_common.c:536
ftm_clock_source_t ftmClockSource
Definition: ftm_common.h:443
uint32_t ftmSourceClockFrequency
Definition: ftm_common.h:396
ftm_reg_update_t outRegSync
Definition: ftm_common.h:423
status_t FTM_DRV_SetAllChnSoftwareOutputControl(uint32_t instance, uint8_t channelMask, uint8_t channelValueMask)
This function will control list of channels by software to force the output to specified value...
Definition: ftm_common.c:321
ftm_clock_ps_t ftmPrescaler
Definition: ftm_common.h:441
FTM_Type *const g_ftmBase[FTM_INSTANCE_COUNT]
Table of base addresses for FTM instances.
Definition: ftm_common.c:71