This module covers interrupt number allocation.
Macros | |
#define | NUMBER_OF_INT_VECTORS 48u |
Enumerations | |
enum | IRQn_Type { NotAvail_IRQn = -128, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, PendSV_IRQn = -2, SysTick_IRQn = -1, DMA0_IRQn = 0u, DMA1_IRQn = 1u, DMA2_IRQn = 2u, DMA3_IRQn = 3u, DMA_Error_IRQn = 4u, ERM_fault_IRQn = 5u, RTC_IRQn = 6u, RTC_Seconds_IRQn = 7u, LPTMR0_IRQn = 8u, PORT_IRQn = 9u, CAN0_ORed_Err_Wakeup_IRQn = 10u, CAN0_ORed_0_31_MB_IRQn = 11u, FTM0_Ch0_7_IRQn = 12u, FTM0_Fault_IRQn = 13u, FTM0_Ovf_Reload_IRQn = 14u, FTM1_Ch0_7_IRQn = 15u, FTM1_Fault_IRQn = 16u, FTM1_Ovf_Reload_IRQn = 17u, FTFC_IRQn = 18u, PDB0_IRQn = 19u, LPIT0_IRQn = 20u, SCG_CMU_LVD_LVWSCG_IRQn = 21u, WDOG_IRQn = 22u, RCM_IRQn = 23u, LPI2C0_Master_Slave_IRQn = 24u, FLEXIO_IRQn = 25u, LPSPI0_IRQn = 26u, LPSPI1_IRQn = 27u, ADC0_IRQn = 28u, CMP0_IRQn = 29u, LPUART1_RxTx_IRQn = 30u, LPUART0_RxTx_IRQn = 31u } |
Defines the Interrupt Numbers definitions. More... | |
#define NUMBER_OF_INT_VECTORS 48u |
enum IRQn_Type |
Defines the Interrupt Numbers definitions.
This enumeration is used to configure the interrupts.
Implements : IRQn_Type_Class