clock_S32K1xx.h File Reference
#include "device_registers.h"
#include "status.h"
#include <stdint.h>
#include <stdbool.h>

Go to the source code of this file.

Data Structures

struct  sim_clock_out_config_t
 SIM ClockOut configuration. Implements sim_clock_out_config_t_Class. More...
 
struct  sim_lpo_clock_config_t
 SIM LPO Clocks configuration. Implements sim_lpo_clock_config_t_Class. More...
 
struct  sim_tclk_config_t
 SIM Platform Gate Clock configuration. Implements sim_tclk_config_t_Class. More...
 
struct  sim_plat_gate_config_t
 SIM Platform Gate Clock configuration. Implements sim_plat_gate_config_t_Class. More...
 
struct  sim_qspi_ref_clk_gating_t
 SIM QSPI reference clock gating. Implements sim_qspi_ref_clk_gating_t_Class. More...
 
struct  sim_trace_clock_config_t
 SIM Debug Trace clock configuration. Implements sim_trace_clock_config_t_Class. More...
 
struct  sim_clock_config_t
 SIM configure structure. Implements sim_clock_config_t_Class. More...
 
struct  scg_system_clock_config_t
 SCG system clock configuration. Implements scg_system_clock_config_t_Class. More...
 
struct  scg_sosc_config_t
 SCG system OSC configuration. Implements scg_sosc_config_t_Class. More...
 
struct  scg_sirc_config_t
 SCG slow IRC clock configuration. Implements scg_sirc_config_t_Class. More...
 
struct  scg_firc_config_t
 SCG fast IRC clock configuration. Implements scg_firc_config_t_Class. More...
 
struct  scg_spll_config_t
 SCG system PLL configuration. Implements scg_spll_config_t_Class. More...
 
struct  scg_rtc_config_t
 SCG RTC configuration. Implements scg_rtc_config_t_Class. More...
 
struct  scg_clock_mode_config_t
 SCG Clock Mode Configuration structure. Implements scg_clock_mode_config_t_Class. More...
 
struct  scg_clockout_config_t
 SCG ClockOut Configuration structure. Implements scg_clockout_config_t_Class. More...
 
struct  scg_config_t
 SCG configure structure. Implements scg_config_t_Class. More...
 
struct  peripheral_clock_config_t
 PCC peripheral instance clock configuration. Implements peripheral_clock_config_t_Class. More...
 
struct  pcc_config_t
 PCC configuration. Implements pcc_config_t_Class. More...
 
struct  pmc_lpo_clock_config_t
 PMC LPO configuration. More...
 
struct  pmc_config_t
 PMC configure structure. More...
 
struct  clock_manager_user_config_t
 Clock configuration structure. Implements clock_manager_user_config_t_Class. More...
 
struct  module_clk_config_t
 module clock configuration. Implements module_clk_config_t_Class More...
 
struct  sys_clk_config_t
 System clock configuration. Implements sys_clk_config_t_Class. More...
 
struct  clock_source_config_t
 Clock source configuration. Implements clock_source_config_t_Class. More...
 

Macros

#define NUMBER_OF_TCLK_INPUTS   3U
 TClk clock frequency. More...
 
#define SYS_CLK_MAX_NO   3U
 The maximum number of system clock dividers and system clock divider indexes. More...
 
#define CORE_CLK_INDEX   0U
 
#define BUS_CLK_INDEX   1U
 
#define SLOW_CLK_INDEX   2U
 
#define CLK_SRC_OFF   0x00U
 
#define CLK_SRC_SOSC   0x01U
 
#define CLK_SRC_SIRC   0x02U
 
#define CLK_SRC_FIRC   0x03U
 
#define CLK_SRC_SPLL   0x06U
 
#define CLK_SRC_SOSC_DIV1   0x01U
 
#define CLK_SRC_SIRC_DIV1   0x02U
 
#define CLK_SRC_FIRC_DIV1   0x03U
 
#define CLK_SRC_SPLL_DIV1   0x06U
 
#define CLK_SRC_SOSC_DIV2   0x01U
 
#define CLK_SRC_SIRC_DIV2   0x02U
 
#define CLK_SRC_FIRC_DIV2   0x03U
 
#define CLK_SRC_SPLL_DIV2   0x06U
 

Typedefs

typedef uint8_t peripheral_clock_source_t
 PCC clock source select Implements peripheral_clock_source_t_Class. More...
 

Enumerations

enum  sim_rtc_clk_sel_src_t { SIM_RTCCLK_SEL_SOSCDIV1_CLK = 0x0U, SIM_RTCCLK_SEL_LPO_32K = 0x1U, SIM_RTCCLK_SEL_RTC_CLKIN = 0x2U, SIM_RTCCLK_SEL_FIRCDIV1_CLK = 0x3U }
 SIM CLK32KSEL clock source select Implements sim_rtc_clk_sel_src_t_Class. More...
 
enum  sim_lpoclk_sel_src_t { SIM_LPO_CLK_SEL_LPO_128K = 0x0, SIM_LPO_CLK_SEL_NO_CLOCK = 0x1, SIM_LPO_CLK_SEL_LPO_32K = 0x2, SIM_LPO_CLK_SEL_LPO_1K = 0x3 }
 SIM LPOCLKSEL clock source select Implements sim_lpoclk_sel_src_t_Class. More...
 
enum  sim_clkout_src_t {
  SIM_CLKOUT_SEL_SYSTEM_SCG_CLKOUT = 0U, SIM_CLKOUT_SEL_SYSTEM_SOSC_DIV2_CLK = 2U, SIM_CLKOUT_SEL_SYSTEM_SIRC_DIV2_CLK = 4U, SIM_CLKOUT_SEL_SYSTEM_FIRC_DIV2_CLK = 6U,
  SIM_CLKOUT_SEL_SYSTEM_HCLK = 7U, SIM_CLKOUT_SEL_SYSTEM_SPLL_DIV2_CLK = 8U, SIM_CLKOUT_SEL_SYSTEM_BUS_CLK = 9U, SIM_CLKOUT_SEL_SYSTEM_LPO_128K_CLK = 10U,
  SIM_CLKOUT_SEL_SYSTEM_LPO_CLK = 12U, SIM_CLKOUT_SEL_SYSTEM_RTC_CLK = 14U
}
 SIM CLKOUT select. More...
 
enum  sim_clkout_div_t {
  SIM_CLKOUT_DIV_BY_1 = 0x0U, SIM_CLKOUT_DIV_BY_2 = 0x1U, SIM_CLKOUT_DIV_BY_3 = 0x2U, SIM_CLKOUT_DIV_BY_4 = 0x3U,
  SIM_CLKOUT_DIV_BY_5 = 0x4U, SIM_CLKOUT_DIV_BY_6 = 0x5U, SIM_CLKOUT_DIV_BY_7 = 0x6U, SIM_CLKOUT_DIV_BY_8 = 0x7U
}
 SIM CLKOUT divider. More...
 
enum  clock_trace_src_t { CLOCK_TRACE_SRC_CORE_CLK = 0x0 }
 Debug trace clock source select Implements clock_trace_src_t_Class. More...
 
enum  scg_system_clock_src_t { SCG_SYSTEM_CLOCK_SRC_SYS_OSC = 1U, SCG_SYSTEM_CLOCK_SRC_SIRC = 2U, SCG_SYSTEM_CLOCK_SRC_FIRC = 3U, SCG_SYSTEM_CLOCK_SRC_NONE = 255U }
 SCG system clock source. Implements scg_system_clock_src_t_Class. More...
 
enum  scg_system_clock_div_t {
  SCG_SYSTEM_CLOCK_DIV_BY_1 = 0U, SCG_SYSTEM_CLOCK_DIV_BY_2 = 1U, SCG_SYSTEM_CLOCK_DIV_BY_3 = 2U, SCG_SYSTEM_CLOCK_DIV_BY_4 = 3U,
  SCG_SYSTEM_CLOCK_DIV_BY_5 = 4U, SCG_SYSTEM_CLOCK_DIV_BY_6 = 5U, SCG_SYSTEM_CLOCK_DIV_BY_7 = 6U, SCG_SYSTEM_CLOCK_DIV_BY_8 = 7U,
  SCG_SYSTEM_CLOCK_DIV_BY_9 = 8U, SCG_SYSTEM_CLOCK_DIV_BY_10 = 9U, SCG_SYSTEM_CLOCK_DIV_BY_11 = 10U, SCG_SYSTEM_CLOCK_DIV_BY_12 = 11U,
  SCG_SYSTEM_CLOCK_DIV_BY_13 = 12U, SCG_SYSTEM_CLOCK_DIV_BY_14 = 13U, SCG_SYSTEM_CLOCK_DIV_BY_15 = 14U, SCG_SYSTEM_CLOCK_DIV_BY_16 = 15U
}
 SCG system clock divider value. Implements scg_system_clock_div_t_Class. More...
 
enum  scg_async_clock_div_t {
  SCG_ASYNC_CLOCK_DISABLE = 0U, SCG_ASYNC_CLOCK_DIV_BY_1 = 1U, SCG_ASYNC_CLOCK_DIV_BY_2 = 2U, SCG_ASYNC_CLOCK_DIV_BY_4 = 3U,
  SCG_ASYNC_CLOCK_DIV_BY_8 = 4U, SCG_ASYNC_CLOCK_DIV_BY_16 = 5U, SCG_ASYNC_CLOCK_DIV_BY_32 = 6U, SCG_ASYNC_CLOCK_DIV_BY_64 = 7U
}
 SCG asynchronous clock divider value. More...
 
enum  scg_sosc_monitor_mode_t { SCG_SOSC_MONITOR_DISABLE = 0U, SCG_SOSC_MONITOR_INT = 1U, SCG_SOSC_MONITOR_RESET = 2U }
 SCG system OSC monitor mode. Implements scg_sosc_monitor_mode_t_Class. More...
 
enum  scg_sosc_range_t { SCG_SOSC_RANGE_MID = 2U, SCG_SOSC_RANGE_HIGH = 3U }
 SCG OSC frequency range select Implements scg_sosc_range_t_Class. More...
 
enum  scg_sosc_gain_t { SCG_SOSC_GAIN_LOW = 0x0, SCG_SOSC_GAIN_HIGH = 0x1 }
 SCG OSC high gain oscillator select. Implements scg_sosc_gain_t_Class. More...
 
enum  scg_sosc_ext_ref_t { SCG_SOSC_REF_EXT = 0x0, SCG_SOSC_REF_OSC = 0x1 }
 SCG OSC external reference clock select. Implements scg_sosc_ext_ref_t_Class. More...
 
enum  scg_sirc_range_t { SCG_SIRC_RANGE_HIGH = 1U }
 SCG slow IRC clock frequency range. Implements scg_sirc_range_t_Class. More...
 
enum  scg_firc_range_t { SCG_FIRC_RANGE_48M }
 SCG fast IRC clock frequency range. Implements scg_firc_range_t_Class. More...
 
enum  scg_spll_monitor_mode_t { SCG_SPLL_MONITOR_DISABLE = 0U, SCG_SPLL_MONITOR_INT = 1U, SCG_SPLL_MONITOR_RESET = 2U }
 SCG system PLL monitor mode. Implements scg_spll_monitor_mode_t_Class. More...
 
enum  scg_spll_clock_prediv_t {
  SCG_SPLL_CLOCK_PREDIV_BY_1 = 0U, SCG_SPLL_CLOCK_PREDIV_BY_2 = 1U, SCG_SPLL_CLOCK_PREDIV_BY_3 = 2U, SCG_SPLL_CLOCK_PREDIV_BY_4 = 3U,
  SCG_SPLL_CLOCK_PREDIV_BY_5 = 4U, SCG_SPLL_CLOCK_PREDIV_BY_6 = 5U, SCG_SPLL_CLOCK_PREDIV_BY_7 = 6U, SCG_SPLL_CLOCK_PREDIV_BY_8 = 7U
}
 SCG system PLL predivider. More...
 
enum  scg_spll_clock_multiply_t {
  SCG_SPLL_CLOCK_MULTIPLY_BY_16 = 0U, SCG_SPLL_CLOCK_MULTIPLY_BY_17 = 1U, SCG_SPLL_CLOCK_MULTIPLY_BY_18 = 2U, SCG_SPLL_CLOCK_MULTIPLY_BY_19 = 3U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_20 = 4U, SCG_SPLL_CLOCK_MULTIPLY_BY_21 = 5U, SCG_SPLL_CLOCK_MULTIPLY_BY_22 = 6U, SCG_SPLL_CLOCK_MULTIPLY_BY_23 = 7U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_24 = 8U, SCG_SPLL_CLOCK_MULTIPLY_BY_25 = 9U, SCG_SPLL_CLOCK_MULTIPLY_BY_26 = 10U, SCG_SPLL_CLOCK_MULTIPLY_BY_27 = 11U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_28 = 12U, SCG_SPLL_CLOCK_MULTIPLY_BY_29 = 13U, SCG_SPLL_CLOCK_MULTIPLY_BY_30 = 14U, SCG_SPLL_CLOCK_MULTIPLY_BY_31 = 15U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_32 = 16U, SCG_SPLL_CLOCK_MULTIPLY_BY_33 = 17U, SCG_SPLL_CLOCK_MULTIPLY_BY_34 = 18U, SCG_SPLL_CLOCK_MULTIPLY_BY_35 = 19U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_36 = 20U, SCG_SPLL_CLOCK_MULTIPLY_BY_37 = 21U, SCG_SPLL_CLOCK_MULTIPLY_BY_38 = 22U, SCG_SPLL_CLOCK_MULTIPLY_BY_39 = 23U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_40 = 24U, SCG_SPLL_CLOCK_MULTIPLY_BY_41 = 25U, SCG_SPLL_CLOCK_MULTIPLY_BY_42 = 26U, SCG_SPLL_CLOCK_MULTIPLY_BY_43 = 27U,
  SCG_SPLL_CLOCK_MULTIPLY_BY_44 = 28U, SCG_SPLL_CLOCK_MULTIPLY_BY_45 = 29U, SCG_SPLL_CLOCK_MULTIPLY_BY_46 = 30U, SCG_SPLL_CLOCK_MULTIPLY_BY_47 = 31U
}
 SCG system PLL multiplier. More...
 
enum  peripheral_clock_frac_t { MULTIPLY_BY_ONE = 0x00U, MULTIPLY_BY_TWO = 0x01U }
 PCC fractional value select Implements peripheral_clock_frac_t_Class. More...
 
enum  peripheral_clock_divider_t {
  DIVIDE_BY_ONE = 0x00U, DIVIDE_BY_TWO = 0x01U, DIVIDE_BY_THREE = 0x02U, DIVIDE_BY_FOUR = 0x03U,
  DIVIDE_BY_FIVE = 0x04U, DIVIDE_BY_SIX = 0x05U, DIVIDE_BY_SEVEN = 0x06U, DIVIDE_BY_EIGTH = 0x07U
}
 PCC divider value select Implements peripheral_clock_divider_t_Class. More...
 
enum  pwr_modes_t {
  NO_MODE = 0U, RUN_MODE = (1U<<0U), VLPR_MODE = (1U<<1U), HSRUN_MODE = (1U<<2U),
  STOP_MODE = (1U<<3U), VLPS_MODE = (1U<<4U), ALL_MODES = 0x7FFFFFFF
}
 Power mode. Implements pwr_modes_t_Class. More...
 
enum  xosc_ref_t { XOSC_EXT_REF = 0U, XOSC_INT_OSC = 1U }
 XOSC reference clock select (internal oscillator is bypassed or not) Implements xosc_ref_t_Class. More...
 
SCG Clockout.
enum  scg_clockout_src_t {
  SCG_CLOCKOUT_SRC_SCG_SLOW = 0U, SCG_CLOCKOUT_SRC_SOSC = 1U, SCG_CLOCKOUT_SRC_SIRC = 2U, SCG_CLOCKOUT_SRC_FIRC = 3U,
  SCG_CLOCKOUT_SRC_SPLL = 6U
}
 SCG ClockOut type. Implements scg_clockout_src_t_Class. More...
 

Functions

status_t CLOCK_DRV_Init (clock_manager_user_config_t const *config)
 Initialize clocking modules. More...
 
status_t CLOCK_DRV_GetFreq (clock_names_t clockName, uint32_t *frequency)
 Return frequency. More...
 
void CLOCK_DRV_SetModuleClock (clock_names_t clockName, const module_clk_config_t *moduleClkConfig)
 Configures module clock. More...
 
status_t CLOCK_DRV_SetSystemClock (const pwr_modes_t *mode, const sys_clk_config_t *sysClkConfig)
 Configures the system clocks. More...
 
void CLOCK_DRV_GetSystemClockSource (sys_clk_config_t *sysClkConfig)
 Gets the system clock source. More...
 
status_t CLOCK_DRV_SetClockSource (clock_names_t clockName, const clock_source_config_t *clkSrcConfig)
 This function configures a clock source. More...
 

Variables

const uint8_t peripheralFeaturesList [CLOCK_NAME_COUNT]
 Peripheral features list Constant array storing the mappings between clock names of the peripherals and feature lists. More...
 
uint32_t g_TClkFreq [3U]
 
uint32_t g_xtal0ClkFreq
 EXTAL0 clock frequency. More...
 
uint32_t g_RtcClkInFreq
 RTC_CLKIN clock frequency. More...