42 #if (defined(OC_PAL_OVER_FTM))
44 #if (OC_PAL_INSTANCES_MAX > 0U)
45 #if (FEATURE_FTM_HAS_NUM_IRQS_CHANS == 1U)
46 void FTM0_Ch0_7_IrqHandler(
void)
52 for (index = 0U; index < OC_PAL_NUM_OF_CHANNEL_MAX;index++)
62 void FTM0_Ch0_Ch1_IrqHandler(
void)
68 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
69 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
71 if (chan0EnabledInt && chan0IntFlag)
76 if (chan1EnabledInt && chan1IntFlag)
82 void FTM0_Ch2_Ch3_IrqHandler(
void)
88 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
89 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
91 if (chan2EnabledInt && chan2IntFlag)
96 if (chan3EnabledInt && chan3IntFlag)
102 void FTM0_Ch4_Ch5_IrqHandler(
void)
108 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
109 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
111 if (chan4EnabledInt && chan4IntFlag)
116 if (chan5EnabledInt && chan5IntFlag)
122 void FTM0_Ch6_Ch7_IrqHandler(
void)
128 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
129 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
131 if (chan6EnabledInt && chan6IntFlag)
136 if (chan7EnabledInt && chan7IntFlag)
144 #if (OC_PAL_INSTANCES_MAX > 1U)
145 #if (FEATURE_FTM_HAS_NUM_IRQS_CHANS == 1U)
146 void FTM1_Ch0_7_IrqHandler(
void)
152 for (index = 0U; index < OC_PAL_NUM_OF_CHANNEL_MAX;index++)
162 void FTM1_Ch0_Ch1_IrqHandler(
void)
168 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
169 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
171 if (chan0EnabledInt && chan0IntFlag)
176 if (chan1EnabledInt && chan1IntFlag)
182 void FTM1_Ch2_Ch3_IrqHandler(
void)
188 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
189 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
191 if (chan2EnabledInt && chan2IntFlag)
196 if (chan3EnabledInt && chan3IntFlag)
202 void FTM1_Ch4_Ch5_IrqHandler(
void)
208 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
209 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
211 if (chan4EnabledInt && chan4IntFlag)
216 if (chan5EnabledInt && chan5IntFlag)
222 void FTM1_Ch6_Ch7_IrqHandler(
void)
228 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
229 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
231 if (chan6EnabledInt && chan6IntFlag)
236 if (chan7EnabledInt && chan7IntFlag)
244 #if (OC_PAL_INSTANCES_MAX > 2U)
245 void FTM2_Ch0_Ch1_IrqHandler(
void)
251 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
252 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
254 if (chan0EnabledInt && chan0IntFlag)
259 if (chan1EnabledInt && chan1IntFlag)
265 void FTM2_Ch2_Ch3_IrqHandler(
void)
271 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
272 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
274 if (chan2EnabledInt && chan2IntFlag)
279 if (chan3EnabledInt && chan3IntFlag)
285 void FTM2_Ch4_Ch5_IrqHandler(
void)
291 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
292 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
294 if (chan4EnabledInt && chan4IntFlag)
299 if (chan5EnabledInt && chan5IntFlag)
305 void FTM2_Ch6_Ch7_IrqHandler(
void)
311 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
312 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
314 if (chan6EnabledInt && chan6IntFlag)
319 if (chan7EnabledInt && chan7IntFlag)
326 #if (OC_PAL_INSTANCES_MAX > 3U)
327 void FTM3_Ch0_Ch1_IrqHandler(
void)
333 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
334 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
336 if (chan0EnabledInt && chan0IntFlag)
341 if (chan1EnabledInt && chan1IntFlag)
347 void FTM3_Ch2_Ch3_IrqHandler(
void)
353 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
354 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
356 if (chan2EnabledInt && chan2IntFlag)
361 if (chan3EnabledInt && chan3IntFlag)
367 void FTM3_Ch4_Ch5_IrqHandler(
void)
373 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
374 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
376 if (chan4EnabledInt && chan4IntFlag)
381 if (chan5EnabledInt && chan5IntFlag)
387 void FTM3_Ch6_Ch7_IrqHandler(
void)
393 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
394 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
396 if (chan6EnabledInt && chan6IntFlag)
401 if (chan7EnabledInt && chan7IntFlag)
408 #if (OC_PAL_INSTANCES_MAX > 4U)
409 void FTM4_Ch0_Ch1_IrqHandler(
void)
415 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
416 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
418 if (chan0EnabledInt && chan0IntFlag)
423 if (chan1EnabledInt && chan1IntFlag)
429 void FTM4_Ch2_Ch3_IrqHandler(
void)
435 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
436 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
438 if (chan2EnabledInt && chan2IntFlag)
443 if (chan3EnabledInt && chan3IntFlag)
449 void FTM4_Ch4_Ch5_IrqHandler(
void)
455 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
456 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
458 if (chan4EnabledInt && chan4IntFlag)
463 if (chan5EnabledInt && chan5IntFlag)
469 void FTM4_Ch6_Ch7_IrqHandler(
void)
475 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
476 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
478 if (chan6EnabledInt && chan6IntFlag)
483 if (chan7EnabledInt && chan7IntFlag)
490 #if (OC_PAL_INSTANCES_MAX > 5U)
491 void FTM5_Ch0_Ch1_IrqHandler(
void)
497 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
498 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
500 if (chan0EnabledInt && chan0IntFlag)
505 if (chan1EnabledInt && chan1IntFlag)
511 void FTM5_Ch2_Ch3_IrqHandler(
void)
517 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
518 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
520 if (chan2EnabledInt && chan2IntFlag)
525 if (chan3EnabledInt && chan3IntFlag)
531 void FTM5_Ch4_Ch5_IrqHandler(
void)
537 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
538 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
540 if (chan4EnabledInt && chan4IntFlag)
545 if (chan5EnabledInt && chan5IntFlag)
551 void FTM5_Ch6_Ch7_IrqHandler(
void)
557 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
558 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
560 if (chan6EnabledInt && chan6IntFlag)
565 if (chan7EnabledInt && chan7IntFlag)
572 #if (OC_PAL_INSTANCES_MAX > 6U)
573 void FTM6_Ch0_Ch1_IrqHandler(
void)
579 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
580 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
582 if (chan0EnabledInt && chan0IntFlag)
587 if (chan1EnabledInt && chan1IntFlag)
593 void FTM6_Ch2_Ch3_IrqHandler(
void)
599 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
600 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
602 if (chan2EnabledInt && chan2IntFlag)
607 if (chan3EnabledInt && chan3IntFlag)
613 void FTM6_Ch4_Ch5_IrqHandler(
void)
619 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
620 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
622 if (chan4EnabledInt && chan4IntFlag)
627 if (chan5EnabledInt && chan5IntFlag)
633 void FTM6_Ch6_Ch7_IrqHandler(
void)
639 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
640 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
642 if (chan6EnabledInt && chan6IntFlag)
647 if (chan7EnabledInt && chan7IntFlag)
654 #if (OC_PAL_INSTANCES_MAX > 7U)
655 void FTM7_Ch0_Ch1_IrqHandler(
void)
661 bool chan0EnabledInt = ((enabledInterrupts & (1UL << 0U)) != 0U) ?
true :
false;
662 bool chan1EnabledInt = ((enabledInterrupts & (1UL << 1U)) != 0U) ?
true :
false;
664 if (chan0EnabledInt && chan0IntFlag)
669 if (chan1EnabledInt && chan1IntFlag)
675 void FTM7_Ch2_Ch3_IrqHandler(
void)
681 bool chan2EnabledInt = ((enabledInterrupts & (1UL << 2U)) != 0U) ?
true :
false;
682 bool chan3EnabledInt = ((enabledInterrupts & (1UL << 3U)) != 0U) ?
true :
false;
684 if (chan2EnabledInt && chan2IntFlag)
689 if (chan3EnabledInt && chan3IntFlag)
695 void FTM7_Ch4_Ch5_IrqHandler(
void)
701 bool chan4EnabledInt = ((enabledInterrupts & (1UL << 4U)) != 0U) ?
true :
false;
702 bool chan5EnabledInt = ((enabledInterrupts & (1UL << 5U)) != 0U) ?
true :
false;
704 if (chan4EnabledInt && chan4IntFlag)
709 if (chan5EnabledInt && chan5IntFlag)
715 void FTM7_Ch6_Ch7_IrqHandler(
void)
721 bool chan6EnabledInt = ((enabledInterrupts & (1UL << 6U)) != 0U) ?
true :
false;
722 bool chan7EnabledInt = ((enabledInterrupts & (1UL << 7U)) != 0U) ?
true :
false;
724 if (chan6EnabledInt && chan6IntFlag)
729 if (chan7EnabledInt && chan7IntFlag)
739 #if (OC_PAL_INSTANCES_MAX > 0U)
740 #if (FEATURE_FTM_HAS_NUM_IRQS_CHANS == 1U)
741 {FTM0_Ch0_7_IrqHandler,
742 FTM0_Ch0_7_IrqHandler,
743 FTM0_Ch0_7_IrqHandler,
744 FTM0_Ch0_7_IrqHandler,
745 FTM0_Ch0_7_IrqHandler,
746 FTM0_Ch0_7_IrqHandler,
747 FTM0_Ch0_7_IrqHandler,
748 FTM0_Ch0_7_IrqHandler},
750 {FTM0_Ch0_Ch1_IrqHandler,
751 FTM0_Ch0_Ch1_IrqHandler,
752 FTM0_Ch2_Ch3_IrqHandler,
753 FTM0_Ch2_Ch3_IrqHandler,
754 FTM0_Ch4_Ch5_IrqHandler,
755 FTM0_Ch4_Ch5_IrqHandler,
756 FTM0_Ch6_Ch7_IrqHandler,
757 FTM0_Ch6_Ch7_IrqHandler},
760 #if (OC_PAL_INSTANCES_MAX > 1U)
761 #if (FEATURE_FTM_HAS_NUM_IRQS_CHANS == 1U)
762 {FTM1_Ch0_7_IrqHandler,
763 FTM1_Ch0_7_IrqHandler,
764 FTM1_Ch0_7_IrqHandler,
765 FTM1_Ch0_7_IrqHandler,
766 FTM1_Ch0_7_IrqHandler,
767 FTM1_Ch0_7_IrqHandler,
768 FTM1_Ch0_7_IrqHandler,
769 FTM1_Ch0_7_IrqHandler},
771 {FTM1_Ch0_Ch1_IrqHandler,
772 FTM1_Ch0_Ch1_IrqHandler,
773 FTM1_Ch2_Ch3_IrqHandler,
774 FTM1_Ch2_Ch3_IrqHandler,
775 FTM1_Ch4_Ch5_IrqHandler,
776 FTM1_Ch4_Ch5_IrqHandler,
777 FTM1_Ch6_Ch7_IrqHandler,
778 FTM1_Ch6_Ch7_IrqHandler},
781 #if (OC_PAL_INSTANCES_MAX > 2U)
782 {FTM2_Ch0_Ch1_IrqHandler,
783 FTM2_Ch0_Ch1_IrqHandler,
784 FTM2_Ch2_Ch3_IrqHandler,
785 FTM2_Ch2_Ch3_IrqHandler,
786 FTM2_Ch4_Ch5_IrqHandler,
787 FTM2_Ch4_Ch5_IrqHandler,
788 FTM2_Ch6_Ch7_IrqHandler,
789 FTM2_Ch6_Ch7_IrqHandler},
791 #if (OC_PAL_INSTANCES_MAX > 3U)
792 {FTM3_Ch0_Ch1_IrqHandler,
793 FTM3_Ch0_Ch1_IrqHandler,
794 FTM3_Ch2_Ch3_IrqHandler,
795 FTM3_Ch2_Ch3_IrqHandler,
796 FTM3_Ch4_Ch5_IrqHandler,
797 FTM3_Ch4_Ch5_IrqHandler,
798 FTM3_Ch6_Ch7_IrqHandler,
799 FTM3_Ch6_Ch7_IrqHandler},
801 #if (OC_PAL_INSTANCES_MAX > 4U)
802 {FTM4_Ch0_Ch1_IrqHandler,
803 FTM4_Ch0_Ch1_IrqHandler,
804 FTM4_Ch2_Ch3_IrqHandler,
805 FTM4_Ch2_Ch3_IrqHandler,
806 FTM4_Ch4_Ch5_IrqHandler,
807 FTM4_Ch4_Ch5_IrqHandler,
808 FTM4_Ch6_Ch7_IrqHandler,
809 FTM4_Ch6_Ch7_IrqHandler},
811 #if (OC_PAL_INSTANCES_MAX > 5U)
812 {FTM5_Ch0_Ch1_IrqHandler,
813 FTM5_Ch0_Ch1_IrqHandler,
814 FTM5_Ch2_Ch3_IrqHandler,
815 FTM5_Ch2_Ch3_IrqHandler,
816 FTM5_Ch4_Ch5_IrqHandler,
817 FTM5_Ch4_Ch5_IrqHandler,
818 FTM5_Ch6_Ch7_IrqHandler,
819 FTM5_Ch6_Ch7_IrqHandler},
821 #if (OC_PAL_INSTANCES_MAX > 6U)
822 {FTM6_Ch0_Ch1_IrqHandler,
823 FTM6_Ch0_Ch1_IrqHandler,
824 FTM6_Ch2_Ch3_IrqHandler,
825 FTM6_Ch2_Ch3_IrqHandler,
826 FTM6_Ch4_Ch5_IrqHandler,
827 FTM6_Ch4_Ch5_IrqHandler,
828 FTM6_Ch6_Ch7_IrqHandler,
829 FTM6_Ch6_Ch7_IrqHandler},
831 #if (OC_PAL_INSTANCES_MAX > 7U)
832 {FTM7_Ch0_Ch1_IrqHandler,
833 FTM7_Ch0_Ch1_IrqHandler,
834 FTM7_Ch2_Ch3_IrqHandler,
835 FTM7_Ch2_Ch3_IrqHandler,
836 FTM7_Ch4_Ch5_IrqHandler,
837 FTM7_Ch4_Ch5_IrqHandler,
838 FTM7_Ch6_Ch7_IrqHandler,
839 FTM7_Ch6_Ch7_IrqHandler}
845 #if (defined(OC_PAL_OVER_EMIOS))
847 #if (OC_PAL_INSTANCES_MAX > 0U)
849 void EMIOS0_00_01_IRQHandler(
void)
852 if (EMIOS_DRV_ReadFlagState(0U, 0U) ==
true)
858 if (EMIOS_DRV_ReadFlagState(0U, 1U) ==
true)
865 void EMIOS0_02_03_IRQHandler(
void)
868 if (EMIOS_DRV_ReadFlagState(0U, 2U) ==
true)
874 if (EMIOS_DRV_ReadFlagState(0U, 3U) ==
true)
881 void EMIOS0_04_05_IRQHandler(
void)
884 if (EMIOS_DRV_ReadFlagState(0U, 4U) ==
true)
890 if (EMIOS_DRV_ReadFlagState(0U, 5U) ==
true)
897 void EMIOS0_06_07_IRQHandler(
void)
900 if (EMIOS_DRV_ReadFlagState(0U, 6U) ==
true)
906 if (EMIOS_DRV_ReadFlagState(0U, 7U) ==
true)
913 void EMIOS0_08_09_IRQHandler(
void)
916 if (EMIOS_DRV_ReadFlagState(0U, 8U) ==
true)
922 if (EMIOS_DRV_ReadFlagState(0U, 9U) ==
true)
929 void EMIOS0_10_11_IRQHandler(
void)
932 if (EMIOS_DRV_ReadFlagState(0U, 10U) ==
true)
938 if (EMIOS_DRV_ReadFlagState(0U, 11U) ==
true)
945 void EMIOS0_12_13_IRQHandler(
void)
948 if (EMIOS_DRV_ReadFlagState(0U, 12U) ==
true)
954 if (EMIOS_DRV_ReadFlagState(0U, 13U) ==
true)
961 void EMIOS0_14_15_IRQHandler(
void)
964 if (EMIOS_DRV_ReadFlagState(0U, 14U) ==
true)
970 if (EMIOS_DRV_ReadFlagState(0U, 15U) ==
true)
977 void EMIOS0_16_17_IRQHandler(
void)
980 if (EMIOS_DRV_ReadFlagState(0U, 16U) ==
true)
986 if (EMIOS_DRV_ReadFlagState(0U, 17U) ==
true)
993 void EMIOS0_18_19_IRQHandler(
void)
996 if (EMIOS_DRV_ReadFlagState(0U, 18U) ==
true)
1002 if (EMIOS_DRV_ReadFlagState(0U, 19U) ==
true)
1009 void EMIOS0_20_21_IRQHandler(
void)
1012 if (EMIOS_DRV_ReadFlagState(0U, 20U) ==
true)
1018 if (EMIOS_DRV_ReadFlagState(0U, 21U) ==
true)
1025 void EMIOS0_22_23_IRQHandler(
void)
1028 if (EMIOS_DRV_ReadFlagState(0U, 22U) ==
true)
1034 if (EMIOS_DRV_ReadFlagState(0U, 23U) ==
true)
1041 void EMIOS0_24_25_IRQHandler(
void)
1044 if (EMIOS_DRV_ReadFlagState(0U, 24U) ==
true)
1050 if (EMIOS_DRV_ReadFlagState(0U, 25U) ==
true)
1057 void EMIOS0_26_27_IRQHandler(
void)
1060 if (EMIOS_DRV_ReadFlagState(0U, 26U) ==
true)
1066 if (EMIOS_DRV_ReadFlagState(0U, 27U) ==
true)
1073 void EMIOS0_28_29_IRQHandler(
void)
1076 if (EMIOS_DRV_ReadFlagState(0U, 28U) ==
true)
1082 if (EMIOS_DRV_ReadFlagState(0U, 29U) ==
true)
1089 void EMIOS0_30_31_IRQHandler(
void)
1092 if (EMIOS_DRV_ReadFlagState(0U, 30U) ==
true)
1098 if (EMIOS_DRV_ReadFlagState(0U, 31U) ==
true)
1105 #if (OC_PAL_INSTANCES_MAX > 1U)
1107 void EMIOS1_00_01_IRQHandler(
void)
1110 if (EMIOS_DRV_ReadFlagState(1U, 0U) ==
true)
1116 if (EMIOS_DRV_ReadFlagState(1U, 1U) ==
true)
1123 void EMIOS1_02_03_IRQHandler(
void)
1126 if (EMIOS_DRV_ReadFlagState(1U, 2U) ==
true)
1132 if (EMIOS_DRV_ReadFlagState(1U, 3U) ==
true)
1139 void EMIOS1_04_05_IRQHandler(
void)
1142 if (EMIOS_DRV_ReadFlagState(1U, 4U) ==
true)
1148 if (EMIOS_DRV_ReadFlagState(1U, 5U) ==
true)
1155 void EMIOS1_06_07_IRQHandler(
void)
1158 if (EMIOS_DRV_ReadFlagState(1U, 6U) ==
true)
1164 if (EMIOS_DRV_ReadFlagState(1U, 7U) ==
true)
1171 void EMIOS1_08_09_IRQHandler(
void)
1174 if (EMIOS_DRV_ReadFlagState(1U, 8U) ==
true)
1180 if (EMIOS_DRV_ReadFlagState(1U, 9U) ==
true)
1187 void EMIOS1_10_11_IRQHandler(
void)
1190 if (EMIOS_DRV_ReadFlagState(1U, 10U) ==
true)
1196 if (EMIOS_DRV_ReadFlagState(1U, 11U) ==
true)
1203 void EMIOS1_12_13_IRQHandler(
void)
1206 if (EMIOS_DRV_ReadFlagState(1U, 12U) ==
true)
1212 if (EMIOS_DRV_ReadFlagState(1U, 13U) ==
true)
1219 void EMIOS1_14_15_IRQHandler(
void)
1222 if (EMIOS_DRV_ReadFlagState(1U, 14U) ==
true)
1228 if (EMIOS_DRV_ReadFlagState(1U, 15U) ==
true)
1235 void EMIOS1_16_17_IRQHandler(
void)
1238 if (EMIOS_DRV_ReadFlagState(1U, 16U) ==
true)
1244 if (EMIOS_DRV_ReadFlagState(1U, 17U) ==
true)
1251 void EMIOS1_18_19_IRQHandler(
void)
1254 if (EMIOS_DRV_ReadFlagState(1U, 18U) ==
true)
1260 if (EMIOS_DRV_ReadFlagState(1U, 19U) ==
true)
1267 void EMIOS1_20_21_IRQHandler(
void)
1270 if (EMIOS_DRV_ReadFlagState(1U, 20U) ==
true)
1276 if (EMIOS_DRV_ReadFlagState(1U, 21U) ==
true)
1283 void EMIOS1_22_23_IRQHandler(
void)
1286 if (EMIOS_DRV_ReadFlagState(1U, 22U) ==
true)
1292 if (EMIOS_DRV_ReadFlagState(1U, 23U) ==
true)
1299 void EMIOS1_24_25_IRQHandler(
void)
1302 if (EMIOS_DRV_ReadFlagState(1U, 24U) ==
true)
1308 if (EMIOS_DRV_ReadFlagState(1U, 25U) ==
true)
1315 void EMIOS1_26_27_IRQHandler(
void)
1318 if (EMIOS_DRV_ReadFlagState(1U, 26U) ==
true)
1324 if (EMIOS_DRV_ReadFlagState(1U, 27U) ==
true)
1331 void EMIOS1_28_29_IRQHandler(
void)
1334 if (EMIOS_DRV_ReadFlagState(1U, 28U) ==
true)
1340 if (EMIOS_DRV_ReadFlagState(1U, 29U) ==
true)
1347 void EMIOS1_30_31_IRQHandler(
void)
1350 if (EMIOS_DRV_ReadFlagState(1U, 30U) ==
true)
1356 if (EMIOS_DRV_ReadFlagState(1U, 31U) ==
true)
1363 #if (OC_PAL_INSTANCES_MAX > 2U)
1365 void EMIOS2_00_01_IRQHandler(
void)
1368 if (EMIOS_DRV_ReadFlagState(2U, 0U) ==
true)
1374 if (EMIOS_DRV_ReadFlagState(2U, 1U) ==
true)
1381 void EMIOS2_02_03_IRQHandler(
void)
1384 if (EMIOS_DRV_ReadFlagState(2U, 2U) ==
true)
1390 if (EMIOS_DRV_ReadFlagState(2U, 3U) ==
true)
1397 void EMIOS2_04_05_IRQHandler(
void)
1400 if (EMIOS_DRV_ReadFlagState(2U, 4U) ==
true)
1406 if (EMIOS_DRV_ReadFlagState(2U, 5U) ==
true)
1413 void EMIOS2_06_07_IRQHandler(
void)
1416 if (EMIOS_DRV_ReadFlagState(2U, 6U) ==
true)
1422 if (EMIOS_DRV_ReadFlagState(2U, 7U) ==
true)
1429 void EMIOS2_08_09_IRQHandler(
void)
1432 if (EMIOS_DRV_ReadFlagState(2U, 8U) ==
true)
1438 if (EMIOS_DRV_ReadFlagState(2U, 9U) ==
true)
1445 void EMIOS2_10_11_IRQHandler(
void)
1448 if (EMIOS_DRV_ReadFlagState(2U, 10U) ==
true)
1454 if (EMIOS_DRV_ReadFlagState(2U, 11U) ==
true)
1461 void EMIOS2_12_13_IRQHandler(
void)
1464 if (EMIOS_DRV_ReadFlagState(2U, 12U) ==
true)
1470 if (EMIOS_DRV_ReadFlagState(2U, 13U) ==
true)
1477 void EMIOS2_14_15_IRQHandler(
void)
1480 if (EMIOS_DRV_ReadFlagState(2U, 14U) ==
true)
1486 if (EMIOS_DRV_ReadFlagState(2U, 15U) ==
true)
1493 void EMIOS2_16_17_IRQHandler(
void)
1496 if (EMIOS_DRV_ReadFlagState(2U, 16U) ==
true)
1502 if (EMIOS_DRV_ReadFlagState(2U, 17U) ==
true)
1509 void EMIOS2_18_19_IRQHandler(
void)
1512 if (EMIOS_DRV_ReadFlagState(2U, 18U) ==
true)
1518 if (EMIOS_DRV_ReadFlagState(2U, 19U) ==
true)
1525 void EMIOS2_20_21_IRQHandler(
void)
1528 if (EMIOS_DRV_ReadFlagState(2U, 20U) ==
true)
1534 if (EMIOS_DRV_ReadFlagState(2U, 21U) ==
true)
1541 void EMIOS2_22_23_IRQHandler(
void)
1544 if (EMIOS_DRV_ReadFlagState(2U, 22U) ==
true)
1550 if (EMIOS_DRV_ReadFlagState(2U, 23U) ==
true)
1557 void EMIOS2_24_25_IRQHandler(
void)
1560 if (EMIOS_DRV_ReadFlagState(2U, 24U) ==
true)
1566 if (EMIOS_DRV_ReadFlagState(2U, 25U) ==
true)
1573 void EMIOS2_26_27_IRQHandler(
void)
1576 if (EMIOS_DRV_ReadFlagState(2U, 26U) ==
true)
1582 if (EMIOS_DRV_ReadFlagState(2U, 27U) ==
true)
1589 void EMIOS2_28_29_IRQHandler(
void)
1592 if (EMIOS_DRV_ReadFlagState(2U, 28U) ==
true)
1598 if (EMIOS_DRV_ReadFlagState(2U, 29U) ==
true)
1605 void EMIOS2_30_31_IRQHandler(
void)
1608 if (EMIOS_DRV_ReadFlagState(2U, 30U) ==
true)
1614 if (EMIOS_DRV_ReadFlagState(2U, 31U) ==
true)
1624 #if (defined(OC_PAL_OVER_ETIMER))
1625 #if (OC_PAL_INSTANCES_MAX > 0U)
1626 void ETIMER0_TC0IR_IRQHandler(
void)
1631 void ETIMER0_TC1IR_IRQHandler(
void)
1636 void ETIMER0_TC2IR_IRQHandler(
void)
1641 void ETIMER0_TC3IR_IRQHandler(
void)
1646 void ETIMER0_TC4IR_IRQHandler(
void)
1651 void ETIMER0_TC5IR_IRQHandler(
void)
1657 #if (OC_PAL_INSTANCES_MAX > 1U)
1658 void ETIMER1_TC0IR_IRQHandler(
void)
1663 void ETIMER1_TC1IR_IRQHandler(
void)
1668 void ETIMER1_TC2IR_IRQHandler(
void)
1673 void ETIMER1_TC3IR_IRQHandler(
void)
1678 void ETIMER1_TC4IR_IRQHandler(
void)
1683 void ETIMER1_TC5IR_IRQHandler(
void)
1689 #if (OC_PAL_INSTANCES_MAX > 2U)
1690 void ETIMER2_TC0IR_IRQHandler(
void)
1695 void ETIMER2_TC1IR_IRQHandler(
void)
1700 void ETIMER2_TC2IR_IRQHandler(
void)
1705 void ETIMER2_TC3IR_IRQHandler(
void)
1710 void ETIMER2_TC4IR_IRQHandler(
void)
1715 void ETIMER2_TC5IR_IRQHandler(
void)
#define FTM_CONTROLS_COUNT
static bool FTM_DRV_GetChnEventStatus(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel event status.
void OC_IrqHandler(uint32_t instance, uint8_t channel)
uint32_t FTM_DRV_GetEnabledInterrupts(uint32_t instance)
This function will get the enabled FTM interrupts.
void(* isr_t)(void)
Interrupt handler type.
FTM_Type *const g_ftmBase[(2u)]
Table of base addresses for FTM instances.