52 #if (defined(I2S_OVER_SAI))
53 #include "sai_driver.h"
55 #if (defined(I2S_OVER_FLEXIO))
61 #if (defined(I2S_OVER_SAI))
64 #define LAST_IS_NONE 0U
66 static sai_state_t saiTxState[NO_OF_SAI_INSTS_FOR_I2S];
67 static sai_state_t saiRxState[NO_OF_SAI_INSTS_FOR_I2S];
69 static uint32_t saiStateInstanceMapping[NO_OF_SAI_INSTS_FOR_I2S];
71 static bool saiStateIsAllocated[NO_OF_SAI_INSTS_FOR_I2S];
73 static uint8_t lastXfer[NO_OF_SAI_INSTS_FOR_I2S];
77 #if (defined(I2S_OVER_FLEXIO))
78 #define NO_OF_FLEXIO_INSTS_FOR_I2S (NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S+NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S)
80 #if (NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S > 0U)
82 static bool flexioMasterStateIsAllocated[NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S];
84 #if (NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S > 0U)
86 static bool flexioSlaveStateIsAllocated[NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S];
89 static flexio_device_state_t flexioDeviceState;
91 static uint32_t flexioStateInstanceMapping[NO_OF_FLEXIO_INSTS_FOR_I2S];
93 static bool flexioIsMaster[NO_OF_FLEXIO_INSTS_FOR_I2S];
95 static void* flexioState[NO_OF_FLEXIO_INSTS_FOR_I2S];
97 static bool flexioStateIsAllocated[NO_OF_FLEXIO_INSTS_FOR_I2S];
98 static uint8_t flexioWordSize[NO_OF_FLEXIO_INSTS_FOR_I2S];
101 #ifdef I2S_OVER_FLEXIO
108 static uint8_t flexioAllocateState(uint32_t instId,
114 for (i = 0; i < NO_OF_FLEXIO_INSTS_FOR_I2S; i++)
116 if (!flexioStateIsAllocated[i])
118 flexioStateInstanceMapping[i] = instId;
119 flexioStateIsAllocated[i] =
true;
120 flexioIsMaster[i] = isMaster;
123 #if (NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S > 0U)
124 for (j = 0; j < NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S; j++)
126 if (!flexioMasterStateIsAllocated[j])
128 flexioMasterStateIsAllocated[j] =
true;
129 flexioState[i] = &flexioMasterState[j];
137 #if (NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S > 0U)
138 for (j = 0; j < NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S; j++)
140 if (!flexioSlaveStateIsAllocated[j])
142 flexioSlaveStateIsAllocated[j] =
true;
143 flexioState[i] = &flexioSlaveState[j];
163 static uint8_t saiAllocateState(uint32_t instId)
166 for (i = 0; i < NO_OF_SAI_INSTS_FOR_I2S; i++)
168 if (!saiStateIsAllocated[i])
170 saiStateIsAllocated[i] =
true;
171 saiStateInstanceMapping[i] = instId;
189 if (instance->
instType == I2S_INST_TYPE_SAI)
191 for (i = 0; i < NO_OF_SAI_INSTS_FOR_I2S; i++)
193 if ((saiStateInstanceMapping[i] == instance->
instIdx) && saiStateIsAllocated[i])
195 saiStateIsAllocated[i] =
false;
201 #ifdef I2S_OVER_FLEXIO
203 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
205 for (i = 0; i < NO_OF_FLEXIO_INSTS_FOR_I2S; i++)
207 if ((flexioStateInstanceMapping[i] == instance->
instIdx) && flexioStateIsAllocated[i])
209 flexioStateIsAllocated[i] =
false;
210 if (flexioIsMaster[i])
212 #if (NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S > 0U)
213 for (j = 0; j < NO_OF_FLEXIO_MASTER_INSTS_FOR_I2S; j++)
215 if ((&flexioMasterState[j] == flexioState[i]) && flexioMasterStateIsAllocated[j])
217 flexioMasterStateIsAllocated[j] =
false;
224 #if (NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S > 0U)
225 for (j = 0; j < NO_OF_FLEXIO_SLAVE_INSTS_FOR_I2S; j++)
227 if ((&flexioSlaveState[j] == flexioState[i]) && flexioSlaveStateIsAllocated[j])
229 flexioSlaveStateIsAllocated[j] =
false;
247 static uint8_t
findState(uint32_t instance,
const uint32_t* instMap,
const bool* isAlloc, uint32_t noOfInst)
250 for (i = 0; i < noOfInst; i++)
252 if ((instMap[i] == instance) && isAlloc[i])
274 sai_user_config_t saiUserConfig;
275 if (instance->
instType == I2S_INST_TYPE_SAI)
277 stateIndex = saiAllocateState(instance->
instIdx);
278 DEV_ASSERT(stateIndex < NO_OF_SAI_INSTS_FOR_I2S);
279 lastXfer[stateIndex] = LAST_IS_NONE;
280 saiUserConfig.BitClkNegPolar =
true;
281 saiUserConfig.ChannelCount = 1U;
284 saiUserConfig.ElementSize = 1U;
288 saiUserConfig.ElementSize = 2U;
292 saiUserConfig.ElementSize = 4U;
294 saiUserConfig.FirstBitIndex = (uint8_t)(config->
wordWidth - 1U);
295 saiUserConfig.FrameSize = 2U;
296 #ifdef FEATURE_SAI_HAS_CHMOD
297 saiUserConfig.MaskMode = SAI_MASK_TRISTATE;
300 #ifdef FEATURE_SAI_MSEL_FCD
301 saiUserConfig.MasterClkSrc = SAI_FCD_CLK;
303 #ifdef FEATURE_SAI_MSEL_BUS_CLK
304 saiUserConfig.MasterClkSrc = SAI_BUS_CLK;
306 saiUserConfig.MsbFirst =
true;
307 saiUserConfig.MuxMode = SAI_MUX_DISABLED;
308 saiUserConfig.SyncEarly =
true;
309 saiUserConfig.SyncNegPolar =
true;
310 saiUserConfig.SyncWidth = config->
wordWidth;
311 saiUserConfig.Word0Width = config->
wordWidth;
312 saiUserConfig.WordNWidth = config->
wordWidth;
313 saiUserConfig.FrameStartReport =
false;
314 saiUserConfig.SyncErrorReport =
false;
315 saiUserConfig.RunErrorReport =
false;
318 saiUserConfig.TransferType = SAI_DMA;
322 saiUserConfig.TransferType = SAI_INTERRUPT;
324 saiUserConfig.callback = (sai_transfer_callback_t) config->
callback;
326 saiUserConfig.BitClkFreq = config->
baudRate;
327 saiUserConfig.SyncMode = SAI_ASYNC;
330 saiUserConfig.ChannelEnable = 1U;
333 #ifdef FEATURE_SAI_MSEL_FCD
334 SAI_DRV_FCDInit(instance->
instIdx, SAI_FCD_PLL, config->
baudRate*2UL,
false);
336 saiUserConfig.BitClkInternal =
true;
337 saiUserConfig.SyncInternal =
true;
341 saiUserConfig.BitClkInternal =
false;
342 saiUserConfig.SyncInternal =
false;
344 SAI_DRV_TxInit(instance->
instIdx, &saiUserConfig, &saiTxState[stateIndex]);
348 saiUserConfig.ChannelEnable = 2U;
350 SAI_DRV_RxInit(instance->
instIdx, &saiUserConfig, &saiRxState[stateIndex]);
354 #ifdef I2S_OVER_FLEXIO
357 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
360 DEV_ASSERT(stateIndex < NO_OF_FLEXIO_INSTS_FOR_I2S);
366 flexioWordSize[stateIndex] = 1U;
370 flexioWordSize[stateIndex] = 2U;
374 flexioWordSize[stateIndex] = 4U;
392 flexioMasterConfig.
rxPin = ((extension_flexio_for_i2s_t*)config->
extension)->rxPin;
393 flexioMasterConfig.
sckPin = ((extension_flexio_for_i2s_t*)config->
extension)->sckPin;
394 flexioMasterConfig.
txPin = ((extension_flexio_for_i2s_t*)config->
extension)->txPin;
395 flexioMasterConfig.
wsPin = ((extension_flexio_for_i2s_t*)config->
extension)->wsPin;
413 flexioSlaveConfig.
rxPin = ((extension_flexio_for_i2s_t*)config->
extension)->rxPin;
414 flexioSlaveConfig.
sckPin = ((extension_flexio_for_i2s_t*)config->
extension)->sckPin;
415 flexioSlaveConfig.
txPin = ((extension_flexio_for_i2s_t*)config->
extension)->txPin;
416 flexioSlaveConfig.
wsPin = ((extension_flexio_for_i2s_t*)config->
extension)->wsPin;
435 #ifdef I2S_OVER_FLEXIO
437 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
439 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
440 if (flexioIsMaster[stateIndex])
455 if (instance->
instType == I2S_INST_TYPE_SAI)
457 SAI_DRV_TxDeinit(instance->
instIdx);
458 SAI_DRV_RxDeinit(instance->
instIdx);
474 uint32_t * configuredBaudRate)
477 #ifdef I2S_OVER_FLEXIO
479 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
481 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
482 if (flexioIsMaster[stateIndex])
489 if (instance->
instType == I2S_INST_TYPE_SAI)
491 *configuredBaudRate = SAI_DRV_TxGetBitClockFreq(instance->
instIdx);
507 const uint8_t * txBuff,
513 #ifdef I2S_OVER_FLEXIO
514 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
516 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
517 if (flexioIsMaster[stateIndex])
529 if (instance->
instType == I2S_INST_TYPE_SAI)
531 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
532 if ((lastXfer[stateIndex] == LAST_IS_NONE) || (lastXfer[stateIndex] == LAST_IS_RX))
534 lastXfer[stateIndex] = LAST_IS_TX;
535 SAI_DRV_SetMaster(instance->
instIdx,
true);
538 ret = SAI_DRV_SendBlocking(instance->
instIdx, &addr, txSize, timeout);
556 #ifdef I2S_OVER_FLEXIO
558 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
560 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
561 if (flexioIsMaster[stateIndex])
573 if (instance->
instType == I2S_INST_TYPE_SAI)
576 SAI_DRV_Receive(instance->
instIdx, &addr, rxSize);
591 const uint8_t * txBuff,
595 #ifdef I2S_OVER_FLEXIO
597 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
599 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
600 if (flexioIsMaster[stateIndex])
612 if (instance->
instType == I2S_INST_TYPE_SAI)
615 SAI_DRV_Send(instance->
instIdx, &addr, txSize);
629 const uint8_t * txBuff,
634 #ifdef I2S_OVER_FLEXIO
635 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
637 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
638 if (flexioIsMaster[stateIndex])
650 if (instance->
instType == I2S_INST_TYPE_SAI)
652 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
653 if ((lastXfer[stateIndex] == LAST_IS_NONE) || (lastXfer[stateIndex] == LAST_IS_RX))
655 lastXfer[stateIndex] = LAST_IS_TX;
656 SAI_DRV_SetMaster(instance->
instIdx,
true);
659 SAI_DRV_Send(instance->
instIdx, &addr, txSize);
677 #ifdef I2S_OVER_FLEXIO
678 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
680 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
681 if (flexioIsMaster[stateIndex])
696 if (instance->
instType == I2S_INST_TYPE_SAI)
698 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
699 if (lastXfer[stateIndex] == LAST_IS_TX)
701 SAI_DRV_AbortSending(instance->
instIdx);
703 else if (lastXfer[stateIndex] == LAST_IS_RX)
705 SAI_DRV_AbortReceiving(instance->
instIdx);
729 uint32_t * countRemaining)
733 #ifdef I2S_OVER_FLEXIO
734 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
736 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
737 if (flexioIsMaster[stateIndex])
740 if (countRemaining != NULL)
742 *countRemaining /= flexioWordSize[stateIndex];
748 if (countRemaining != NULL)
750 *countRemaining /= flexioWordSize[stateIndex];
756 if (instance->
instType == I2S_INST_TYPE_SAI)
758 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
759 if (lastXfer[stateIndex] == LAST_IS_TX)
761 ret = SAI_DRV_GetSendingStatus(instance->
instIdx, countRemaining);
763 else if (lastXfer[stateIndex] == LAST_IS_RX)
765 ret = SAI_DRV_GetReceivingStatus(instance->
instIdx, countRemaining);
795 #ifdef I2S_OVER_FLEXIO
796 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
798 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
799 if (flexioIsMaster[stateIndex])
811 if (instance->
instType == I2S_INST_TYPE_SAI)
813 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
814 if ((lastXfer[stateIndex] == LAST_IS_NONE) || (lastXfer[stateIndex] == LAST_IS_TX))
816 lastXfer[stateIndex] = LAST_IS_RX;
817 SAI_DRV_SetMaster(instance->
instIdx,
false);
820 ret = SAI_DRV_ReceiveBlocking(instance->
instIdx, &addr, rxSize, timeout);
843 #ifdef I2S_OVER_FLEXIO
844 if (instance->
instType == I2S_INST_TYPE_FLEXIO)
846 stateIndex =
findState(instance->
instIdx, flexioStateInstanceMapping, flexioStateIsAllocated, NO_OF_FLEXIO_INSTS_FOR_I2S);
847 if (flexioIsMaster[stateIndex])
859 if (instance->
instType == I2S_INST_TYPE_SAI)
861 stateIndex =
findState(instance->
instIdx, saiStateInstanceMapping, saiStateIsAllocated, NO_OF_SAI_INSTS_FOR_I2S);
862 if ((lastXfer[stateIndex] == LAST_IS_NONE) || (lastXfer[stateIndex] == LAST_IS_TX))
864 lastXfer[stateIndex] = LAST_IS_RX;
865 SAI_DRV_SetMaster(instance->
instIdx,
false);
868 SAI_DRV_Receive(instance->
instIdx, &addr, rxSize);
i2s_transfer_type_t transferType
status_t I2S_GetBaudRate(const i2s_instance_t *instance, uint32_t *configuredBaudRate)
Returns the i2s baud rate.
status_t FLEXIO_I2S_DRV_MasterReceiveDataBlocking(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking receive transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterReceiveData(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking receive transaction on the I2S bus.
status_t I2S_ReceiveDataBlocking(const i2s_instance_t *instance, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking I2S reception.
static status_t FLEXIO_I2S_DRV_SlaveTransferAbort(flexio_i2s_slave_state_t *slave)
Aborts a non-blocking I2S slave transaction.
status_t I2S_SendDataBlocking(const i2s_instance_t *instance, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking I2S transmission.
static void freeState(const i2s_instance_t *instance)
status_t FLEXIO_I2S_DRV_MasterSetTxBuffer(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize)
Provide a buffer for transmitting data.
status_t FLEXIO_I2S_DRV_MasterSendData(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking send transaction on the I2S bus.
I2S user configuration structure.
Master internal context structure.
Slave configuration structure.
status_t I2S_Deinit(const i2s_instance_t *instance)
De-initializes the I2S module.
static status_t FLEXIO_I2S_DRV_SlaveSetTxBuffer(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize)
Provide a buffer for transmitting data.
status_t FLEXIO_I2S_DRV_MasterDeinit(flexio_i2s_master_state_t *master)
De-initialize the FLEXIO_I2S master mode driver.
status_t FLEXIO_I2S_DRV_SlaveInit(uint32_t instance, const flexio_i2s_slave_user_config_t *userConfigPtr, flexio_i2s_slave_state_t *slave)
Initialize the FLEXIO_I2S slave mode driver.
static status_t FLEXIO_I2S_DRV_SlaveSendData(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking send transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterSendDataBlocking(flexio_i2s_master_state_t *master, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking send transaction on the I2S bus.
status_t FLEXIO_I2S_DRV_MasterGetStatus(flexio_i2s_master_state_t *master, uint32_t *bytesRemaining)
Get the status of the current non-blocking I2S master transaction.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
status_t I2S_ReceiveData(const i2s_instance_t *instance, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking I2S reception.
Structure storing PAL instance information.
status_t I2S_SetRxBuffer(const i2s_instance_t *instance, uint8_t *rxBuff, uint32_t rxSize)
Keep receiving.
flexio_driver_type_t driverType
status_t I2S_Init(const i2s_instance_t *instance, const i2s_user_config_t *config)
Initializes the I2S module.
status_t I2S_Abort(const i2s_instance_t *instance)
Terminates a non-blocking transfer early.
static status_t FLEXIO_I2S_DRV_SlaveSetRxBuffer(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize)
Provide a buffer for receiving data.
status_t FLEXIO_I2S_DRV_MasterInit(uint32_t instance, const flexio_i2s_master_user_config_t *userConfigPtr, flexio_i2s_master_state_t *master)
Initialize the FLEXIO_I2S master mode driver.
static status_t FLEXIO_I2S_DRV_SlaveGetStatus(flexio_i2s_slave_state_t *slave, uint32_t *bytesRemaining)
Get the status of the current non-blocking I2S slave transaction.
status_t I2S_SendData(const i2s_instance_t *instance, const uint8_t *txBuff, uint32_t txSize)
Perform a non-blocking I2S transmission.
flexio_driver_type_t driverType
status_t I2S_GetStatus(const i2s_instance_t *instance, uint32_t *countRemaining)
Get the status of the current I2S transfer.
status_t I2S_SetTxBuffer(const i2s_instance_t *instance, const uint8_t *txBuff, uint32_t txSize)
Keep sending.
status_t FLEXIO_I2S_DRV_MasterSetRxBuffer(flexio_i2s_master_state_t *master, uint8_t *rxBuff, uint32_t rxSize)
Provide a buffer for receiving data.
Master configuration structure.
status_t FLEXIO_I2S_DRV_MasterGetBaudRate(flexio_i2s_master_state_t *master, uint32_t *baudRate)
Get the currently configured baud rate.
status_t FLEXIO_I2S_DRV_MasterTransferAbort(flexio_i2s_master_state_t *master)
Aborts a non-blocking I2S master transaction.
static status_t FLEXIO_I2S_DRV_SlaveReceiveData(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize)
Perform a non-blocking receive transaction on the I2S bus.
static status_t FLEXIO_I2S_DRV_SlaveDeinit(flexio_i2s_slave_state_t *slave)
De-initialize the FLEXIO_I2S slave mode driver.
status_t FLEXIO_DRV_InitDevice(uint32_t instance, flexio_device_state_t *deviceState)
Initializes the FlexIO device.
static status_t FLEXIO_I2S_DRV_SlaveReceiveDataBlocking(flexio_i2s_slave_state_t *slave, uint8_t *rxBuff, uint32_t rxSize, uint32_t timeout)
Perform a blocking receive transaction on the I2S bus.
static status_t FLEXIO_I2S_DRV_SlaveSendDataBlocking(flexio_i2s_slave_state_t *slave, const uint8_t *txBuff, uint32_t txSize, uint32_t timeout)
Perform a blocking send transaction on the I2S bus.
static uint8_t findState(uint32_t instance, const uint32_t *instMap, const bool *isAlloc, uint32_t noOfInst)