s32_core_cm0.h
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1 /*
2  * Copyright (c) 2015-2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  *
18  */
36 /*
37  * Tool Chains:
38  * GNUC flag is defined also by ARM compiler - it shows the current major version of the compatible GCC version
39  * __GNUC__ : GNU Compiler Collection
40  * __ghs__ : Green Hills ARM Compiler
41  * __ICCARM__ : IAR ARM Compiler
42  * __DCC__ : Wind River Diab Compiler
43  * __ARMCC_VERSION : ARM Compiler
44  */
45 
46 #if !defined (CORE_CM0_H)
47 #define CORE_CM0_H
48 
49 
50 #ifdef __cplusplus
51 extern "C" {
52 #endif
53 
58 #if defined ( __DCC__ )
59 #define BKPT_ASM __asm ("BKPT 0\n\t")
60 #else
61 #define BKPT_ASM __asm ("BKPT #0\n\t")
62 #endif
63 
66 #if defined (__GNUC__)
67 #define ENABLE_INTERRUPTS() __asm volatile ("cpsie i" : : : "memory");
68 #elif defined ( __DCC__ )
69 #define ENABLE_INTERRUPTS() __asm (".short 0xb662");
70 #else
71 #define ENABLE_INTERRUPTS() __asm("cpsie i")
72 #endif
73 
74 
77 #if defined (__GNUC__)
78 #define DISABLE_INTERRUPTS() __asm volatile ("cpsid i" : : : "memory");
79 #elif defined ( __DCC__ )
80 #define DISABLE_INTERRUPTS() __asm (".short 0xb672");
81 #else
82 #define DISABLE_INTERRUPTS() __asm("cpsid i")
83 #endif
84 
85 
89 #if defined (__GNUC__)
90 #define STANDBY() __asm volatile ("wfi")
91 #elif defined ( __DCC__ )
92 #define STANDBY() __asm (".short 0xbf30");
93 #else
94 #define STANDBY() __asm ("wfi")
95 #endif
96 
97 
100 #if defined (__GNUC__) || defined (__ICCARM__) || defined (__ghs__) || defined (__ARMCC_VERSION)
101 #define REV_BYTES_32(a, b) __asm volatile ("rev %0, %1" : "=r" (b) : "r" (a))
102 #else
103 #define REV_BYTES_32(a, b) (b = ((a & 0xFF000000U) >> 24U) | ((a & 0xFF0000U) >> 8U) \
104  | ((a & 0xFF00U) << 8U) | ((a & 0xFFU) << 24U))
105 #endif
106 
109 #if defined (__GNUC__) || defined (__ICCARM__) || defined (__ghs__) || defined (__ARMCC_VERSION)
110 #define REV_BYTES_16(a, b) __asm volatile ("rev16 %0, %1" : "=r" (b) : "r" (a))
111 #else
112 #define REV_BYTES_16(a, b) (b = ((a & 0xFF000000U) >> 8U) | ((a & 0xFF0000U) << 8U) \
113  | ((a & 0xFF00U) >> 8U) | ((a & 0xFFU) << 8U))
114 #endif
115 
118 #if defined ( __GNUC__ ) || defined (__ARMCC_VERSION)
119  #define START_FUNCTION_DECLARATION_RAMSECTION
120  #define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));
121 #elif defined ( __ghs__ )
122  #define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("ghs callmode=far")
123  #define END_FUNCTION_DECLARATION_RAMSECTION __attribute__((section (".code_ram")));\
124  _Pragma("ghs callmode=default")
125 #elif defined ( __ICCARM__ )
126  #define START_FUNCTION_DECLARATION_RAMSECTION __ramfunc
127  #define END_FUNCTION_DECLARATION_RAMSECTION ;
128 #elif defined ( __DCC__ )
129  #define START_FUNCTION_DECLARATION_RAMSECTION _Pragma("section CODE \".code_ram\" \"\" far-absolute") \
130  _Pragma("use_section CODE")
131  #define END_FUNCTION_DECLARATION_RAMSECTION ; \
132  _Pragma("section CODE \".text\"")
133 #else
134  /* Keep compatibility with software analysis tools */
135  #define START_FUNCTION_DECLARATION_RAMSECTION
136  #define END_FUNCTION_DECLARATION_RAMSECTION ;
137 #endif
138 
139  /* For GCC, IAR, GHS, Diab and ARMC there is no need to specify the section when
140  defining a function, it is enough to specify it at the declaration. This
141  also enables compatibility with software analysis tools. */
142  #define START_FUNCTION_DEFINITION_RAMSECTION
143  #define END_FUNCTION_DEFINITION_RAMSECTION
144 
145 #if defined (__ICCARM__)
146  #define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_suppress=Ta022")
147  #define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL _Pragma("diag_default=Ta022")
148 #else
149  #define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
150  #define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
151 #endif
152 
157 #define GET_CORE_ID() 0U
158 
161 #if defined ( __GNUC__ ) || defined ( __ghs__ ) || defined ( __DCC__ ) || defined (__ARMCC_VERSION)
162  #define ALIGNED(x) __attribute__((aligned(x)))
163 #elif defined ( __ICCARM__ )
164  #define stringify(s) tostring(s)
165  #define tostring(s) #s
166  #define ALIGNED(x) _Pragma(stringify(data_alignment=x))
167 #else
168  /* Keep compatibility with software analysis tools */
169  #define ALIGNED(x)
170 #endif
171 
174 #define CORE_LITTLE_ENDIAN
175 
176 #ifdef __cplusplus
177 }
178 #endif
179 
180 #endif /* CORE_CM0_H */
181 
182 /*******************************************************************************
183  * EOF
184  ******************************************************************************/