64 #include "ftm_hw_access.h"
80 bool faultDetection =
false;
89 #if (FTM_INSTANCE_COUNT > 2U)
90 {SIM_FTM2_CLOCKSEL, FTM2_CLK},
92 #if (FTM_INSTANCE_COUNT > 3U)
93 {SIM_FTM3_CLOCKSEL, FTM3_CLK},
95 #if (FTM_INSTANCE_COUNT > 4U)
96 {SIM_FTM4_CLOCKSEL, FTM4_CLK},
98 #if (FTM_INSTANCE_COUNT > 5U)
99 {SIM_FTM5_CLOCKSEL, FTM5_CLK},
101 #if (FTM_INSTANCE_COUNT > 6U)
102 {SIM_FTM6_CLOCKSEL, FTM6_CLK},
104 #if (FTM_INSTANCE_COUNT > 7U)
105 {SIM_FTM7_CLOCKSEL, FTM7_CLK},
124 FTM_Type * ftmBase = g_ftmBase[instance];
129 if (ftmStatePtr[instance] != NULL)
139 ftmStatePtr[instance] = state;
151 FTM_DRV_Reset(ftmBase);
170 FTM_DRV_SetBdmMode(ftmBase, info->
BDMMode);
175 FTM_DRV_SetTimerOverflowInt(ftmBase,
true);
180 FTM_DRV_SetTimerOverflowInt(ftmBase,
false);
199 FTM_Type * ftmBase = g_ftmBase[instance];
202 FTM_DRV_Reset(ftmBase);
203 ftmStatePtr[instance] = NULL;
217 uint32_t channelsMask,
218 bool softwareTrigger)
221 FTM_Type * ftmBase = g_ftmBase[instance];
223 FTM_DRV_SetOutmaskReg(ftmBase, channelsMask);
224 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
238 uint16_t counterValue,
239 bool softwareTrigger)
242 FTM_Type * ftmBase = g_ftmBase[instance];
244 FTM_DRV_SetCounterInitVal(ftmBase, counterValue);
245 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
259 uint16_t reloadPoint,
260 bool softwareTrigger)
263 FTM_Type * ftmBase = g_ftmBase[instance];
265 FTM_DRV_SetHalfCycleValue(ftmBase, reloadPoint);
266 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
282 uint8_t channelsValues,
283 bool softwareTrigger)
286 FTM_Type * ftmBase = g_ftmBase[instance];
287 FTM_DRV_SetAllChnSoftwareCtrlVal(ftmBase, channelsValues);
288 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
302 uint8_t channelsMask,
303 bool softwareTrigger)
306 FTM_Type * ftmBase = g_ftmBase[instance];
307 FTM_DRV_SetAllChnSoftwareCtrlCmd(ftmBase, channelsMask);
308 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
323 uint8_t channelValueMask)
326 FTM_Type * ftmBase = g_ftmBase[instance];
329 FTM_DRV_SetAllChnSoftwareCtrlCmd(ftmBase, channelMask);
331 FTM_DRV_SetAllChnSoftwareCtrlVal(ftmBase, channelValueMask);
345 uint8_t channelsPairMask,
346 bool softwareTrigger)
349 FTM_Type * ftmBase = g_ftmBase[instance];
351 FTM_DRV_SetInvctrlReg(ftmBase, channelsPairMask);
352 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
365 uint16_t counterValue,
366 bool softwareTrigger)
369 FTM_Type * ftmBase = g_ftmBase[instance];
371 FTM_DRV_SetMod(ftmBase, counterValue);
372 FTM_DRV_SetSoftwareTriggerCmd(ftmBase, softwareTrigger);
391 FTM_Type * ftmBase = g_ftmBase[instance];
394 FTM_DRV_SetChnEdgeLevel(ftmBase, channel, level);
414 FTM_Type * ftmBase = g_ftmBase[instance];
426 FTM_DRV_SetOutmaskSoftwareSyncModeCmd(ftmBase,
true);
428 FTM_DRV_SetInvctrlSoftwareSyncModeCmd(ftmBase,
true);
430 FTM_DRV_SetSwoctrlSoftwareSyncModeCmd(ftmBase,
true);
432 FTM_DRV_SetModCntinCvSoftwareSyncModeCmd(ftmBase,
true);
434 FTM_DRV_SetCounterSoftwareSyncModeCmd(ftmBase, param->
syncPoint);
439 FTM_DRV_SetOutmaskHardwareSyncModeCmd(ftmBase,
true);
441 FTM_DRV_SetInvctrlHardwareSyncModeCmd(ftmBase,
true);
443 FTM_DRV_SetSwoctrlHardwareSyncModeCmd(ftmBase,
true);
445 FTM_DRV_SetModCntinCvHardwareSyncModeCmd(ftmBase,
true);
447 FTM_DRV_SetCounterHardwareSyncModeCmd(ftmBase, (
bool)param->
syncPoint);
453 FTM_DRV_SetPwmSyncModeCmd(ftmBase,
true);
455 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 0U, param->
hardwareSync0);
456 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 1U, param->
hardwareSync1);
457 FTM_DRV_SetHardwareSyncTriggerSrc(ftmBase, 2U, param->
hardwareSync2);
462 FTM_DRV_SetOutmaskPwmSyncModeCmd(ftmBase, (
bool)param->
maskRegSync);
464 FTM_DRV_SetInvctrlPwmSyncModeCmd(ftmBase, param->
inverterSync);
466 FTM_DRV_SetSwoctrlPwmSyncModeCmd(ftmBase, param->
outRegSync);
486 uint32_t interruptMask)
489 FTM_Type * ftmBase = g_ftmBase[instance];
490 uint32_t chnlInts = (interruptMask & 0x000000FFU);
491 uint8_t channel = 0U;
496 FTM_DRV_SetTimerOverflowInt(ftmBase,
true);
503 FTM_DRV_SetFaultInt(ftmBase,
true);
510 FTM_DRV_SetReIntEnabledCmd(ftmBase,
true);
515 while (chnlInts != 0U)
517 if ((chnlInts & 0x1U) != 0x0U)
519 FTM_DRV_EnableChnInt(ftmBase, channel);
523 chnlInts = chnlInts >> 1U;
537 uint32_t interruptMask)
540 FTM_Type * ftmBase = g_ftmBase[instance];
541 uint32_t chnlInts = (interruptMask & 0x000000FFU);
542 uint8_t channel = 0U;
547 FTM_DRV_SetTimerOverflowInt(ftmBase,
false);
554 FTM_DRV_SetFaultInt(ftmBase,
false);
561 FTM_DRV_SetReIntEnabledCmd(ftmBase,
false);
566 while (chnlInts != 0U)
568 if ((chnlInts & 0x1U) != 0x0U)
570 FTM_DRV_DisableChnInt(ftmBase, channel);
574 chnlInts = chnlInts >> 1U;
588 FTM_Type const * ftmBase = g_ftmBase[instance];
589 uint32_t enabledInterrupts = 0U;
594 if (FTM_DRV_IsOverflowIntEnabled(ftmBase) ==
true)
600 if (FTM_DRV_IsFaultIntEnabled(ftmBase) ==
true)
606 if (FTM_DRV_IsReloadIntEnabled(ftmBase) ==
true)
615 if (FTM_DRV_IsChnIntEnabled(ftmBase, channel) ==
true)
617 enabledInterrupts |= (1UL << (uint32_t)channel);
621 return enabledInterrupts;
634 FTM_Type const * ftmBase = g_ftmBase[instance];
635 uint8_t channel = 0U;
636 uint32_t statusFlags = 0U;
639 if (FTM_DRV_HasTimerOverflowed(ftmBase) ==
true)
645 if (FTM_DRV_GetDetectedFaultInput(ftmBase) ==
true)
651 if (FTM_DRV_GetReloadFlag(ftmBase) ==
true)
657 if (FTM_DRV_IsChnTriggerGenerated(ftmBase) ==
true)
665 if (FTM_DRV_HasChnEventOccurred(ftmBase, channel) ==
true)
667 statusFlags |= (1UL << (uint32_t)channel);
685 FTM_Type * ftmBase = g_ftmBase[instance];
686 uint32_t chnlMask = (flagMask & 0x000000FFU);
687 uint8_t channel = 0U;
692 FTM_DRV_ClearTimerOverflow(ftmBase);
698 FTM_DRV_ClearFaultsIsr(ftmBase);
704 FTM_DRV_ClearReloadFlag(ftmBase);
710 FTM_DRV_ClearChnTriggerFlag(ftmBase);
716 if ((chnlMask & 0x00000001U) != 0x0U)
720 chnlMask = chnlMask >> 1U;
736 FTM_Type const * ftmBase = g_ftmBase[instance];
740 uint32_t frequency = 0U;
742 clkPs = (uint8_t)(1U << FTM_DRV_GetClockPs(ftmBase));
777 return (uint32_t)(frequency / clkPs);
797 return (uint16_t)(uFTMhz / freqencyHz);
const IRQn_Type g_ftmReloadIrqId[FTM_INSTANCE_COUNT]
const IRQn_Type g_ftmFaultIrqId[FTM_INSTANCE_COUNT]
ftm_reg_update_t initCounterSync
status_t FTM_DRV_SetSoftwareOutputChannelControl(uint32_t instance, uint8_t channelsMask, bool softwareTrigger)
This function will configure which output channel can be software controlled.
ic_callback_t channelsCallbacks[(8U)]
ftm_pwm_sync_t syncMethod
FlexTimer state structure of the driver.
ftm_state_t * ftmStatePtr[FTM_INSTANCE_COUNT]
Pointer to runtime state structure.
status_t FTM_DRV_SetSync(uint32_t instance, const ftm_pwm_sync_t *param)
This function configures sync mechanism for some FTM registers (MOD, CNINT, HCR, CnV, OUTMASK, INVCTRL, SWOCTRL).
#define FEATURE_FTM_CHANNEL_COUNT
Configuration structure that the user needs to set.
FlexTimer Registers sync parameters Please don't use software and hardware trigger simultaneously Imp...
uint16_t measurementResults[(8U)]
status_t FTM_DRV_SetInitialCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the initial counter value. The counter will get this value after an overflow ...
status_t FTM_DRV_SetOutputlevel(uint32_t instance, uint8_t channel, uint8_t level)
This function will set the channel edge or level on the selection of the channel mode.
const IRQn_Type g_ftmOverflowIrqId[FTM_INSTANCE_COUNT]
bool enableNotification[(8U)]
status_t FTM_DRV_SetHalfCycleReloadPoint(uint32_t instance, uint16_t reloadPoint, bool softwareTrigger)
This function configure the value of the counter which will generates an reload point.
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
const IRQn_Type g_ftmIrqId[FTM_INSTANCE_COUNT][FEATURE_FTM_CHANNEL_COUNT]
Interrupt vectors for the FTM peripheral.
uint32_t FTM_DRV_GetFrequency(uint32_t instance)
Retrieves the frequency of the clock source feeding the FTM counter.
uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance, uint32_t freqencyHz)
This function is used to covert the given frequency to period in ticks.
void FTM_DRV_ClearStatusFlags(uint32_t instance, uint32_t flagMask)
This function is used to clear the FTM status flags.
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
ftm_clock_source_t ftmClockSource
ftm_pwm_sync_mode_t syncPoint
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
IRQn_Type
Defines the Interrupt Numbers definitions.
#define FTM_INSTANCE_COUNT
status_t FTM_DRV_SetInvertingControl(uint32_t instance, uint8_t channelsPairMask, bool softwareTrigger)
This function will configure if the second channel of a pair will be inverted or not.
bool enableInitializationTrigger
#define FTM_Overflow_IRQS
ftm_reg_update_t inverterSync
ftm_config_mode_t ftmMode
status_t FTM_DRV_EnableInterrupts(uint32_t instance, uint32_t interruptMask)
This function will enable the generation a list of interrupts. It includes the FTM overflow interrupt...
status_t FTM_DRV_SetModuloCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the maximum counter value.
ftm_config_mode_t ftmMode
void * channelsCallbacksParams[(8U)]
uint32_t FTM_DRV_GetEnabledInterrupts(uint32_t instance)
This function will get the enabled FTM interrupts.
status_t FTM_DRV_Deinit(uint32_t instance)
Shuts down the FTM driver.
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
status_t FTM_DRV_MaskOutputChannels(uint32_t instance, uint32_t channelsMask, bool softwareTrigger)
This function will mask the output of the channels and at match events will be ignored by the masked ...
ftm_reg_update_t maskRegSync
static void FTM_DRV_ClearChnEventStatus(FTM_Type *const ftmBase, uint8_t channel)
Clears the FTM peripheral timer all channel event status.
static const clock_names_t g_ftmExtClockSel[FTM_INSTANCE_COUNT][2]
Select external clock pin or clock source for peripheral.
status_t FTM_DRV_Init(uint32_t instance, const ftm_user_config_t *info, ftm_state_t *state)
Initializes the FTM driver.
status_t FTM_DRV_SetSoftOutChnValue(uint32_t instance, uint8_t channelsValues, bool softwareTrigger)
This function will force the output value of a channel to a specific value. Before using this functio...
clock_names_t
Clock names.
uint32_t FTM_DRV_GetStatusFlags(uint32_t instance)
This function will get the FTM status flags.
void FTM_DRV_DisableInterrupts(uint32_t instance, uint32_t interruptMask)
This function is used to disable some interrupts.
ftm_clock_source_t ftmClockSource
uint32_t ftmSourceClockFrequency
ftm_reg_update_t outRegSync
status_t FTM_DRV_SetAllChnSoftwareOutputControl(uint32_t instance, uint8_t channelMask, uint8_t channelValueMask)
This function will control list of channels by software to force the output to specified value...
ftm_clock_ps_t ftmPrescaler
FTM_Type *const g_ftmBase[FTM_INSTANCE_COUNT]
Table of base addresses for FTM instances.