55 #ifdef FEATURE_DMA_HWV3
58 void DMA0_Ch0_Ch15_IRQHandler(
void)
61 uint8_t virtualChannel = 0U;
64 for(virtualChannel = 0U; virtualChannel <= 15U; virtualChannel++)
66 if ((edmaRegBase->
TCD[index].CH_INT & DMA_TCD_CH_INT_INT_MASK) == DMA_TCD_CH_INT_INT_MASK)
75 void DMA0_Ch16_Ch31_IRQHandler(
void)
78 uint8_t virtualChannel = 16U;
81 for(virtualChannel = 16U; virtualChannel <= 31U; virtualChannel++)
83 if ((edmaRegBase->
TCD[index].CH_INT & DMA_TCD_CH_INT_INT_MASK) == DMA_TCD_CH_INT_INT_MASK)
92 void DMA1_Ch0_Ch15_IRQHandler(
void)
95 uint8_t virtualChannel = 32U;
98 for(virtualChannel = 32U; virtualChannel <= 47U; virtualChannel++)
100 if ((edmaRegBase->
TCD[index].CH_INT & DMA_TCD_CH_INT_INT_MASK) == DMA_TCD_CH_INT_INT_MASK)
109 void DMA1_Ch16_Ch31_IRQHandler(
void)
112 uint8_t virtualChannel = 48U;
115 for(virtualChannel = 48U; virtualChannel <= 63U; virtualChannel++)
117 if ((edmaRegBase->
TCD[index].CH_INT & DMA_TCD_CH_INT_INT_MASK) == DMA_TCD_CH_INT_INT_MASK)
125 #ifdef FEATURE_DMA_HAS_ERROR_IRQ
127 void DMA0_Error_IRQHandler(
void)
130 uint8_t virtualChannel = 0U;
133 for(virtualChannel = 0U; virtualChannel <= 31U; virtualChannel++)
135 if ((edmaRegBase->
TCD[index].CH_ES & DMA_TCD_CH_ES_ERR_MASK) == DMA_TCD_CH_ES_ERR_MASK)
144 void DMA1_Error_IRQHandler(
void)
147 uint8_t virtualChannel = 32U;
150 for(virtualChannel = 32U; virtualChannel <= 63U; virtualChannel++)
152 if ((edmaRegBase->
TCD[index].CH_ES & DMA_TCD_CH_ES_ERR_MASK) == DMA_TCD_CH_ES_ERR_MASK)
163 #ifdef FEATURE_DMA_ORED_IRQ_LINES_16_CHN
165 void DMA0_15_IRQHandler(
void)
169 uint32_t mask = 0xFFFF;
170 uint32_t flags = edmaRegBase->
INT;
171 uint8_t virtualChannel = 0U;
176 if ((flags & 1U) > 0U)
186 void DMA16_31_IRQHandler(
void)
190 uint32_t flags = edmaRegBase->
INT;
191 uint8_t virtualChannel = 16U;
196 if ((flags & 1U) > 0U)
206 #ifdef FEATURE_DMA_SEPARATE_IRQ_LINES_PER_CHN
208 void DMA0_IRQHandler(
void)
214 void DMA1_IRQHandler(
void)
220 void DMA2_IRQHandler(
void)
226 void DMA3_IRQHandler(
void)
232 void DMA4_IRQHandler(
void)
238 void DMA5_IRQHandler(
void)
244 void DMA6_IRQHandler(
void)
250 void DMA7_IRQHandler(
void)
256 void DMA8_IRQHandler(
void)
262 void DMA9_IRQHandler(
void)
268 void DMA10_IRQHandler(
void)
274 void DMA11_IRQHandler(
void)
280 void DMA12_IRQHandler(
void)
286 void DMA13_IRQHandler(
void)
292 void DMA14_IRQHandler(
void)
298 void DMA15_IRQHandler(
void)
302 #if (FEATURE_DMA_CHANNELS > 16U)
303 void DMA16_IRQHandler(
void)
309 void DMA17_IRQHandler(
void)
315 void DMA18_IRQHandler(
void)
321 void DMA19_IRQHandler(
void)
327 void DMA20_IRQHandler(
void)
333 void DMA21_IRQHandler(
void)
339 void DMA22_IRQHandler(
void)
345 void DMA23_IRQHandler(
void)
351 void DMA24_IRQHandler(
void)
357 void DMA25_IRQHandler(
void)
363 void DMA26_IRQHandler(
void)
369 void DMA27_IRQHandler(
void)
375 void DMA28_IRQHandler(
void)
381 void DMA29_IRQHandler(
void)
387 void DMA30_IRQHandler(
void)
393 void DMA31_IRQHandler(
void)
400 #ifdef FEATURE_DMA_HAS_ERROR_IRQ
402 void DMA_Error_IRQHandler(
void)
405 uint32_t error = EDMA_GetErrorIntStatusFlag(edmaRegBase);
406 uint8_t virtualChannel = 0U;
408 for (virtualChannel = 0U;
struct DMA_Type::@6 TCD[4u]
#define EDMA_ERR_LSB_MASK
Macro for accessing the least significant bit of the ERR register.
DMA_Type * EDMA_DRV_GetDmaRegBaseAddr(uint32_t instance)
void EDMA_DRV_IRQHandler(uint8_t virtualChannel)
DMA channel interrupt handler, implemented in driver c file.
void EDMA_DRV_ErrorIRQHandler(uint8_t virtualChannel)
#define FEATURE_DMA_VIRTUAL_CHANNELS