Memory Protection Unit Peripheral Abstraction Layer (MPU PAL)

Detailed Description

The S32 SDK provides a Peripheral Abstraction Layer for Memory Protection Unit (MPU) modules of S32 SDK devices.

The MPU PAL driver provides memory protection functionality via allocate regions and restrict access rights of all masters on the region. It was designed to be portable across all platforms and IPs which support Memory Protection Unit.

How to integrate MPU PAL in your application

Unlike the other drivers, MPU PAL modules need to include a configuration file named mpu_pal_cfg.h, which allows the user to specify which IPs are used and how many resources are allocated for each of them (state structures). The following code example shows how to configure one instance for each available MPU IPs.

#ifndef MPU_PAL_CFG_H
#define MPU_PAL_CFG_H
/* Define which IP instance which supported on this device */
#define MPU_OVER_MPU
#define MPU_OVER_SMPU
#endif /* MPU_PAL_CFG_H */

The following tables contains IPs specification on platforms:

Initialization & De-initialization

  1. Definitions for MPU IP (MPU_OVER_MPU)
    /* Define MPU PAL instance */
    mpu_instance_t mpu_pal_Instance =
    {
    .instType = MPU_INST_TYPE_MPU, /* MPU PAL over MPU */
    .instIdx = 0U /* MPU instance 0 */
    }
    /* Define number of masters supported by platform */
    #define MPU_PAL_MASTER_COUNT (16U)
    /* Define number of used regions (should be in range supported by platform) */
    #define MPU_PAL_REGION_COUNT (1U)
    /* Status variable */
    status_t status;
  2. Region configuration
    /* Master configuration */
    mpu_master_access_permission_t mpu_pal_masterAccRight[MPU_PAL_MASTER_COUNT] =
    {
    /* Master */
    {
    .accessRight = MPU_ACCESS_SUPERVISOR_RWX_USER_RWX /* Access right: read, write and execute
    for both supervisor and user mode */
    },
    /* Define the rest masters here */
    ...
    };
    /* Region configuration */
    mpu_region_config_t mpu_pal_regionConfigs[MPU_PAL_REGION_COUNT] =
    {
    /* Region 0 */
    {
    .startAddr = 0U, /* Start address */
    .endAddr = 0xFFFFFFFFU, /* End address */
    .masterAccRight = mpu_pal_masterAccRight, /* Pointer to access right of all masters */
    /* If support PID */
    .processIdEnable = 0x01U, /* 8'b00000001 Enable PID for logical master 0 (Core) */
    .processIdentifier = 0x00U, /* Process identifier */
    .processIdMask = 0xFFU, /* Process identifier mask */
    /* End if */
    /* Extension */
    .extension = NULL /* This field will be used to add extra settings
    to the basic region configuration */
    /* End extension */
    }
    };
    Or using MPU_GetDefaultConfig()
    /* Master configuration */
    mpu_master_access_permission_t mpu_pal_masterAccRight[MPU_PAL_MASTER_COUNT];
    /* Region configuration */
    mpu_region_config_t regionConfig0;
    /* Get default region configuration */
    status = MPU_GetDefaultConfig(&mpu_pal_Instance, mpu_pal_masterAccRight, &regionConfig0);
    mpu_region_config_t mpu_pal_regionConfigs[MPU_PAL_REGION_COUNT] =
    {
    regionConfig0
    };
  3. Initialization
    /* Initializes MPU PAL */
    status = MPU_Init(&mpu_pal_Instance, MPU_PAL_REGION_COUNT, mpu_pal_regionConfigs);
  4. De-initialization
    /* De-initializes MPU PAL */
    status = MPU_Deinit(&mpu_pal_Instance);

Updates region configuration

  1. Modify (or add new) region after initialization
    /* Disables process identifier functionality on region 0 */
    regionConfig0.processIdEnable = 0x00U;
    /* Updates region 0 */
    status = MPU_UpdateRegion(&mpu_pal_Instance, 0U, &regionConfig0);
  2. Enables/Disables an exist region configuration
    /* Enables region 1 */
    status = MPU_EnableRegion(&mpu_pal_Instance, 1U, true);
    /* Disables region 2 */
    status = MPU_EnableRegion(&mpu_pal_Instance, 2U, false);

Detects access protection errors

Other IP specific details

Modules

 MPU PAL
 Memory Protection Unit Peripheral Abstraction Layer.