88 uint8_t DEPartitionCode)
110 #if (FEATURE_FLS_IS_FTFC == 0U)
118 uint8_t EEEDataSetSize)
155 #if FEATURE_FLS_HAS_FLEX_NVM
156 uint8_t DEPartitionCode;
165 #if FEATURE_FLS_HAS_FLEX_NVM
170 FLASH_DRV_GetDEPartitionCode(pSSDConfig, DEPartitionCode);
242 uint32_t reg0, reg1, reg2, reg3;
249 *protectStatus = (uint32_t)((reg0 << 24U) | (reg1 << 16U) | (reg2 << 8U) | reg3);
265 uint8_t reg0, reg1, reg2, reg3;
266 bool flag0, flag1, flag2, flag3;
287 if (flag0 || flag1 || flag2 || flag3)
346 const uint8_t * keyBuffer)
355 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
366 for (i = 0U; i < 8U; i++)
369 *(uint8_t *)temp = keyBuffer[i];
392 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
427 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
464 uint32_t tempSize = size;
466 #if FEATURE_FLS_HAS_FLEX_NVM
468 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
471 dest += 0x800000U - temp;
479 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
493 if ((tempSize & (sectorSize - 1U)) != 0U)
502 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
521 tempSize -= sectorSize;
547 #if FEATURE_FLS_HAS_FLEX_NVM
549 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
552 dest += 0x800000U - temp;
559 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
572 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
611 if ((
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U)
616 while (((
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U) && (count > 0U))
659 uint8_t * pDataArray)
668 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
691 pDataArray[i] = *(uint8_t *)temp;
710 const uint8_t * pDataArray)
719 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
735 *(uint8_t *)temp = pDataArray[i];
745 #if FEATURE_FLS_HAS_READ_RESOURCE_CMD
755 uint8_t * pDataArray,
756 uint8_t resourceSelectCode)
765 #if FEATURE_FLS_HAS_FLEX_NVM
767 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
770 dest += 0x800000U - temp;
777 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
790 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
813 pDataArray[i] = *(uint8_t *)temp;
836 const uint8_t * pData)
851 #if FEATURE_FLS_HAS_FLEX_NVM
853 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
855 dest += 0x800000U - temp;
861 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
874 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
884 #if (FEATURE_FLS_DF_BLOCK_WRITE_UNIT_SIZE == FTFx_PHRASE_SIZE)
896 *(uint8_t *)(temp) = pData[i];
928 const uint8_t * pExpectedData,
929 uint32_t * pFailAddr,
939 uint32_t tempSize = size;
949 #if FEATURE_FLS_HAS_FLEX_NVM
951 if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->
DFlashSize)))
953 dest += 0x800000U - offsetAddr;
959 if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->
PFlashSize)))
970 while (tempSize > 0U)
973 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
992 *(uint8_t *)(temp) = pExpectedData[i];
1001 #if FEATURE_FLS_HAS_FLEX_NVM
1002 if (dest >= 0x800000U)
1004 *pFailAddr = dest + offsetAddr - 0x800000U;
1009 *pFailAddr = dest + offsetAddr;
1050 uint32_t counter = 0U;
1052 uint32_t endAddress;
1053 uint32_t tempSize = size;
1056 endAddress = dest + tempSize;
1059 if ((dest < pSSDConfig->PFlashBase) || (endAddress > (pSSDConfig->
PFlashBase + pSSDConfig->
PFlashSize)))
1061 #if FEATURE_FLS_HAS_FLEX_NVM
1062 if ((dest < pSSDConfig->DFlashBase) || (endAddress > (pSSDConfig->
DFlashBase + pSSDConfig->
DFlashSize)))
1067 #if FEATURE_FLS_HAS_FLEX_NVM
1074 while (tempSize > 0U)
1076 data = *(uint8_t *)(dest);
1099 #if FEATURE_FLS_HAS_PROGRAM_SECTION_CMD
1132 #if FEATURE_FLS_HAS_FLEX_NVM
1134 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
1137 dest += 0x800000U - temp;
1144 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
1157 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1185 #if FEATURE_FLS_HAS_ERASE_BLOCK_CMD
1203 #if FEATURE_FLS_HAS_FLEX_NVM
1205 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
1208 dest += 0x800000U - temp;
1215 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
1228 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1252 #if FEATURE_FLS_HAS_READ_1S_BLOCK_CMD
1264 uint8_t marginLevel)
1271 #if FEATURE_FLS_HAS_FLEX_NVM
1273 if ((dest >= temp) && (dest < (temp + pSSDConfig->
DFlashSize)))
1276 dest += 0x800000U - temp;
1283 if ((dest >= temp) && (dest < (temp + pSSDConfig->
PFlashSize)))
1296 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1321 #if FEATURE_FLS_HAS_FLEX_NVM
1402 uint16_t byteOfQuickWrite,
1409 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1424 FTFx_FCCOB4 = (uint8_t)(byteOfQuickWrite >> 0x8U);
1425 FTFx_FCCOB5 = (uint8_t)(byteOfQuickWrite & 0xFFU);
1433 if (pEEPROMStatus == NULL)
1459 const uint8_t * pData,
1468 *(uint8_t *)dest = *pData;
1473 temp = (uint32_t)(pData[1]) << 8U;
1474 temp |= (uint32_t)(pData[0]);
1475 *(
volatile uint16_t *)dest = (uint16_t)temp;
1480 temp = (uint32_t)(pData[3]) << 24U;
1481 temp |= (uint32_t)(pData[2]) << 16U;
1482 temp |= (uint32_t)(pData[1]) << 8U;
1483 temp |= (uint32_t)(pData[0]);
1484 *(
volatile uint32_t *)dest = temp;
1487 while (0U == (
FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK))
1530 const uint8_t * pData)
1539 if ((
FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK) == FTFx_FCNFG_EEERDY_MASK)
1542 if ((dest < pSSDConfig->EERAMBase) || ((dest + size) > (pSSDConfig->
EERAMBase + pSSDConfig->
EEESize)))
1550 if ((0U == (dest & 3U)) && (size >= 4U))
1554 else if ((0U == (dest & 1U)) && (size >= 2U))
1563 ret = FLASH_DRV_WaitEEWriteToFinish(pSSDConfig,
1594 uint8_t uEEEDataSizeCode,
1595 uint8_t uDEPartitionCode,
1596 uint8_t uCSEcKeySize,
1598 bool flexRamEnableLoadEEEData)
1605 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1618 FTFx_FCCOB3 = (uint8_t)(flexRamEnableLoadEEEData ? 0U : 1U);
1639 uint8_t * protectStatus)
1669 uint8_t protectStatus)
1696 #if FEATURE_FLS_HAS_PF_BLOCK_SWAP
1724 flash_swap_callback_t pSwapCallback)
1729 uint8_t currentSwapMode, currentSwapBlockStatus, nextSwapBlockStatus;
1731 currentSwapMode = 0xFFU;
1732 currentSwapBlockStatus = 0xFFU;
1733 nextSwapBlockStatus = 0xFFU;
1734 swapContinue =
false;
1737 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig, addr,
FTFx_SWAP_REPORT_STATUS, ¤tSwapMode, ¤tSwapBlockStatus, &nextSwapBlockStatus);
1747 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1751 ¤tSwapBlockStatus,
1752 &nextSwapBlockStatus);
1758 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1762 ¤tSwapBlockStatus,
1763 &nextSwapBlockStatus);
1773 if ((NULL_SWAP_CALLBACK != pSwapCallback) && (
STATUS_SUCCESS == ret))
1775 swapContinue = pSwapCallback(currentSwapMode);
1777 if (swapContinue ==
true)
1780 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1784 ¤tSwapBlockStatus,
1785 &nextSwapBlockStatus);
1794 if ((NULL_SWAP_CALLBACK == pSwapCallback) && (
FTFx_SWAP_UPDATE == currentSwapMode))
1801 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1805 ¤tSwapBlockStatus,
1806 &nextSwapBlockStatus);
1813 if (NULL_SWAP_CALLBACK == pSwapCallback)
1815 swapContinue =
true;
1819 swapContinue = pSwapCallback(currentSwapMode);
1822 if (swapContinue ==
true)
1825 ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1829 ¤tSwapBlockStatus,
1830 &nextSwapBlockStatus);
1848 uint8_t * pCurrentSwapMode,
1849 uint8_t * pCurrentSwapBlockStatus,
1850 uint8_t * pNextSwapBlockStatus)
1859 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1893 #if FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD
1908 if (0U == (
FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1998 #if FEATURE_FLS_HAS_DETECT_ECC_ERROR
2012 #if FEATURE_FLS_HAS_INTERRUPT_DOUBLE_BIT_FAULT_IRQ
2031 #if FEATURE_FLS_HAS_INTERRUPT_DOUBLE_BIT_FAULT_IRQ
#define FTFx_FCNFG_RAMRDY_MASK
status_t FLASH_DRV_DEFlashPartition(const flash_ssd_config_t *pSSDConfig, uint8_t uEEEDataSizeCode, uint8_t uDEPartitionCode, uint8_t uCSEcKeySize, bool uSFE, bool flexRamEnableLoadEEEData)
Flash D/E-Flash Partition.
status_t FLASH_DRV_GetDFlashProtection(const flash_ssd_config_t *pSSDConfig, uint8_t *protectStatus)
D-Flash get protection.
#define FTFx_SWAP_SET_IN_COMPLETE
Set Swap in Complete State.
status_t FLASH_DRV_VerifyAllBlock(const flash_ssd_config_t *pSSDConfig, uint8_t marginLevel)
Flash verify all blocks.
#define NULL_CALLBACK
Null callback.
#define FEATURE_FLS_DF_SIZE_0100
#define END_FUNCTION_DECLARATION_RAMSECTION
#define FTFx_FSEC_SEC_MASK
#define FTFx_FSTAT_ACCERR_MASK
#define FTFx_VERIFY_BLOCK
#define FTFx_VERIFY_SECTION
#define FEATURE_FLS_EE_SIZE_1111
uint16_t sectorEraseCount
#define FTFx_FCNFG_EEERDY_MASK
void FLASH_DRV_EraseResume(void)
Flash erase resume.
#define FEATURE_FLS_PF_SECTOR_CMD_ADDRESS_ALIGMENT
status_t FLASH_DRV_SetEERAMProtection(uint8_t protectStatus)
EERAM set protection.
flash_callback_t CallBack
#define FEATURE_FLS_PF_BLOCK_CMD_ADDRESS_ALIGMENT
#define FEATURE_FLS_EE_SIZE_1100
#define FEATURE_FLS_EE_SIZE_0011
#define CLEAR_FTFx_FSTAT_ERROR_BITS
status_t FLASH_DRV_GetEERAMProtection(uint8_t *protectStatus)
EERAM get protection.
#define FTFx_SWAP_SET_IN_PREPARE
Set Swap in Update State.
#define FEATURE_FLS_DF_SIZE_0001
#define FLASH_NOT_SECURE
Flash currently not in secure state.
void FLASH_DRV_EraseSuspend(void)
Flash erase suspend.
#define FEATURE_FLS_EE_SIZE_0010
#define FEATURE_FLS_DF_SIZE_1010
status_t FLASH_DRV_EEEWrite(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pData)
EEPROM Emulator Write.
#define FEATURE_FLS_EE_SIZE_0001
#define FTFx_PROGRAM_ONCE
#define FEATURE_FLS_EE_SIZE_0101
#define FLASH_SECURE_BACKDOOR_DISABLED
Flash is secured and backdoor key access disabled.
status_t FLASH_DRV_EraseSector(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size)
Flash erase sector.
#define GET_BIT_0_7(value)
#define FEATURE_FLS_DF_SIZE_1000
void FLASH_DRV_DisableDoubleBitFaultInterupt(void)
Disable the double bit fault detect interrupt.
#define FTFx_FSTAT_RDCOLERR_MASK
#define FTFx_SWAP_UPDATE
Update swap mode.
#define FLASH_CALLBACK_CS
Callback period count for FlashCheckSum.
#define FTFx_PROGRAM_CHECK
#define FEATURE_FLS_EE_SIZE_1011
#define FEATURE_FLS_DF_SIZE_0101
status_t FLASH_DRV_Init(const flash_user_config_t *const pUserConf, flash_ssd_config_t *const pSSDConfig)
Initializes Flash.
#define FEATURE_FLS_DF_BLOCK_SIZE
#define FTFx_SECURITY_BY_PASS
#define FTFx_ERASE_ALL_BLOCK
#define START_FUNCTION_DECLARATION_RAMSECTION
Places a function in RAM.
status_t FLASH_DRV_Program(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pData)
Flash program.
#define FTFx_ERASE_ALL_BLOCK_UNSECURE
#define FTFx_SWAP_REPORT_STATUS
Report Swap Status.
#define FTFx_SWAP_READY
Ready swap mode.
status_t FLASH_DRV_EnableReadColisionInterupt(void)
Enable the read collision error interrupt.
#define CSE_KEY_SIZE_CODE_MAX
#define FEATURE_FLS_DF_BLOCK_SECTOR_SIZE
status_t FLASH_DRV_VerifyBlock(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint8_t marginLevel)
Flash verify block.
flash_flexRam_function_control_code_t
FlexRAM Function control Code.
#define FEATURE_FLS_DF_SIZE_0110
#define FEATURE_FLS_DF_SIZE_0111
#define FEATURE_FLS_PF_RESOURCE_CMD_ADDRESS_ALIGMENT
#define SIM_FCFG1_DEPART_SHIFT
#define FTFx_RSRC_CODE_REG
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
#define FEATURE_FLS_DF_SIZE_1110
static START_FUNCTION_DECLARATION_RAMSECTION status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t *pSSDConfig) END_FUNCTION_DECLARATION_RAMSECTION static void FLASH_DRV_GetDEPartitionCode(flash_ssd_config_t *const pSSDConfig
#define GET_BIT_8_15(value)
#define FEATURE_FLS_PF_SECTION_CMD_ADDRESS_ALIGMENT
void FLASH_DRV_GetPFlashProtection(uint32_t *protectStatus)
P-Flash get protection.
#define FEATURE_FLS_DF_SECTOR_CMD_ADDRESS_ALIGMENT
status_t FLASH_DRV_ProgramCheck(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pExpectedData, uint32_t *pFailAddr, uint8_t marginLevel)
Flash program check.
#define FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT
status_t FLASH_DRV_SetFlexRamFunction(const flash_ssd_config_t *pSSDConfig, flash_flexRam_function_control_code_t flexRamFuncCode, uint16_t byteOfQuickWrite, flash_eeprom_status_t *const pEEPROMStatus)
Set FlexRAM function.
#define FEATURE_FLS_DF_RESOURCE_CMD_ADDRESS_ALIGMENT
#define FTFx_SWAP_SET_INDICATOR_ADDR
Initialize Swap System control code.
status_t FLASH_DRV_CheckSum(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, uint32_t *pSum)
Calculates check sum.
#define FTFx_FSTAT_FPVIOL_MASK
#define FTFx_PROGRAM_LONGWORD
#define GET_BIT_24_31(value)
status_t FLASH_DRV_SetDFlashProtection(const flash_ssd_config_t *pSSDConfig, uint8_t protectStatus)
D-Flash set protection.
status_t FLASH_DRV_EraseBlock(const flash_ssd_config_t *pSSDConfig, uint32_t dest)
Flash erase block.
#define FEATURE_FLS_EE_SIZE_0111
#define FEATURE_FLS_PF_BLOCK_SECTOR_SIZE
#define SUSPEND_WAIT_CNT
Suspend wait count used in FLASH_DRV_EraseSuspend function.
#define FLASH_SECURITY_STATE_UNSECURED
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
IRQn_Type
Defines the Interrupt Numbers definitions.
status_t FLASH_DRV_ProgramSection(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint16_t number)
Flash program section.
#define FEATURE_FLS_EE_SIZE_1000
#define FEATURE_FLS_EE_SIZE_0110
#define FTFx_FSEC_KEYEN_MASK
#define FTFx_FSTAT_CCIF_MASK
#define FEATURE_FLS_DF_SIZE_1111
status_t FLASH_DRV_EnableCmdCompleteInterupt(void)
Enable the command complete interrupt.
void FLASH_DRV_DisableCmdCompleteInterupt(void)
Disable the command complete interrupt.
#define FEATURE_FLS_DF_SIZE_1100
#define FEATURE_FLS_DF_BLOCK_CMD_ADDRESS_ALIGMENT
uint16_t numOfRecordReqMaintain
status_t FLASH_DRV_SetPFlashProtection(uint32_t protectStatus)
P-Flash set protection.
#define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
#define END_FUNCTION_DEFINITION_RAMSECTION
#define FEATURE_FLS_DF_SIZE_0010
#define FEATURE_FLS_EE_SIZE_1101
#define FEATURE_FLS_DF_SIZE_1101
#define FTFx_SWAP_UPDATE_ERASED
Update-Erased swap mode.
#define FTFx_PROGRAM_PHRASE
#define FTFx_READ_RESOURCE
status_t FLASH_DRV_VerifySection(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint16_t number, uint8_t marginLevel)
Flash verify section.
#define FTFx_FSTAT_MGSTAT0_MASK
status_t FLASH_DRV_ReadOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, uint8_t *pDataArray)
Flash read once.
#define FTFx_VERIFY_ALL_BLOCK
#define FEATURE_FLS_EE_SIZE_1010
#define FTFx_PROGRAM_SECTION
Flash SSD Configuration Structure.
#define FTFx_FCNFG_ERSSUSP_MASK
#define START_FUNCTION_DEFINITION_RAMSECTION
status_t FLASH_DRV_EraseAllBlock(const flash_ssd_config_t *pSSDConfig)
Flash erase all blocks.
#define FEATURE_FLS_EE_SIZE_1110
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
#define FEATURE_FLS_EE_SIZE_0100
#define FTFx_ERASE_SECTOR
#define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
#define SIM_FCFG1_DEPART_MASK
#define FEATURE_FLS_DF_SECTION_CMD_ADDRESS_ALIGMENT
#define FLASH_SECURE_BACKDOOR_ENABLED
Flash is secured and backdoor key access enabled.
#define FTFC_COMMAND_COMPLETE_IRQS
#define FEATURE_FLS_EE_SIZE_0000
#define FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE
#define FEATURE_FLS_EE_SIZE_1001
#define FEATURE_FLS_FLEX_RAM_SIZE
#define GET_BIT_16_23(value)
#define RESUME_WAIT_CNT
Resume wait count used in FLASH_DRV_EraseResume function.
status_t FLASH_DRV_EnableDoubleBitFaultInterupt(void)
Enable the double bit fault detect interrupt.
#define FEATURE_FLS_DF_SIZE_1001
#define FTFx_SWAP_UNINIT
Uninitialized swap mode.
void FLASH_DRV_DisableReadColisionInterupt(void)
Disable the read collision error interrupt.
status_t FLASH_DRV_EraseAllBlockUnsecure(const flash_ssd_config_t *pSSDConfig)
Flash erase all blocks unsecure.
#define FTFx_FCNFG_CCIE_MASK
Flash User Configuration Structure.
#define FEATURE_FLS_DF_SIZE_0011
status_t FLASH_DRV_SecurityBypass(const flash_ssd_config_t *pSSDConfig, const uint8_t *keyBuffer)
Flash security bypass.
#define FEATURE_FLS_DF_SIZE_0000
#define FTFx_PROGRAM_PARTITION
status_t FLASH_DRV_ProgramOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, const uint8_t *pDataArray)
Flash program once.
#define FTFx_FERCNFG_DFDIE_MASK
#define FTFC_READ_COLLISION_IRQS
void FLASH_DRV_GetSecurityState(uint8_t *securityState)
Flash get security state.
#define FEATURE_FLS_DF_SIZE_1011
#define FTFx_FCNFG_RDCOLLIE_MASK