#include <platform/devices/S32K118/include/S32K118.h>

Data Fields

union {
   volatile uint32_t   DATA_32
 
   struct {
      volatile uint8_t   DATA_8LL
 
      volatile uint8_t   DATA_8LU
 
      volatile uint8_t   DATA_8HL
 
      volatile uint8_t   DATA_8HU
 
   }   ACCESS8BIT
 
RAMn [32u]
 

Detailed Description

CSE_PRAM - Register Layout Typedef

Definition at line 2114 of file S32K118.h.

Field Documentation

struct { ... } ACCESS8BIT
volatile uint32_t DATA_32

< Defines 'read / write' permissions CSE PRAM 0 Register..CSE PRAM 31 Register, array offset: 0x0, array step: 0x4

Definition at line 2116 of file S32K118.h.

volatile uint8_t DATA_8HL

< Defines 'read / write' permissions CSE PRAM0HL register...CSE PRAM31HL register., array offset: 0x2, array step: 0x4

Definition at line 2120 of file S32K118.h.

volatile uint8_t DATA_8HU

< Defines 'read / write' permissions CSE PRAM0HU register...CSE PRAM31HU register., array offset: 0x3, array step: 0x4

Definition at line 2121 of file S32K118.h.

volatile uint8_t DATA_8LL

< Defines 'read / write' permissions CSE PRAM0LL register...CSE PRAM31LL register., array offset: 0x0, array step: 0x4

Definition at line 2118 of file S32K118.h.

volatile uint8_t DATA_8LU

< Defines 'read / write' permissions CSE PRAM0LU register...CSE PRAM31LU register., array offset: 0x1, array step: 0x4

Definition at line 2119 of file S32K118.h.

union { ... } RAMn[ 32u ]

The documentation for this struct was generated from the following file: