UJA1169.h
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1 /*
2  * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
3  * Copyright 2016 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
18 
38 #ifndef SOURCES_SBC_UJA_1169_H_
39 #define SOURCES_SBC_UJA_1169_H_
40 
41 /*******************************************************************************
42  * Definitions
43  ******************************************************************************/
44 
48 #define SBC_UJA_REG_ADDR_MASK (0xFEU)
49 #define SBC_UJA_REG_ADDR_SHIFT (1U)
50 #define SBC_UJA_REG_ADDR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_REG_ADDR_SHIFT)&SBC_UJA_REG_ADDR_MASK)
51 
55 #define SBC_UJA_WTDOG_CTR_WMC_MASK (0xE0U)
56 #define SBC_UJA_WTDOG_CTR_WMC_SHIFT (5U)
57 #define SBC_UJA_WTDOG_CTR_WMC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_CTR_WMC_SHIFT)&SBC_UJA_WTDOG_CTR_WMC_MASK)
58 
62 #define SBC_UJA_WTDOG_CTR_NWP_MASK (0x0FU)
63 #define SBC_UJA_WTDOG_CTR_NWP_SHIFT (0U)
64 #define SBC_UJA_WTDOG_CTR_NWP_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_CTR_NWP_SHIFT)&SBC_UJA_WTDOG_CTR_NWP_MASK)
65 
69 #define SBC_UJA_WTDOG_CTR_MASK (SBC_UJA_WTDOG_CTR_WMC_MASK | SBC_UJA_WTDOG_CTR_NWP_MASK)
70 #define SBC_UJA_WTDOG_CTR_SHIFT (0U)
71 #define SBC_UJA_WTDOG_CTR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_CTR_SHIFT)&SBC_UJA_WTDOG_CTR_MASK)
72 
76 #define SBC_UJA_MODE_MC_MASK (0x07U)
77 #define SBC_UJA_MODE_MC_SHIFT (0U)
78 #define SBC_UJA_MODE_MC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MODE_MC_SHIFT)&SBC_UJA_MODE_MC_MASK)
79 
83 #define SBC_UJA_MODE_MASK (SBC_UJA_MODE_MC_MASK)
84 #define SBC_UJA_MODE_SHIFT (SBC_UJA_MODE_MC_SHIFT)
85 #define SBC_UJA_MODE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MODE_SHIFT)&SBC_UJA_MODE_MASK)
86 
90 #define SBC_UJA_FAIL_SAFE_LHC_MASK (0x04U)
91 #define SBC_UJA_FAIL_SAFE_LHC_SHIFT (2U)
92 #define SBC_UJA_FAIL_SAFE_LHC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FAIL_SAFE_LHC_SHIFT)&SBC_UJA_FAIL_SAFE_LHC_MASK)
93 
97 #define SBC_UJA_FAIL_SAFE_RCC_MASK (0x03U)
98 #define SBC_UJA_FAIL_SAFE_RCC_SHIFT (0U)
99 #define SBC_UJA_FAIL_SAFE_RCC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FAIL_SAFE_RCC_SHIFT)&SBC_UJA_FAIL_SAFE_RCC_MASK)
100 
104 #define SBC_UJA_FAIL_SAFE_MASK (SBC_UJA_FAIL_SAFE_LHC_MASK | SBC_UJA_FAIL_SAFE_RCC_MASK)
105 #define SBC_UJA_FAIL_SAFE_SHIFT (0U)
106 #define SBC_UJA_FAIL_SAFE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FAIL_SAFE_SHIFT)&SBC_UJA_FAIL_SAFE_MASK)
107 
111 #define SBC_UJA_MAIN_OTWS_MASK (0x40U)
112 #define SBC_UJA_MAIN_OTWS_SHIFT (6U)
113 #define SBC_UJA_MAIN_OTWS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MAIN_OTWS_SHIFT)&SBC_UJA_MAIN_OTWS_MASK)
114 
118 #define SBC_UJA_MAIN_NMS_MASK (0x20U)
119 #define SBC_UJA_MAIN_NMS_SHIFT (5U)
120 #define SBC_UJA_MAIN_NMS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MAIN_NMS_SHIFT)&SBC_UJA_MAIN_NMS_MASK)
121 
125 #define SBC_UJA_MAIN_RSS_MASK (0x1FU)
126 #define SBC_UJA_MAIN_RSS_SHIFT (0U)
127 #define SBC_UJA_MAIN_RSS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MAIN_RSS_SHIFT)&SBC_UJA_MAIN_RSS_MASK)
128 
132 #define SBC_UJA_MAIN_MASK (SBC_UJA_MAIN_OTWS_MASK | SBC_UJA_MAIN_NMS_MASK | SBC_UJA_MAIN_RSS_MASK)
133 #define SBC_UJA_MAIN_SHIFT (0U)
134 #define SBC_UJA_MAIN_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MAIN_SHIFT)&SBC_UJA_MAIN_MASK)
135 
139 #define SBC_UJA_SYS_EVNT_OTWE_MASK (0x04U)
140 #define SBC_UJA_SYS_EVNT_OTWE_SHIFT (2U)
141 #define SBC_UJA_SYS_EVNT_OTWE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_OTWE_SHIFT)&SBC_UJA_SYS_EVNT_OTWE_MASK)
142 
146 #define SBC_UJA_SYS_EVNT_SPIFE_MASK (0x02U)
147 #define SBC_UJA_SYS_EVNT_SPIFE_SHIFT (1U)
148 #define SBC_UJA_SYS_EVNT_SPIFE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_SPIFE_SHIFT)&SBC_UJA_SYS_EVNT_SPIFE_MASK)
149 
153 #define SBC_UJA_SYS_EVNT_MASK (SBC_UJA_SYS_EVNT_OTWE_MASK | SBC_UJA_SYS_EVNT_SPIFE_MASK)
154 #define SBC_UJA_SYS_EVNT_SHIFT (1U)
155 #define SBC_UJA_SYS_EVNT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_SHIFT)&SBC_UJA_SYS_EVNT_MASK)
156 
160 #define SBC_UJA_WTDOG_STAT_FNMS_MASK (0x08U)
161 #define SBC_UJA_WTDOG_STAT_FNMS_SHIFT (3U)
162 #define SBC_UJA_WTDOG_STAT_FNMS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_STAT_FNMS_SHIFT)&SBC_UJA_WTDOG_STAT_FNMS_MASK)
163 
167 #define SBC_UJA_WTDOG_STAT_SDMS_MASK (0x04U)
168 #define SBC_UJA_WTDOG_STAT_SDMS_SHIFT (2U)
169 #define SBC_UJA_WTDOG_STAT_SDMS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_STAT_SDMS_SHIFT)&SBC_UJA_WTDOG_STAT_SDMS_MASK)
170 
174 #define SBC_UJA_WTDOG_STAT_WDS_MASK (0x03U)
175 #define SBC_UJA_WTDOG_STAT_WDS_SHIFT (0U)
176 #define SBC_UJA_WTDOG_STAT_WDS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_STAT_WDS_SHIFT)&SBC_UJA_WTDOG_STAT_WDS_MASK)
177 
181 #define SBC_UJA_WTDOG_STAT_MASK (SBC_UJA_WTDOG_STAT_FNMS_MASK | SBC_UJA_WTDOG_STAT_SDMS_MASK \
182  | SBC_UJA_WTDOG_STAT_WDS_MASK)
183 #define SBC_UJA_WTDOG_STAT_SHIFT (0U)
184 #define SBC_UJA_WTDOG_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WTDOG_STAT_SHIFT)&SBC_UJA_WTDOG_STAT_MASK)
185 
189 #define SBC_UJA_MEMORY_X_MASK (0xFFU)
190 #define SBC_UJA_MEMORY_X_SHIFT (0U)
191 #define SBC_UJA_MEMORY_X_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MEMORY_X_SHIFT)&SBC_UJA_MEMORY_X_MASK)
192 
196 #define SBC_UJA_LOCK_LK6C_MASK (0x40U)
197 #define SBC_UJA_LOCK_LK6C_SHIFT (6U)
198 #define SBC_UJA_LOCK_LK6C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK6C_SHIFT)&SBC_UJA_LOCK_LK6C_MASK)
199 
203 #define SBC_UJA_LOCK_LK5C_MASK (0x20U)
204 #define SBC_UJA_LOCK_LK5C_SHIFT (5U)
205 #define SBC_UJA_LOCK_LK5C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK5C_SHIFT)&SBC_UJA_LOCK_LK5C_MASK)
206 
210 #define SBC_UJA_LOCK_LK4C_MASK (0x10U)
211 #define SBC_UJA_LOCK_LK4C_SHIFT (4U)
212 #define SBC_UJA_LOCK_LK4C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK4C_SHIFT)&SBC_UJA_LOCK_LK4C_MASK)
213 
217 #define SBC_UJA_LOCK_LK3C_MASK (0x08U)
218 #define SBC_UJA_LOCK_LK3C_SHIFT (3U)
219 #define SBC_UJA_LOCK_LK3C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK3C_SHIFT)&SBC_UJA_LOCK_LK3C_MASK)
220 
224 #define SBC_UJA_LOCK_LK2C_MASK (0x04U)
225 #define SBC_UJA_LOCK_LK2C_SHIFT (2U)
226 #define SBC_UJA_LOCK_LK2C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK2C_SHIFT)&SBC_UJA_LOCK_LK2C_MASK)
227 
231 #define SBC_UJA_LOCK_LK1C_MASK (0x02U)
232 #define SBC_UJA_LOCK_LK1C_SHIFT (1U)
233 #define SBC_UJA_LOCK_LK1C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK1C_SHIFT)&SBC_UJA_LOCK_LK1C_MASK)
234 
238 #define SBC_UJA_LOCK_LK0C_MASK (0x01U)
239 #define SBC_UJA_LOCK_LK0C_SHIFT (0U)
240 #define SBC_UJA_LOCK_LK0C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LK0C_SHIFT)&SBC_UJA_LOCK_LK0C_MASK)
241 
245 #define SBC_UJA_LOCK_LKNC_MASK (SBC_UJA_LOCK_LK0C_MASK | SBC_UJA_LOCK_LK1C_MASK \
246  | SBC_UJA_LOCK_LK2C_MASK | SBC_UJA_LOCK_LK3C_MASK \
247  | SBC_UJA_LOCK_LK4C_MASK | SBC_UJA_LOCK_LK5C_MASK \
248  | SBC_UJA_LOCK_LK6C_MASK)
249 #define SBC_UJA_LOCK_LKNC_SHIFT (0U)
250 #define SBC_UJA_LOCK_LKNC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_LOCK_LKNC_SHIFT)&SBC_UJA_LOCK_LKNC_MASK)
251 
255 #define SBC_UJA_REGULATOR_PDC_MASK (0x40U)
256 #define SBC_UJA_REGULATOR_PDC_SHIFT (6U)
257 #define SBC_UJA_REGULATOR_PDC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_REGULATOR_PDC_SHIFT)&SBC_UJA_REGULATOR_PDC_MASK)
258 
262 #define SBC_UJA_REGULATOR_V2C_MASK (0x0CU)
263 #define SBC_UJA_REGULATOR_V2C_SHIFT (2U)
264 #define SBC_UJA_REGULATOR_V2C_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_REGULATOR_V2C_SHIFT)&SBC_UJA_REGULATOR_V2C_MASK)
265 
269 #define SBC_UJA_REGULATOR_V1RTC_MASK (0x03U)
270 #define SBC_UJA_REGULATOR_V1RTC_SHIFT (0U)
271 #define SBC_UJA_REGULATOR_V1RTC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_REGULATOR_V1RTC_SHIFT)&SBC_UJA_REGULATOR_V1RTC_MASK)
272 
276 #define SBC_UJA_REGULATOR_MASK (SBC_UJA_REGULATOR_PDC_MASK | SBC_UJA_REGULATOR_V2C_MASK | SBC_UJA_REGULATOR_V1RTC_MASK)
277 #define SBC_UJA_REGULATOR_SHIFT (0U)
278 #define SBC_UJA_REGULATOR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_REGULATOR_SHIFT)&SBC_UJA_REGULATOR_MASK)
279 
283 #define SBC_UJA_SUPPLY_STAT_V2S_MASK (0x06U)
284 #define SBC_UJA_SUPPLY_STAT_V2S_SHIFT (1U)
285 #define SBC_UJA_SUPPLY_STAT_V2S_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_STAT_V2S_SHIFT)&SBC_UJA_SUPPLY_STAT_V2S_MASK)
286 
290 #define SBC_UJA_SUPPLY_STAT_V1S_MASK (0x01U)
291 #define SBC_UJA_SUPPLY_STAT_V1S_SHIFT (0U)
292 #define SBC_UJA_SUPPLY_STAT_V1S_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_STAT_V1S_SHIFT)&SBC_UJA_SUPPLY_STAT_V1S_MASK)
293 
297 #define SBC_UJA_SUPPLY_STAT_MASK (SBC_UJA_SUPPLY_STAT_V2S_MASK | SBC_UJA_SUPPLY_STAT_V1S_MASK)
298 #define SBC_UJA_SUPPLY_STAT_SHIFT (0U)
299 #define SBC_UJA_SUPPLY_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_STAT_SHIFT)&SBC_UJA_SUPPLY_STAT_MASK)
300 
305 #define SBC_UJA_SUPPLY_EVNT_V2OE_MASK (0x04U)
306 #define SBC_UJA_SUPPLY_EVNT_V2OE_SHIFT (2U)
307 #define SBC_UJA_SUPPLY_EVNT_V2OE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_EVNT_V2OE_SHIFT)&SBC_UJA_SUPPLY_EVNT_V2OE_MASK)
308 
313 #define SBC_UJA_SUPPLY_EVNT_V2UE_MASK (0x02U)
314 #define SBC_UJA_SUPPLY_EVNT_V2UE_SHIFT (1U)
315 #define SBC_UJA_SUPPLY_EVNT_V2UE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_EVNT_V2UE_SHIFT)&SBC_UJA_SUPPLY_EVNT_V2UE_MASK)
316 
320 #define SBC_UJA_SUPPLY_EVNT_V1UE_MASK (0x01U)
321 #define SBC_UJA_SUPPLY_EVNT_V1UE_SHIFT (0U)
322 #define SBC_UJA_SUPPLY_EVNT_V1UE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_EVNT_V1UE_SHIFT)&SBC_UJA_SUPPLY_EVNT_V1UE_MASK)
323 
327 #define SBC_UJA_SUPPLY_EVNT_MASK (SBC_UJA_SUPPLY_EVNT_V2OE_MASK| SBC_UJA_SUPPLY_EVNT_V2UE_MASK \
328  | SBC_UJA_SUPPLY_EVNT_V1UE_MASK)
329 #define SBC_UJA_SUPPLY_EVNT_SHIFT (0U)
330 #define SBC_UJA_SUPPLY_EVNT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUPPLY_EVNT_SHIFT)&SBC_UJA_SUPPLY_EVNT_MASK)
331 
335 #define SBC_UJA_CAN_CFDC_MASK (0x40U)
336 #define SBC_UJA_CAN_CFDC_SHIFT (6U)
337 #define SBC_UJA_CAN_CFDC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_CAN_CFDC_SHIFT)&SBC_UJA_CAN_CFDC_MASK)
338 
342 #define SBC_UJA_CAN_PNCOK_MASK (0x20U)
343 #define SBC_UJA_CAN_PNCOK_SHIFT (5U)
344 #define SBC_UJA_CAN_PNCOK_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_CAN_PNCOK_SHIFT)&SBC_UJA_CAN_PNCOK_MASK)
345 
349 #define SBC_UJA_CAN_CPNC_MASK (0x10U)
350 #define SBC_UJA_CAN_CPNC_SHIFT (4U)
351 #define SBC_UJA_CAN_CPNC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_CAN_CPNC_SHIFT)&SBC_UJA_CAN_CPNC_MASK)
352 
356 #define SBC_UJA_CAN_CMC_MASK (0x03U)
357 #define SBC_UJA_CAN_CMC_SHIFT (0U)
358 #define SBC_UJA_CAN_CMC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_CAN_CMC_SHIFT)&SBC_UJA_CAN_CMC_MASK)
359 
363 #define SBC_UJA_CAN_MASK (SBC_UJA_CAN_CFDC_MASK | SBC_UJA_CAN_PNCOK_MASK \
364  | SBC_UJA_CAN_CPNC_MASK | SBC_UJA_CAN_CMC_MASK)
365 #define SBC_UJA_CAN_SHIFT (0U)
366 #define SBC_UJA_CAN_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_CAN_SHIFT)&SBC_UJA_CAN_MASK)
367 
371 #define SBC_UJA_TRANS_STAT_CTS_MASK (0x80U)
372 #define SBC_UJA_TRANS_STAT_CTS_SHIFT (7U)
373 #define SBC_UJA_TRANS_STAT_CTS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_CTS_SHIFT)&SBC_UJA_TRANS_STAT_CTS_MASK)
374 
378 #define SBC_UJA_TRANS_STAT_CPNERR_MASK (0x40U)
379 #define SBC_UJA_TRANS_STAT_CPNERR_SHIFT (6U)
380 #define SBC_UJA_TRANS_STAT_CPNERR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_CPNERR_SHIFT)&SBC_UJA_TRANS_STAT_CPNERR_MASK)
381 
385 #define SBC_UJA_TRANS_STAT_CPNS_MASK (0x20U)
386 #define SBC_UJA_TRANS_STAT_CPNS_SHIFT (5U)
387 #define SBC_UJA_TRANS_STAT_CPNS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_CPNS_SHIFT)&SBC_UJA_TRANS_STAT_CPNS_MASK)
388 
392 #define SBC_UJA_TRANS_STAT_COSCS_MASK (0x10U)
393 #define SBC_UJA_TRANS_STAT_COSCS_SHIFT (4U)
394 #define SBC_UJA_TRANS_STAT_COSCS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_COSCS_SHIFT)&SBC_UJA_TRANS_STAT_COSCS_MASK)
395 
399 #define SBC_UJA_TRANS_STAT_CBSS_MASK (0x08U)
400 #define SBC_UJA_TRANS_STAT_CBSS_SHIFT (3U)
401 #define SBC_UJA_TRANS_STAT_CBSS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_CBSS_SHIFT)&SBC_UJA_TRANS_STAT_CBSS_MASK)
402 
406 #define SBC_UJA_TRANS_STAT_VCS_MASK (0x02U)
407 #define SBC_UJA_TRANS_STAT_VCS_SHIFT (1U)
408 #define SBC_UJA_TRANS_STAT_VCS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_VCS_SHIFT)&SBC_UJA_TRANS_STAT_VCS_MASK)
409 
413 #define SBC_UJA_TRANS_STAT_CFS_MASK (0x01U)
414 #define SBC_UJA_TRANS_STAT_CFS_SHIFT (0U)
415 #define SBC_UJA_TRANS_STAT_CFS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_CFS_SHIFT)&SBC_UJA_TRANS_STAT_CFS_MASK)
416 
420 #define SBC_UJA_TRANS_STAT_MASK (SBC_UJA_TRANS_STAT_CTS_MASK | SBC_UJA_TRANS_STAT_CPNERR_MASK \
421  | SBC_UJA_TRANS_STAT_CPNS_MASK | SBC_UJA_TRANS_STAT_COSCS_MASK \
422  | SBC_UJA_TRANS_STAT_CBSS_MASK | SBC_UJA_TRANS_STAT_VCS_MASK \
423  | SBC_UJA_TRANS_STAT_CFS_MASK)
424 #define SBC_UJA_TRANS_STAT_SHIFT (0U)
425 #define SBC_UJA_TRANS_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_STAT_SHIFT)&SBC_UJA_TRANS_STAT_MASK)
426 
430 #define SBC_UJA_TRANS_EVNT_CBSE_MASK (0x10U)
431 #define SBC_UJA_TRANS_EVNT_CBSE_SHIFT (4U)
432 #define SBC_UJA_TRANS_EVNT_CBSE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_CBSE_SHIFT)&SBC_UJA_TRANS_EVNT_CBSE_MASK)
433 
437 #define SBC_UJA_TRANS_EVNT_CFE_MASK (0x02U)
438 #define SBC_UJA_TRANS_EVNT_CFE_SHIFT (1U)
439 #define SBC_UJA_TRANS_EVNT_CFE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_CFE_SHIFT)&SBC_UJA_TRANS_EVNT_CFE_MASK)
440 
444 #define SBC_UJA_TRANS_EVNT_CWE_MASK (0x01U)
445 #define SBC_UJA_TRANS_EVNT_CWE_SHIFT (0U)
446 #define SBC_UJA_TRANS_EVNT_CWE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_CWE_SHIFT)&SBC_UJA_TRANS_EVNT_CWE_MASK)
447 
451 #define SBC_UJA_TRANS_EVNT_MASK (SBC_UJA_TRANS_EVNT_CBSE_MASK | SBC_UJA_TRANS_EVNT_CFE_MASK \
452  | SBC_UJA_TRANS_EVNT_CWE_MASK)
453 #define SBC_UJA_TRANS_EVNT_SHIFT (0U)
454 #define SBC_UJA_TRANS_EVNT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_SHIFT)&SBC_UJA_TRANS_EVNT_MASK)
455 
459 #define SBC_UJA_DAT_RATE_CDR_MASK (0x07U)
460 #define SBC_UJA_DAT_RATE_CDR_SHIFT (0U)
461 #define SBC_UJA_DAT_RATE_CDR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_DAT_RATE_CDR_SHIFT)&SBC_UJA_DAT_RATE_CDR_MASK)
462 
466 #define SBC_UJA_DAT_RATE_MASK (SBC_UJA_DAT_RATE_CDR_MASK)
467 #define SBC_UJA_DAT_RATE_SHIFT (SBC_UJA_DAT_RATE_CDR_SHIFT)
468 #define SBC_UJA_DAT_RATE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_DAT_RATE_SHIFT)&SBC_UJA_DAT_RATE_MASK)
469 
473 #define SBC_UJA_IDENTIF_0700_MASK (0xFFU)
474 #define SBC_UJA_IDENTIF_0700_SHIFT (0U)
475 #define SBC_UJA_IDENTIF_0700_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_0700_SHIFT)&SBC_UJA_IDENTIF_0700_MASK)
476 
480 #define SBC_UJA_IDENTIF_1508_MASK (0xFFU)
481 #define SBC_UJA_IDENTIF_1508_SHIFT (0U)
482 #define SBC_UJA_IDENTIF_1508_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_1508_SHIFT)&SBC_UJA_IDENTIF_1508_MASK)
483 
487 #define SBC_UJA_IDENTIF_2318_MASK (0xFCU)
488 #define SBC_UJA_IDENTIF_2318_SHIFT (2U)
489 #define SBC_UJA_IDENTIF_2318_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_2318_SHIFT)&SBC_UJA_IDENTIF_2318_MASK)
490 
494 #define SBC_UJA_IDENTIF_1716_MASK (0x03U)
495 #define SBC_UJA_IDENTIF_1716_SHIFT (0U)
496 #define SBC_UJA_IDENTIF_1716_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_1716_SHIFT)&SBC_UJA_IDENTIF_1716_MASK)
497 
501 #define SBC_UJA_IDENTIF_2316_MASK (0xFFU)
502 #define SBC_UJA_IDENTIF_2316_SHIFT (0U)
503 #define SBC_UJA_IDENTIF_2316_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_2316_SHIFT)&SBC_UJA_IDENTIF_2316_MASK)
504 
508 #define SBC_UJA_IDENTIF_2824_MASK (0x1FU)
509 #define SBC_UJA_IDENTIF_2824_SHIFT (0U)
510 #define SBC_UJA_IDENTIF_2824_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_2824_SHIFT)&SBC_UJA_IDENTIF_2824_MASK)
511 
515 #define SBC_UJA_IDENTIF_X_MASK (0xFFU)
516 #define SBC_UJA_IDENTIF_X_SHIFT (0U)
517 #define SBC_UJA_IDENTIF_X_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_0_SHIFT)&SBC_UJA_IDENTIF_0_MASK)
518 
522 #define SBC_UJA_MASK_0700_MASK (0xFFU)
523 #define SBC_UJA_MASK_0700_SHIFT (0U)
524 #define SBC_UJA_MASK_0700_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_0700_SHIFT)&SBC_UJA_MASK_0700_MASK)
525 
529 #define SBC_UJA_MASK_1508_MASK (0xFFU)
530 #define SBC_UJA_MASK_1508_SHIFT (0U)
531 #define SBC_UJA_MASK_1508_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_1508_SHIFT)&SBC_UJA_MASK_1508_MASK)
532 
536 #define SBC_UJA_MASK_2318_MASK (0xFCU)
537 #define SBC_UJA_MASK_2318_SHIFT (2U)
538 #define SBC_UJA_MASK_2318_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_2318_SHIFT)&SBC_UJA_MASK_2318_MASK)
539 
543 #define SBC_UJA_MASK_1716_MASK (0x03U)
544 #define SBC_UJA_MASK_1716_SHIFT (2U)
545 #define SBC_UJA_MASK_1716_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_1716_SHIFT)&SBC_UJA_MASK_1716_MASK)
546 
550 #define SBC_UJA_MASK_2316_MASK (0xFFU)
551 #define SBC_UJA_MASK_2316_SHIFT (0U)
552 #define SBC_UJA_MASK_2316_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_2316_SHIFT)&SBC_UJA_MASK_2316_MASK)
553 
557 #define SBC_UJA_MASK_2824_MASK (0x1FU)
558 #define SBC_UJA_MASK_2824_SHIFT (0U)
559 #define SBC_UJA_MASK_2824_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_2824_SHIFT)&SBC_UJA_MASK_2824_MASK)
560 
564 #define SBC_UJA_MASK_X_MASK (0xFFU)
565 #define SBC_UJA_MASK_X_SHIFT (0U)
566 #define SBC_UJA_MASK_X_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MASK_X_SHIFT)&SBC_UJA_MASK_X_MASK)
567 
571 #define SBC_UJA_FRAME_CTR_IDE_MASK (0x80U)
572 #define SBC_UJA_FRAME_CTR_IDE_SHIFT (7U)
573 #define SBC_UJA_FRAME_CTR_IDE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FRAME_CTR_IDE_SHIFT)&SBC_UJA_FRAME_CTR_IDE_MASK)
574 
578 #define SBC_UJA_FRAME_CTR_PNDM_MASK (0x40U)
579 #define SBC_UJA_FRAME_CTR_PNDM_SHIFT (6U)
580 #define SBC_UJA_FRAME_CTR_PNDM_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FRAME_CTR_PNDM_SHIFT)&SBC_UJA_FRAME_CTR_PNDM_MASK)
581 
585 #define SBC_UJA_FRAME_CTR_DLC_MASK (0x0FU)
586 #define SBC_UJA_FRAME_CTR_DLC_SHIFT (0U)
587 #define SBC_UJA_FRAME_CTR_DLC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FRAME_CTR_DLC_SHIFT)&SBC_UJA_FRAME_CTR_DLC_MASK)
588 
592 #define SBC_UJA_FRAME_CTR_MASK (SBC_UJA_FRAME_CTR_IDE_MASK | SBC_UJA_FRAME_CTR_PNDM_MASK \
593  | SBC_UJA_FRAME_CTR_DLC_MASK)
594 #define SBC_UJA_FRAME_CTR_SHIFT (0U)
595 #define SBC_UJA_FRAME_CTR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_FRAME_CTR_SHIFT)&SBC_UJA_FRAME_CTR_MASK)
596 
601 #define SBC_UJA_DATA_MASK_X_MASK (0xFFU)
602 #define SBC_UJA_DATA_MASK_X_SHIFT (0U)
603 #define SBC_UJA_DATA_MASK_X_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_DATA_MASK_X_SHIFT)&SBC_UJA_DATA_MASK_X_MASK)
604 
608 #define SBC_UJA_WAKE_STAT_WPVS_MASK (0x02FU)
609 #define SBC_UJA_WAKE_STAT_WPVS_SHIFT (1U)
610 #define SBC_UJA_WAKE_STAT_WPVS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_STAT_WPVS_SHIFT)&SBC_UJA_WAKE_STAT_WPVS_MASK)
611 
615 #define SBC_UJA_WAKE_STAT_MASK (SBC_UJA_WAKE_STAT_WPVS_MASK)
616 #define SBC_UJA_WAKE_STAT_SHIFT (SBC_UJA_WAKE_STAT_WPVS_SHIFT)
617 #define SBC_UJA_WAKE_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_STAT_SHIFT)&SBC_UJA_WAKE_STAT_MASK)
618 
623 #define SBC_UJA_WAKE_EN_WPRE_MASK (0x02U)
624 #define SBC_UJA_WAKE_EN_WPRE_SHIFT (1U)
625 #define SBC_UJA_WAKE_EN_WPRE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EN_WPRE_SHIFT)&SBC_UJA_WAKE_EN_WPRE_MASK)
626 
631 #define SBC_UJA_WAKE_EN_WPFE_MASK (0x01U)
632 #define SBC_UJA_WAKE_EN_WPFE_SHIFT (0U)
633 #define SBC_UJA_WAKE_EN_WPFE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EN_WPFE_SHIFT)&SBC_UJA_WAKE_EN_WPFE_MASK)
634 
638 #define SBC_UJA_WAKE_EN_MASK (SBC_UJA_WAKE_EN_WPRE_MASK | SBC_UJA_WAKE_EN_WPFE_MASK)
639 #define SBC_UJA_WAKE_EN_SHIFT (0U)
640 #define SBC_UJA_WAKE_EN_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EN_SHIFT)&SBC_UJA_WAKE_EN_MASK)
641 
645 #define SBC_UJA_GL_EVNT_STAT_WPE_MASK (0x08U)
646 #define SBC_UJA_GL_EVNT_STAT_WPE_SHIFT (3U)
647 #define SBC_UJA_GL_EVNT_STAT_WPE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_GL_EVNT_STAT_WPE_SHIFT)&SBC_UJA_GL_EVNT_STAT_WPE_MASK)
648 
652 #define SBC_UJA_GL_EVNT_STAT_TRXE_MASK (0x04U)
653 #define SBC_UJA_GL_EVNT_STAT_TRXE_SHIFT (2U)
654 #define SBC_UJA_GL_EVNT_STAT_TRXE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_GL_EVNT_STAT_TRXE_SHIFT)&SBC_UJA_GL_EVNT_STAT_TRXE_MASK)
655 
659 #define SBC_UJA_GL_EVNT_STAT_SUPE_MASK (0x02U)
660 #define SBC_UJA_GL_EVNT_STAT_SUPE_SHIFT (1U)
661 #define SBC_UJA_GL_EVNT_STAT_SUPE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_GL_EVNT_STAT_SUPE_SHIFT)&SBC_UJA_GL_EVNT_STAT_SUPE_MASK)
662 
666 #define SBC_UJA_GL_EVNT_STAT_SYSE_MASK (0x01U)
667 #define SBC_UJA_GL_EVNT_STAT_SYSE_SHIFT (0U)
668 #define SBC_UJA_GL_EVNT_STAT_SYSE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_GL_EVNT_STAT_SYSE_SHIFT)&SBC_UJA_GL_EVNT_STAT_SYSE_MASK)
669 
673 #define SBC_UJA_GL_EVNT_STAT_MASK (SBC_UJA_GL_EVNT_STAT_WPE_MASK | SBC_UJA_GL_EVNT_STAT_TRXE_MASK \
674  | SBC_UJA_GL_EVNT_STAT_SUPE_MASK | SBC_UJA_GL_EVNT_STAT_SYSE_MASK)
675 #define SBC_UJA_GL_EVNT_STAT_SHIFT (0U)
676 #define SBC_UJA_GL_EVNT_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_GL_EVNT_STAT_SHIFT)&SBC_UJA_GL_EVNT_STAT_MASK)
677 
681 #define SBC_UJA_SYS_EVNT_STAT_PO_MASK (0x10U)
682 #define SBC_UJA_SYS_EVNT_STAT_PO_SHIFT (4U)
683 #define SBC_UJA_SYS_EVNT_STAT_PO_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_STAT_PO_SHIFT)&SBC_UJA_SYS_EVNT_STAT_PO_MASK)
684 
688 #define SBC_UJA_SYS_EVNT_STAT_OTW_MASK (0x04U)
689 #define SBC_UJA_SYS_EVNT_STAT_OTW_SHIFT (2U)
690 #define SBC_UJA_SYS_EVNT_STAT_OTW_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_STAT_OTW_SHIFT)&SBC_UJA_SYS_EVNT_STAT_OTW_MASK)
691 
695 #define SBC_UJA_SYS_EVNT_STAT_SPIF_MASK (0x02U)
696 #define SBC_UJA_SYS_EVNT_STAT_SPIF_SHIFT (1U)
697 #define SBC_UJA_SYS_EVNT_STAT_SPIF_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_STAT_SPIF_SHIFT)&SBC_UJA_SYS_EVNT_STAT_SPIF_MASK)
698 
702 #define SBC_UJA_SYS_EVNT_STAT_WDF_MASK (0x01U)
703 #define SBC_UJA_SYS_EVNT_STAT_WDF_SHIFT (0U)
704 #define SBC_UJA_SYS_EVNT_STAT_WDF_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_STAT_WDF_SHIFT)&SBC_UJA_SYS_EVNT_STAT_WDF_MASK)
705 
709 #define SBC_UJA_SYS_EVNT_STAT_MASK (SBC_UJA_SYS_EVNT_STAT_PO_MASK | SBC_UJA_SYS_EVNT_STAT_OTW_MASK \
710  | SBC_UJA_SYS_EVNT_STAT_SPIF_MASK | SBC_UJA_SYS_EVNT_STAT_WDF_MASK)
711 #define SBC_UJA_SYS_EVNT_STAT_SHIFT (0U)
712 #define SBC_UJA_SYS_EVNT_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SYS_EVNT_STAT_SHIFT)&SBC_UJA_SYS_EVNT_STAT_MASK)
713 
717 #define SBC_UJA_SUP_EVNT_STAT_V2O_MASK (0x04U)
718 #define SBC_UJA_SUP_EVNT_STAT_V2O_SHIFT (2U)
719 #define SBC_UJA_SUP_EVNT_STAT_V2O_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUP_EVNT_STAT_V2O_SHIFT)&SBC_UJA_SUP_EVNT_STAT_V2O_MASK)
720 
724 #define SBC_UJA_SUP_EVNT_STAT_V2U_MASK (0x02U)
725 #define SBC_UJA_SUP_EVNT_STAT_V2U_SHIFT (1U)
726 #define SBC_UJA_SUP_EVNT_STAT_V2U_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUP_EVNT_STAT_V2U_SHIFT)&SBC_UJA_SUP_EVNT_STAT_V2U_MASK)
727 
731 #define SBC_UJA_SUP_EVNT_STAT_V1U_MASK (0x01U)
732 #define SBC_UJA_SUP_EVNT_STAT_V1U_SHIFT (0U)
733 #define SBC_UJA_SUP_EVNT_STAT_V1U_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUP_EVNT_STAT_V1U_SHIFT)&SBC_UJA_SUP_EVNT_STAT_V1U_MASK)
734 
738 #define SBC_UJA_SUP_EVNT_STAT_MASK (SBC_UJA_SUP_EVNT_STAT_V2O_MASK | SBC_UJA_SUP_EVNT_STAT_V2U_MASK \
739  | SBC_UJA_SUP_EVNT_STAT_V1U_MASK)
740 #define SBC_UJA_SUP_EVNT_STAT_SHIFT (0U)
741 #define SBC_UJA_SUP_EVNT_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SUP_EVNT_STAT_SHIFT)&SBC_UJA_SUP_EVNT_STAT_MASK)
742 
747 #define SBC_UJA_TRANS_EVNT_STAT_PNFDE_MASK (0x20U)
748 #define SBC_UJA_TRANS_EVNT_STAT_PNFDE_SHIFT (5U)
749 #define SBC_UJA_TRANS_EVNT_STAT_PNFDE_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_STAT_PNFDE_SHIFT)&SBC_UJA_TRANS_EVNT_STAT_PNFDE_MASK)
750 
754 #define SBC_UJA_TRANS_EVNT_STAT_CBS_MASK (0x10U)
755 #define SBC_UJA_TRANS_EVNT_STAT_CBS_SHIFT (4U)
756 #define SBC_UJA_TRANS_EVNT_STAT_CBS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_STAT_CBS_SHIFT)&SBC_UJA_TRANS_EVNT_STAT_CBS_MASK)
757 
761 #define SBC_UJA_TRANS_EVNT_STAT_CF_MASK (0x02U)
762 #define SBC_UJA_TRANS_EVNT_STAT_CF_SHIFT (1U)
763 #define SBC_UJA_TRANS_EVNT_STAT_CF_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_STAT_CF_SHIFT)&SBC_UJA_TRANS_EVNT_STAT_CF_MASK)
764 
768 #define SBC_UJA_TRANS_EVNT_STAT_CW_MASK (0x01U)
769 #define SBC_UJA_TRANS_EVNT_STAT_CW_SHIFT (0U)
770 #define SBC_UJA_TRANS_EVNT_STAT_CW_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_STAT_CW_SHIFT)&SBC_UJA_TRANS_EVNT_STAT_CW_MASK)
771 
775 #define SBC_UJA_TRANS_EVNT_STAT_MASK (SBC_UJA_TRANS_EVNT_STAT_PNFDE_MASK | SBC_UJA_TRANS_EVNT_STAT_CBS_MASK \
776  | SBC_UJA_TRANS_EVNT_STAT_CF_MASK | SBC_UJA_TRANS_EVNT_STAT_CW_MASK)
777 #define SBC_UJA_TRANS_EVNT_STAT_SHIFT (0U)
778 #define SBC_UJA_TRANS_EVNT_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_TRANS_EVNT_STAT_SHIFT)&SBC_UJA_TRANS_EVNT_STAT_MASK)
779 
783 #define SBC_UJA_WAKE_EVNT_STAT_WPR_MASK (0x02U)
784 #define SBC_UJA_WAKE_EVNT_STAT_WPR_SHIFT (1U)
785 #define SBC_UJA_WAKE_EVNT_STAT_WPR_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EVNT_STAT_WPR_SHIFT)&SBC_UJA_WAKE_EVNT_STAT_WPR_MASK)
786 
790 #define SBC_UJA_WAKE_EVNT_STAT_WPF_MASK (0x01U)
791 #define SBC_UJA_WAKE_EVNT_STAT_WPF_SHIFT (0U)
792 #define SBC_UJA_WAKE_EVNT_STAT_WPF_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EVNT_STAT_WPF_SHIFT)&SBC_UJA_WAKE_EVNT_STAT_WPF_MASK)
793 
797 #define SBC_UJA_WAKE_EVNT_STAT_MASK (SBC_UJA_WAKE_EVNT_STAT_WPR_MASK | SBC_UJA_WAKE_EVNT_STAT_WPF_MASK)
798 #define SBC_UJA_WAKE_EVNT_STAT_SHIFT (0U)
799 #define SBC_UJA_WAKE_EVNT_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_WAKE_EVNT_STAT_SHIFT)&SBC_UJA_WAKE_EVNT_STAT_MASK)
800 
804 #define SBC_UJA_MTPNV_STAT_WRCNTS_MASK (0xFCU)
805 #define SBC_UJA_MTPNV_STAT_WRCNTS_SHIFT (2U)
806 #define SBC_UJA_MTPNV_STAT_WRCNTS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MTPNV_STAT_WRCNTS_SHIFT)&SBC_UJA_MTPNV_STAT_WRCNTS_MASK)
807 
811 #define SBC_UJA_MTPNV_STAT_ECCS_MASK (0x02U)
812 #define SBC_UJA_MTPNV_STAT_ECCS_SHIFT (1U)
813 #define SBC_UJA_MTPNV_STAT_ECCS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MTPNV_STAT_ECCS_SHIFT)&SBC_UJA_MTPNV_STAT_ECCS_MASK)
814 
818 #define SBC_UJA_MTPNV_STAT_NVMPS_MASK (0x01U)
819 #define SBC_UJA_MTPNV_STAT_NVMPS_SHIFT (0U)
820 #define SBC_UJA_MTPNV_STAT_NVMPS_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MTPNV_STAT_NVMPS_SHIFT)&SBC_UJA_MTPNV_STAT_NVMPS_MASK)
821 
825 #define SBC_UJA_MTPNV_STAT_MASK (SBC_UJA_MTPNV_STAT_WRCNTS_MASK | SBC_UJA_MTPNV_STAT_ECCS_MASK \
826  | SBC_UJA_MTPNV_STAT_NVMPS_MASK)
827 #define SBC_UJA_MTPNV_STAT_SHIFT (0U)
828 #define SBC_UJA_MTPNV_STAT_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MTPNV_STAT_SHIFT)&SBC_UJA_MTPNV_STAT_MASK)
829 
833 #define SBC_UJA_START_UP_RLC_MASK (0x30U)
834 #define SBC_UJA_START_UP_RLC_SHIFT (4U)
835 #define SBC_UJA_START_UP_RLC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_START_UP_RLC_SHIFT)&SBC_UJA_START_UP_RLC_MASK)
836 
840 #define SBC_UJA_START_UP_V2SUC_MASK (0x08U)
841 #define SBC_UJA_START_UP_V2SUC_SHIFT (3U)
842 #define SBC_UJA_START_UP_V2SUC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_START_UP_V2SUC_SHIFT)&SBC_UJA_START_UP_V2SUC_MASK)
843 
847 #define SBC_UJA_START_UP_MASK (SBC_UJA_START_UP_RLC_MASK | SBC_UJA_START_UP_V2SUC_MASK)
848 #define SBC_UJA_START_UP_SHIFT (3U)
849 #define SBC_UJA_START_UP_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_START_UP_SHIFT)&SBC_UJA_START_UP_MASK)
850 
855 #define SBC_UJA_SBC_V1RTSUC_MASK (0x30U)
856 #define SBC_UJA_SBC_V1RTSUC_SHIFT (4U)
857 #define SBC_UJA_SBC_V1RTSUC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SBC_V1RTSUC_SHIFT)&SBC_UJA_SBC_V1RTSUC_MASK)
858 
863 #define SBC_UJA_SBC_FNMC_MASK (0x08U)
864 #define SBC_UJA_SBC_FNMC_SHIFT (3U)
865 #define SBC_UJA_SBC_FNMC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SBC_FNMC_SHIFT)&SBC_UJA_SBC_FNMC_MASK)
866 
871 #define SBC_UJA_SBC_SDMC_MASK (0x04U)
872 #define SBC_UJA_SBC_SDMC_SHIFT (2U)
873 #define SBC_UJA_SBC_SDMC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SBC_SDMC_SHIFT)&SBC_UJA_SBC_SDMC_MASK)
874 
878 #define SBC_UJA_SBC_SLPC_MASK (0x01U)
879 #define SBC_UJA_SBC_SLPC_SHIFT (0U)
880 #define SBC_UJA_SBC_SLPC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SBC_SLPC_SHIFT)&SBC_UJA_SBC_SLPC_MASK)
881 
885 #define SBC_UJA_SBC_MASK (SBC_UJA_SBC_V1RTSUC_MASK | SBC_UJA_SBC_FNMC_MASK \
886  | SBC_UJA_SBC_SDMC_MASK| SBC_UJA_SBC_SLPC_MASK)
887 #define SBC_UJA_SBC_SHIFT (0U)
888 #define SBC_UJA_SBC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_SBC_SHIFT)&SBC_UJA_SBC_MASK)
889 
893 #define SBC_UJA_MTPNV_CRC_MASK (0xFFU)
894 #define SBC_UJA_MTPNV_CRC_SHIFT (0U)
895 #define SBC_UJA_MTPNV_CRC_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_MTPNV_CRC_SHIFT)&SBC_UJA_MTPNV_CRC_MASK)
896 
900 #define SBC_UJA_IDENTIF_MASK (0xFFU)
901 #define SBC_UJA_IDENTIF_SHIFT (0U)
902 #define SBC_UJA_IDENTIF_F(x) ((uint8_t)((uint8_t)(x)<<SBC_UJA_IDENTIF_SHIFT)&SBC_UJA_IDENTIF_MASK)
903 
904 #endif /* SOURCES_SBC_UJA_1169_H_ */