75 extern bool faultDetection;
85 #define FTM_RMW_SC(base, mask, value) (((base)->SC) = ((((base)->SC) & ~(mask)) | (value)))
90 #define FTM_RMW_CNT(base, mask, value) (((base)->CNT) = ((((base)->CNT) & ~(mask)) | (value)))
95 #define FTM_RMW_MOD(base, mask, value) (((base)->MOD) = ((((base)->MOD) & ~(mask)) | (value)))
100 #define FTM_RMW_CNTIN(base, mask, value) (((base)->CNTIN) = ((((base)->CNTIN) & ~(mask)) | (value)))
105 #define FTM_RMW_STATUS(base, mask, value) (((base)->STATUS) = ((((base)->STATUS) & ~(mask)) | (value)))
110 #define FTM_RMW_MODE(base, mask, value) (((base)->MODE) = ((((base)->MODE) & ~(mask)) | (value)))
115 #define FTM_RMW_CnSCV_REG(base, channel, mask, value) (((base)->CONTROLS[channel].CnSC) = ((((base)->CONTROLS[channel].CnSC) & ~(mask)) | (value)))
120 #define FTM_RMW_DEADTIME(base, mask, value) (((base)->DEADTIME) = ((((base)->DEADTIME) & ~(mask)) | (value)))
124 #define FTM_RMW_EXTTRIG_REG(base, mask, value) (((base)->EXTTRIG) = ((((base)->EXTTRIG) & ~(mask)) | (value)))
129 #define FTM_RMW_FLTCTRL(base, mask, value) (((base)->FLTCTRL) = ((((base)->FLTCTRL) & ~(mask)) | (value)))
134 #define FTM_RMW_FMS(base, mask, value) (((base)->FMS) = ((((base)->FMS) & ~(mask)) | (value)))
139 #define FTM_RMW_CONF(base, mask, value) (((base)->CONF) = ((((base)->CONF) & ~(mask)) | (value)))
144 #define FTM_RMW_POL(base, mask, value) (((base)->POL) = ((((base)->POL) & ~(mask)) | (value)))
149 #define FTM_RMW_FILTER(base, mask, value) (((base)->FILTER) = ((((base)->FILTER) & ~(mask)) | (value)))
154 #define FTM_RMW_SYNC(base, mask, value) (((base)->SYNC) = ((((base)->SYNC) & ~(mask)) | (value)))
159 #define FTM_RMW_QDCTRL(base, mask, value) (((base)->QDCTRL) = ((((base)->QDCTRL) & ~(mask)) | (value)))
164 #define FTM_RMW_PAIR0DEADTIME(base, mask, value) (((base)->PAIR0DEADTIME) = ((((base)->PAIR0DEADTIME) & ~(mask)) | (value)))
169 #define FTM_RMW_PAIR1DEADTIME(base, mask, value) (((base)->PAIR1DEADTIME) = ((((base)->PAIR1DEADTIME) & ~(mask)) | (value)))
174 #define FTM_RMW_PAIR2DEADTIME(base, mask, value) (((base)->PAIR2DEADTIME) = ((((base)->PAIR2DEADTIME) & ~(mask)) | (value)))
179 #define FTM_RMW_PAIR3DEADTIME(base, mask, value) (((base)->PAIR3DEADTIME) = ((((base)->PAIR3DEADTIME) & ~(mask)) | (value)))
181 #if FEATURE_FTM_HAS_SUPPORTED_DITHERING
185 #define FTM_RMW_MOD_MIRROR(base, mask, value) (((base)->MOD_MIRROR) = ((((base)->MOD_MIRROR) & ~(mask)) | (value)))
190 #define FTM_RMW_CnV_MIRROR(base, channel, mask, value) (((base)->CV_MIRROR[channel]) = ((((base)->CV_MIRROR[channel]) & ~(mask)) | (value)))
194 #define CHAN0_IDX (0U)
196 #define CHAN1_IDX (1U)
198 #define CHAN2_IDX (2U)
200 #define CHAN3_IDX (3U)
202 #define CHAN4_IDX (4U)
204 #define CHAN5_IDX (5U)
206 #define CHAN6_IDX (6U)
208 #define CHAN7_IDX (7U)
393 uint32_t ftmSourceClockFrequency;
415 bool maxLoadingPoint;
417 bool minLoadingPoint;
423 bool autoClearTrigger;
442 bool isTofIsrEnabled;
444 bool enableInitializationTrigger;
458 #if defined(__cplusplus)
471 uint8_t filterPrescale)
545 ((ftmBase)->CONTROLS[channel].CnSC) = 0U;
748 return (uint16_t)((ftmBase)->CONTROLS[channel].CnV);
768 return (((ftmBase)->STATUS) & (1UL << channel)) != 0U;
782 return ((ftmBase)->STATUS) & (0xFFU);
798 ((ftmBase)->STATUS) &= (~(1UL << channel));
824 ((ftmBase)->OUTMASK) |= (1UL << channel);
828 ((ftmBase)->OUTMASK) &= ~(1UL << channel);
851 ((ftmBase)->OUTINIT) |= (1UL << channel);
855 ((ftmBase)->OUTINIT) &= ~(1UL << channel);
984 ((ftmBase)->FMS) &= (~(1UL << channel));
1003 uint8_t chnlPairNum,
1010 ((ftmBase)->INVCTRL) |= (1UL << chnlPairNum);
1014 ((ftmBase)->INVCTRL) &= ~(1UL << chnlPairNum);
1037 ((ftmBase)->SWOCTRL) |= (1UL << channel);
1041 ((ftmBase)->SWOCTRL) &= ~(1UL << channel);
1175 ((ftmBase)->PWMLOAD) |= (1UL << channel);
1179 ((ftmBase)->PWMLOAD) &= ~(1UL << channel);
1256 uint8_t channelPair,
1262 switch (channelPair)
1295 uint8_t channelPair,
1300 switch (channelPair)
1334 uint8_t channelPair,
1340 switch (channelPair)
1360 #if FEATURE_FTM_HAS_SUPPORTED_DITHERING
1488 uint32_t channelsMask,
1489 bool softwareTrigger);
1504 uint16_t counterValue,
1505 bool softwareTrigger);
1518 uint16_t reloadPoint,
1519 bool softwareTrigger);
1535 uint8_t channelsValues,
1536 bool softwareTrigger);
1549 uint8_t channelsMask,
1550 bool softwareTrigger);
1563 uint8_t channelMask,
1564 uint8_t channelValueMask);
1577 uint8_t channelsPairMask,
1578 bool softwareTrigger);
1591 uint16_t counterValue,
1592 bool softwareTrigger);
1633 uint32_t interruptMask);
1643 uint32_t interruptMask);
1692 uint32_t freqencyHz);
1694 #if defined(__cplusplus)
const IRQn_Type g_ftmReloadIrqId[(2u)]
const IRQn_Type g_ftmFaultIrqId[(2u)]
#define FTM_RMW_SC(base, mask, value)
FTM_SC - Read and modify and write to Status And Control (RW)
static uint16_t FTM_DRV_GetCounterInitVal(const FTM_Type *ftmBase)
Returns the FTM peripheral counter initial value.
static uint16_t FTM_DRV_GetMirrorMod(const FTM_Type *ftmBase)
Returns the mirror of the FTM peripheral counter modulo value.
static void FTM_DRV_SetCaptureTestCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM peripheral timer capture test mode.
static void FTM_DRV_SetChnIcrstCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Configure the feature of FTM counter reset by the selected input capture event.
#define FTM_FMS_FAULTF0_MASK
status_t FTM_DRV_SetSoftwareOutputChannelControl(uint32_t instance, uint8_t channelsMask, bool softwareTrigger)
This function will configure which output channel can be software controlled.
static void FTM_DRV_SetPwmLoadCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the loading of MOD, CNTIN and CV with values of their write buffer.
static uint8_t FTM_DRV_GetChnMatchFracVal(const FTM_Type *ftmBase, uint8_t channel)
Returns the channel (n) match fractional value.
static uint16_t FTM_DRV_GetChnCountVal(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel counter value.
#define FTM_CONF_GTBEOUT_MASK
FlexTimer state structure of the driver.
static bool FTM_DRV_GetChOutputValue(const FTM_Type *ftmBase, uint8_t channel)
Get the value of channel output.
static void FTM_DRV_SetChnSoftwareCtrlCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the channel software output control.
static bool FTM_DRV_IsChnIcrst(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the FTM FTM counter is reset.
ftm_state_t * ftmStatePtr[(2u)]
Pointer to runtime state structure.
status_t FTM_DRV_SetSync(uint32_t instance, const ftm_pwm_sync_t *param)
This function configures sync mechanism for some FTM registers (MOD, CNINT, HCR, CnV, OUTMASK, INVCTRL, SWOCTRL).
#define FTM_PWMLOAD_GLEN_SHIFT
ftm_reg_update_t
FTM sync source.
static void FTM_DRV_SetPwmLoadChnSelCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Includes or excludes the channel in the matching process.
#define FTM_CnSC_ELSB_SHIFT
#define FTM_PAIR3DEADTIME_DTVALEX_MASK
#define FTM_PWMLOAD_HCSEL_SHIFT
static bool FTM_DRV_IsWriteProtectionEnabled(const FTM_Type *ftmBase)
Checks whether the write protection is enabled.
#define FEATURE_FTM_CHANNEL_COUNT
Configuration structure that the user needs to set.
#define FTM_RMW_MOD_MIRROR(base, mask, value)
FTM_MOD_MIRROR - Read and modify and write mirror of modulo value for the FTM counter (RW) ...
#define FTM_MOD_MIRROR_MOD_SHIFT
ftm_bdm_mode_t
Options for the FlexTimer behavior in BDM Mode.
#define CHAN4_IDX
Channel number for CHAN5.
static void FTM_DRV_SetChnOutputInitStateCmd(FTM_Type *const ftmBase, uint8_t channel, bool state)
Sets the FTM peripheral timer channel output initial state 0 or 1.
static void FTM_DRV_SetMirrorMod(FTM_Type *const ftmBase, uint16_t value)
Sets the mirror of the modulo integer value.
ftm_status_flag_t
List of FTM flags.
#define FTM_RMW_CONF(base, mask, value)
FTM_CONF - Read and modify and write Configuration (RW)
#define FTM_PAIR1DEADTIME_DTPS_MASK
#define FTM_RMW_PAIR0DEADTIME(base, mask, value)
FTM_PAIR0DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 0 (RW) ...
static uint16_t FTM_DRV_GetMirrorChnMatchVal(const FTM_Type *ftmBase, uint8_t channel)
Returns the mirror of the channel (n) match integer value.
static bool FTM_DRV_IsChnDma(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the FTM peripheral timer channel DMA is enabled.
#define FTM_SC_FLTPS_MASK
FlexTimer Registers sync parameters Please don't use software and hardware trigger simultaneously Imp...
#define FTM_SWOCTRL_CH0OCV_SHIFT
status_t FTM_DRV_SetInitialCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the initial counter value. The counter will get this value after an overflow ...
#define FTM_PAIR3DEADTIME_DTVAL(x)
#define FTM_MOD_MIRROR_FRACMOD_SHIFT
status_t FTM_DRV_SetOutputlevel(uint32_t instance, uint8_t channel, uint8_t level)
This function will set the channel edge or level on the selection of the channel mode.
static uint8_t FTM_DRV_GetChnEdgeLevel(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel edge level.
#define FTM_MOD_MIRROR_FRACMOD_MASK
static void FTM_DRV_SetGlobalTimeBaseOutputCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM global time base signal generation to other FTM's.
#define FTM_CONF_GTBEEN_MASK
const IRQn_Type g_ftmOverflowIrqId[(2u)]
#define FTM_PAIR3DEADTIME_DTPS_MASK
#define FTM_RMW_CnV_MIRROR(base, channel, mask, value)
FTM_CnV_MIRROR - Read and modify and write mirror of channel (n) match value (RW) ...
static uint8_t FTM_DRV_GetClockFilterPs(const FTM_Type *ftmBase)
Reads the FTM filter clock divider.
status_t FTM_DRV_SetHalfCycleReloadPoint(uint32_t instance, uint16_t reloadPoint, bool softwareTrigger)
This function configure the value of the counter which will generates an reload point.
#define FTM_CnSC_TRIGMODE(x)
ftm_interrupt_option_t
List of FTM interrupts.
static void FTM_DRV_SetCountReinitSyncCmd(FTM_Type *const ftmBase, bool enable)
Determines if the FTM counter is re-initialized when the selected trigger for synchronization is dete...
#define FTM_CONF_GTBEOUT(x)
#define FTM_CNTIN_INIT_MASK
#define FTM_PAIR2DEADTIME_DTVALEX_MASK
const IRQn_Type g_ftmIrqId[(2u)][(8U)]
Interrupt vectors for the FTM peripheral.
#define FTM_CNTIN_INIT_SHIFT
#define FTM_MODE_FAULTIE_MASK
static bool FTM_DRV_GetChnEventStatus(const FTM_Type *ftmBase, uint8_t channel)
Gets the FTM peripheral timer channel event status.
#define FTM_MOD_MIRROR_MOD(x)
static uint8_t FTM_DRV_GetModFracVal(const FTM_Type *ftmBase)
Returns The modulo fractional value is used in the PWM period dithering.
static void FTM_DRV_SetExtPairDeadtimeValue(FTM_Type *const ftmBase, uint8_t channelPair, uint8_t value)
Sets the FTM extended dead-time value for the channel pair.
#define FTM_RMW_SYNC(base, mask, value)
SYNC - Read and modify and write Synchronization (RW)
#define FTM_MODE_FAULTIE(x)
uint32_t FTM_DRV_GetFrequency(uint32_t instance)
Retrieves the frequency of the clock source feeding the FTM counter.
#define FTM_PAIR1DEADTIME_DTVAL(x)
#define FTM_PWMLOAD_GLDOK_SHIFT
uint16_t FTM_DRV_ConvertFreqToPeriodTicks(uint32_t instance, uint32_t freqencyHz)
This function is used to covert the given frequency to period in ticks.
void FTM_DRV_ClearStatusFlags(uint32_t instance, uint32_t flagMask)
This function is used to clear the FTM status flags.
#define FTM_FMS_WPEN_MASK
#define FTM_PAIR1DEADTIME_DTPS(x)
#define FTM_PAIR1DEADTIME_DTVAL_MASK
#define FTM_PAIR2DEADTIME_DTPS(x)
#define FTM_CnSC_ELSA_MASK
static void FTM_DRV_SetLoadCmd(FTM_Type *const ftmBase, bool enable)
Enable the global load.
#define FTM_PAIR0DEADTIME_DTVALEX_MASK
static void FTM_DRV_SetChnDmaCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the FTM peripheral timer channel DMA.
ftm_clock_ps_t
FlexTimer pre-scaler factor selection for the clock source. In quadrature decoder mode set FTM_CLOCK_...
static void FTM_DRV_SetClockFilterPs(FTM_Type *const ftmBase, uint8_t filterPrescale)
Sets the filter Pre-scaler divider.
static void FTM_DRV_SetGlobalLoadCmd(FTM_Type *const ftmBase)
Set the global load mechanism.
#define FTM_CV_MIRROR_VAL(x)
static void FTM_DRV_SetInitTrigOnReloadCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM initialization trigger on Reload Point.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
IRQn_Type
Defines the Interrupt Numbers definitions.
static void FTM_DRV_ClearChSC(FTM_Type *const ftmBase, uint8_t channel)
Clears the content of Channel (n) Status And Control.
#define FTM_MOD_MOD_SHIFT
#define CHAN0_IDX
Channel number for CHAN1.
void(* ic_callback_t)(ic_event_t event, void *userData)
ftm_clock_source_t
FlexTimer clock source selection.
static void FTM_DRV_SetChnSoftwareCtrlVal(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Sets the channel software output control value.
#define FTM_CnSC_ELSB_MASK
ftm_quad_phase_polarity_t
FlexTimer quadrature phase polarities, normal or inverted polarity.
static void FTM_DRV_SetDualChnInvertCmd(FTM_Type *const ftmBase, uint8_t chnlPairNum, bool enable)
Enables or disables the channel invert for a channel pair.
#define FTM_MODE_CAPTEST_MASK
#define FTM_INSTANCE_COUNT
status_t FTM_DRV_SetInvertingControl(uint32_t instance, uint8_t channelsPairMask, bool softwareTrigger)
This function will configure if the second channel of a pair will be inverted or not.
#define FTM_CV_MIRROR_VAL_MASK
#define FTM_PAIR0DEADTIME_DTVAL_MASK
#define FTM_CONF_ITRIGR_MASK
static void FTM_DRV_SetTrigModeControlCmd(FTM_Type *const ftmBase, uint8_t channel, bool enable)
Enables or disables the trigger generation on FTM channel outputs.
#define FTM_PAIR3DEADTIME_DTVAL_MASK
ftm_quad_decode_mode_t
FlexTimer quadrature decode modes, phase encode or count and direction mode.
#define FTM_CnSC_ELSA_SHIFT
#define FTM_PAIR0DEADTIME_DTPS_MASK
#define FTM_PAIR3DEADTIME_DTPS(x)
#define CHAN2_IDX
Channel number for CHAN3.
#define FTM_PAIR1DEADTIME_DTVALEX(x)
static uint32_t FTM_DRV_GetEventStatus(const FTM_Type *ftmBase)
Gets the FTM peripheral timer status info for all channels.
#define FTM_MODE_CAPTEST(x)
#define FTM_CV_MIRROR_FRACVAL_MASK
#define FTM_PAIR3DEADTIME_DTVALEX(x)
#define FTM_CnSC_CHOV_MASK
static void FTM_DRV_SetLoadFreq(FTM_Type *const ftmBase, uint8_t val)
Sets the FTM timer TOF Frequency.
static bool FTM_DRV_IsFtmEnable(const FTM_Type *ftmBase)
Get status of the FTMEN bit in the FTM_MODE register.
#define FTM_RMW_PAIR3DEADTIME(base, mask, value)
FTM_PAIR3DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 3 (RW) ...
status_t FTM_DRV_EnableInterrupts(uint32_t instance, uint32_t interruptMask)
This function will enable the generation a list of interrupts. It includes the FTM overflow interrupt...
static void FTM_DRV_SetGlobalTimeBaseCmd(FTM_Type *const ftmBase, bool enable)
Enables or disables the FTM timer global time base.
static void FTM_DRV_SetHalfCycleCmd(FTM_Type *const ftmBase, bool enable)
Enable the half cycle reload.
#define FTM_SYNC_REINIT_MASK
static bool FTM_DRV_GetChInputState(const FTM_Type *ftmBase, uint8_t channel)
Get the state of channel input.
#define FTM_RMW_PAIR2DEADTIME(base, mask, value)
FTM_PAIR2DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 2 (RW) ...
ftm_deadtime_ps_t
FlexTimer pre-scaler factor for the dead-time insertion.
#define FTM_CnSC_CHIS_MASK
#define FTM_PAIR0DEADTIME_DTPS(x)
status_t FTM_DRV_SetModuloCounterValue(uint32_t instance, uint16_t counterValue, bool softwareTrigger)
This function configure the maximum counter value.
#define FTM_CONF_GTBEEN(x)
#define FTM_CnSC_TRIGMODE_MASK
#define FTM_CONF_ITRIGR(x)
#define CHAN1_IDX
Channel number for CHAN2.
static void FTM_DRV_SetChnOutputMask(FTM_Type *const ftmBase, uint8_t channel, bool mask)
Sets the FTM peripheral timer channel output mask.
#define FTM_CV_MIRROR_VAL_SHIFT
static void FTM_DRV_SetMirrorChnMatchVal(FTM_Type *const ftmBase, uint8_t channel, uint16_t value)
Sets the mirror of the channel (n) match integer value.
#define FTM_RMW_CnSCV_REG(base, channel, mask, value)
FTM_CnSCV - Read and modify and write Channel (n) Status And Control (RW)
uint32_t FTM_DRV_GetEnabledInterrupts(uint32_t instance)
This function will get the enabled FTM interrupts.
#define FTM_CONF_LDFQ_MASK
status_t FTM_DRV_Deinit(uint32_t instance)
Shuts down the FTM driver.
#define FTM_FMS_FAULTIN_MASK
#define FTM_CnSC_ICRST(x)
status_t FTM_DRV_MaskOutputChannels(uint32_t instance, uint32_t channelsMask, bool softwareTrigger)
This function will mask the output of the channels and at match events will be ignored by the masked ...
#define FTM_MOD_MIRROR_MOD_MASK
#define FTM_PAIR2DEADTIME_DTVAL(x)
#define FTM_SYNC_REINIT(x)
static void FTM_DRV_ClearChnEventStatus(FTM_Type *const ftmBase, uint8_t channel)
Clears the FTM peripheral timer all channel event status.
#define FTM_CnSC_ICRST_MASK
#define FTM_PAIR1DEADTIME_DTVALEX_MASK
#define FTM_MODE_FTMEN_SHIFT
static uint16_t FTM_DRV_GetMod(const FTM_Type *ftmBase)
Returns the FTM peripheral counter modulo value.
#define FTM_CnSC_DMA_MASK
static bool FTM_DRV_IsFaultFlagDetected(const FTM_Type *ftmBase, uint8_t channel)
Checks whether a fault condition is detected at the fault input.
ftm_pwm_sync_mode_t
FTM update register.
status_t FTM_DRV_Init(uint32_t instance, const ftm_user_config_t *info, ftm_state_t *state)
Initializes the FTM driver.
status_t FTM_DRV_SetSoftOutChnValue(uint32_t instance, uint8_t channelsValues, bool softwareTrigger)
This function will force the output value of a channel to a specific value. Before using this functio...
static void FTM_DRV_SetPairDeadtimeCount(FTM_Type *const ftmBase, uint8_t channelPair, uint8_t count)
Sets the FTM dead-time value for the channel pair.
#define FTM_PAIR2DEADTIME_DTVALEX(x)
#define FTM_RMW_MODE(base, mask, value)
FTM_MODE - Read and modify and write Counter Features Mode Selection (RW)
#define FTM_PAIR0DEADTIME_DTVAL(x)
struct FTM_Type::@11 CONTROLS[8u]
#define FTM_CNT_COUNT_SHIFT
#define FTM_PWMLOAD_LDOK_SHIFT
#define FTM_MODE_FTMEN_MASK
static void FTM_DRV_DisableFaultInt(FTM_Type *const ftmBase)
Disables the FTM peripheral timer fault interrupt.
uint32_t FTM_DRV_GetStatusFlags(uint32_t instance)
This function will get the FTM status flags.
static bool FTM_DRV_IsFaultInputEnabled(const FTM_Type *ftmBase)
Checks whether the logic OR of the fault inputs is enabled.
#define FTM_PAIR2DEADTIME_DTPS_MASK
void FTM_DRV_DisableInterrupts(uint32_t instance, uint32_t interruptMask)
This function is used to disable some interrupts.
#define FTM_PAIR2DEADTIME_DTVAL_MASK
static void FTM_DRV_SetPairDeadtimePrescale(FTM_Type *const ftmBase, uint8_t channelPair, ftm_deadtime_ps_t divider)
Sets the FTM dead time divider for the channel pair.
#define FTM_RMW_PAIR1DEADTIME(base, mask, value)
FTM_PAIR1DEADTIME - Read and modify and write Dead-time Insertion Control for the pair 1 (RW) ...
ftm_config_mode_t
FlexTimer operation mode.
#define FTM_CNT_COUNT_MASK
#define FTM_CV_MIRROR_FRACVAL_SHIFT
#define FTM_SC_FLTPS_SHIFT
status_t FTM_DRV_SetAllChnSoftwareOutputControl(uint32_t instance, uint8_t channelMask, uint8_t channelValueMask)
This function will control list of channels by software to force the output to specified value...
#define CHAN3_IDX
Channel number for CHAN4.
static uint16_t FTM_DRV_GetCounter(const FTM_Type *ftmBase)
Returns the FTM peripheral current counter value.
static bool FTM_DRV_GetTriggerControled(const FTM_Type *ftmBase, uint8_t channel)
Returns whether the trigger mode is enabled.
FTM_Type *const g_ftmBase[(2u)]
Table of base addresses for FTM instances.
static void FTM_DRV_ClearFaultFlagDetected(FTM_Type *const ftmBase, uint8_t channel)
Clear a fault condition is detected at the fault input.
#define FTM_PAIR0DEADTIME_DTVALEX(x)