35 #if !defined(EDMA_DRIVER_H)
59 #define STCD_SIZE(number) (((number) * 32U) - 1U)
60 #define STCD_ADDR(address) (((uint32_t)address + 31UL) & ~0x1FUL)
68 #define EDMA_ERR_LSB_MASK 1U
95 #ifndef FEATURE_DMA_4_CH_PRIORITIES
96 EDMA_CHN_PRIORITY_4 = 4U,
97 EDMA_CHN_PRIORITY_5 = 5U,
98 EDMA_CHN_PRIORITY_6 = 6U,
99 EDMA_CHN_PRIORITY_7 = 7U,
100 #ifndef FEATURE_DMA_8_CH_PRIORITIES
101 EDMA_CHN_PRIORITY_8 = 8U,
102 EDMA_CHN_PRIORITY_9 = 9U,
103 EDMA_CHN_PRIORITY_10 = 10U,
104 EDMA_CHN_PRIORITY_11 = 11U,
105 EDMA_CHN_PRIORITY_12 = 12U,
106 EDMA_CHN_PRIORITY_13 = 13U,
107 EDMA_CHN_PRIORITY_14 = 14U,
108 EDMA_CHN_PRIORITY_15 = 15U,
114 #if FEATURE_DMA_CHANNEL_GROUP_COUNT > 0x1U
119 #ifdef FEATURE_DMA_HWV3
120 EDMA_CHN_GROUP_0 = 0U,
121 EDMA_CHN_GROUP_1 = 1U,
122 EDMA_CHN_GROUP_2 = 2U,
123 EDMA_CHN_GROUP_3 = 3U,
124 EDMA_CHN_GROUP_4 = 4U,
125 EDMA_CHN_GROUP_5 = 5U,
126 EDMA_CHN_GROUP_6 = 6U,
127 EDMA_CHN_GROUP_7 = 7U,
128 EDMA_CHN_GROUP_8 = 8U,
129 EDMA_CHN_GROUP_9 = 9U,
130 EDMA_CHN_GROUP_10 = 10U,
131 EDMA_CHN_GROUP_11 = 11U,
132 EDMA_CHN_GROUP_12 = 12U,
133 EDMA_CHN_GROUP_13 = 13U,
134 EDMA_CHN_GROUP_14 = 14U,
135 EDMA_CHN_GROUP_15 = 15U,
136 EDMA_CHN_GROUP_16 = 16U,
137 EDMA_CHN_GROUP_17 = 17U,
138 EDMA_CHN_GROUP_18 = 18U,
139 EDMA_CHN_GROUP_19 = 19U,
140 EDMA_CHN_GROUP_20 = 20U,
141 EDMA_CHN_GROUP_21 = 21U,
142 EDMA_CHN_GROUP_22 = 22U,
143 EDMA_CHN_GROUP_23 = 23U,
144 EDMA_CHN_GROUP_24 = 24U,
145 EDMA_CHN_GROUP_25 = 25U,
146 EDMA_CHN_GROUP_26 = 26U,
147 EDMA_CHN_GROUP_27 = 27U,
148 EDMA_CHN_GROUP_28 = 28U,
149 EDMA_CHN_GROUP_29 = 29U,
150 EDMA_CHN_GROUP_30 = 30U,
151 EDMA_CHN_GROUP_31 = 31U
153 EDMA_GRP0_PRIO_LOW_GRP1_PRIO_HIGH = 0U,
154 EDMA_GRP0_PRIO_HIGH_GRP1_PRIO_LOW = 1U
156 } edma_group_priority_t;
201 #ifdef FEATURE_DMA_HWV3
205 EDMA_TRANSFER_SIZE_8B = 0x3U,
206 EDMA_TRANSFER_SIZE_16B = 0x4U,
207 EDMA_TRANSFER_SIZE_32B = 0x5U,
208 EDMA_TRANSFER_SIZE_64B = 0x6U
211 EDMA_TRANSFER_SIZE_2B = 0x1U,
212 EDMA_TRANSFER_SIZE_4B = 0x2U,
213 #ifdef FEATURE_DMA_TRANSFER_SIZE_8B
214 EDMA_TRANSFER_SIZE_8B = 0x3U,
216 #ifdef FEATURE_DMA_TRANSFER_SIZE_16B
217 EDMA_TRANSFER_SIZE_16B = 0x4U,
219 #ifdef FEATURE_DMA_TRANSFER_SIZE_32B
220 EDMA_TRANSFER_SIZE_32B = 0x5U,
222 #ifdef FEATURE_DMA_TRANSFER_SIZE_64B
223 EDMA_TRANSFER_SIZE_64B = 0x6U
237 #if FEATURE_DMA_CHANNEL_GROUP_COUNT > 0x1U
238 #ifndef FEATURE_DMA_HWV3
240 edma_group_priority_t groupPriority;
288 #if FEATURE_DMA_CHANNEL_GROUP_COUNT > 0x1U
289 #ifdef FEATURE_DMA_HWV3
290 edma_group_priority_t groupPriority;
396 #if (defined(CORE_LITTLE_ENDIAN))
410 #elif (defined(CORE_BIG_ENDIAN))
425 #error "Endianness not defined!"
432 #if defined(__cplusplus)
579 uint32_t dataBufferSize);
620 bool disableReqOnCompletion);
672 uint32_t bytesOnEachRequest,
848 uint32_t majorLoopCount);
873 uint32_t nextTCDAddr);
957 #if defined(__cplusplus)
void EDMA_DRV_PushConfigToSTCD(const edma_transfer_config_t *config, edma_software_tcd_t *stcd)
Copies the channel configuration to the software TCD structure.
edma_arbitration_algorithm_t
eDMA channel arbitration algorithm used for selection among channels. Implements : edma_arbitration_a...
void EDMA_DRV_SetMajorLoopIterationCount(uint8_t virtualChannel, uint32_t majorLoopCount)
Configures the number of major loop iterations.
eDMA TCD Implements : edma_software_tcd_t_Class
edma_modulo_t
eDMA modulo configuration Implements : edma_modulo_t_Class
uint32_t EDMA_DRV_GetRemainingMajorIterationsCount(uint8_t virtualChannel)
Returns the remaining major loop iteration count.
uint32_t minorByteTransferCount
status_t EDMA_DRV_InstallCallback(uint8_t virtualChannel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
uint8_t minorLoopChnLinkNumber
status_t EDMA_DRV_ConfigLoopTransfer(uint8_t virtualChannel, const edma_transfer_config_t *transferConfig)
Configures the DMA transfer in loop mode.
status_t EDMA_DRV_ConfigMultiBlockTransfer(uint8_t virtualChannel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t blockSize, uint32_t blockCount, bool disableReqOnCompletion)
Configures a multiple block data transfer with DMA.
The user configuration structure for the eDMA driver.
edma_transfer_type_t
A type for the DMA transfer. Implements : edma_transfer_type_t_Class.
void EDMA_DRV_SetDestWriteChunkSize(uint8_t virtualChannel, edma_transfer_size_t size)
Configures the destination data chunk size (transferred in a write sequence).
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t virtualChannel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
void EDMA_DRV_PushConfigToReg(uint8_t virtualChannel, const edma_transfer_config_t *tcd)
Copies the channel configuration to the TCD registers.
The user configuration structure for the an eDMA driver channel.
uint8_t majorLoopChnLinkNumber
status_t EDMA_DRV_Deinit(void)
De-initializes the eDMA module.
void EDMA_DRV_SetScatterGatherLink(uint8_t virtualChannel, uint32_t nextTCDAddr)
Configures the memory address of the next TCD, in scatter/gather mode.
void EDMA_DRV_SetSrcLastAddrAdjustment(uint8_t virtualChannel, int32_t adjust)
Configures the source address last adjustment.
void EDMA_DRV_ConfigureInterrupt(uint8_t virtualChannel, edma_channel_interrupt_t intSrc, bool enable)
Disables/Enables the channel interrupt requests.
void EDMA_DRV_TriggerSwRequest(uint8_t virtualChannel)
Triggers a sw request for the current channel.
void EDMA_DRV_SetDestOffset(uint8_t virtualChannel, int16_t offset)
Configures the destination address signed offset for the eDMA channel.
status_t EDMA_DRV_StopChannel(uint8_t virtualChannel)
Stops the eDMA channel.
edma_channel_interrupt_t
eDMA channel interrupts. Implements : edma_channel_interrupt_t_Class
uint32_t scatterGatherNextDescAddr
void EDMA_DRV_DisableRequestsOnTransferComplete(uint8_t virtualChannel, bool disable)
Disables/Enables the DMA request after the major loop completes for the TCD.
status_t EDMA_DRV_ChannelInit(edma_chn_state_t *edmaChannelState, const edma_channel_config_t *edmaChannelConfig)
Initializes an eDMA channel.
Runtime state structure for the eDMA driver.
edma_chn_status_t
Channel status for eDMA channel.
edma_chn_status_t EDMA_DRV_GetChannelStatus(uint8_t virtualChannel)
Gets the eDMA channel status.
edma_transfer_size_t destTransferSize
bool majorLoopChnLinkEnable
int32_t srcLastAddrAdjust
edma_transfer_size_t
eDMA transfer configuration Implements : edma_transfer_size_t_Class
void EDMA_DRV_SetDestAddr(uint8_t virtualChannel, uint32_t address)
Configures the destination address for the eDMA channel.
edma_channel_priority_t
eDMA channel priority setting Implements : edma_channel_priority_t_Class
edma_arbitration_algorithm_t chnArbitration
uint32_t majorLoopIterationCount
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
edma_channel_priority_t channelPriority
status_t EDMA_DRV_ReleaseChannel(uint8_t virtualChannel)
Releases an eDMA channel.
void EDMA_DRV_SetSrcOffset(uint8_t virtualChannel, int16_t offset)
Configures the source address signed offset for the eDMA channel.
edma_transfer_size_t srcTransferSize
Data structure for configuring a discrete memory transfer. Implements : edma_scatter_gather_list_t_Cl...
volatile edma_chn_status_t status
void EDMA_DRV_SetSrcReadChunkSize(uint8_t virtualChannel, edma_transfer_size_t size)
Configures the source data chunk size (transferred in a read sequence).
edma_transfer_type_t type
void EDMA_DRV_SetSrcAddr(uint8_t virtualChannel, uint32_t address)
Configures the source address for the eDMA channel.
status_t EDMA_DRV_ConfigScatterGatherTransfer(uint8_t virtualChannel, edma_software_tcd_t *stcd, edma_transfer_size_t transferSize, uint32_t bytesOnEachRequest, const edma_scatter_gather_list_t *srcList, const edma_scatter_gather_list_t *destList, uint8_t tcdCount)
Configures the DMA transfer in a scatter-gather mode.
void EDMA_DRV_SetMinorLoopBlockSize(uint8_t virtualChannel, uint32_t nbytes)
Configures the number of bytes to be transferred in each service request of the channel.
status_t EDMA_DRV_Init(edma_state_t *edmaState, const edma_user_config_t *userConfig, edma_chn_state_t *const chnStateArray[], const edma_channel_config_t *const chnConfigArray[], uint32_t chnCount)
Initializes the eDMA module.
status_t EDMA_DRV_StartChannel(uint8_t virtualChannel)
Starts an eDMA channel.
int32_t destLastAddrAdjust
status_t EDMA_DRV_SetChannelRequest(uint8_t virtualChannel, uint8_t req)
Configures the DMA request for the eDMA channel.
#define FEATURE_DMA_VIRTUAL_CHANNELS
void EDMA_DRV_CancelTransfer(bool error)
Cancel the running transfer.
bool minorLoopChnLinkEnable
void(* edma_callback_t)(void *parameter, edma_chn_status_t status)
Definition for the eDMA channel callback function.
dma_request_source_t source
void EDMA_DRV_SetDestLastAddrAdjustment(uint8_t virtualChannel, int32_t adjust)
Configures the destination address last adjustment.
void EDMA_DRV_ClearTCD(uint8_t virtualChannel)
Clears all registers to 0 for the channel's TCD.
eDMA loop transfer configuration.
eDMA transfer size configuration.
edma_loop_transfer_config_t * loopTransferConfig
dma_request_source_t
Structure for the DMA hardware request.
Data structure for the eDMA channel state. Implements : edma_chn_state_t_Class.