MTPNV status register. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP). Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value. More...

#include <middleware/sbc/sbc_uja1169/include/sbc_uja1169_driver.h>

Data Fields

sbc_mtpnv_stat_wrcnts_t wrcnts
 
sbc_mtpnv_stat_eccs_t eccs
 
sbc_mtpnv_stat_nvmps_t nvmps
 

Detailed Description

MTPNV status register. The MTPNV cells can be reprogrammed a maximum of 200 times (Ncy(W)MTP). Bit NVMPS in the MTPNV status register indicates whether the non-volatile cells can be reprogrammed. This register also contains a write counter, WRCNTS, that is incremented each time the MTPNV cells are reprogrammed (up to a maximum value of 111111; there is no overflow; performing a factory reset also increments the counter). This counter is provided for information purposes only; reprogramming will not be rejected when it reaches its maximum value.

Implements : sbc_mtpnv_stat_t_Class

Definition at line 1459 of file sbc_uja1169_driver.h.

Field Documentation

Error correction code status.

Definition at line 1461 of file sbc_uja1169_driver.h.

Non-volatile memory programming status.

Definition at line 1462 of file sbc_uja1169_driver.h.

Write counter status.

Definition at line 1460 of file sbc_uja1169_driver.h.


The documentation for this struct was generated from the following file: