65 #include "flexcan_hw_access.h"
74 #define FLEXCAN_MB_HANDLE_RXFIFO 0U
77 #define FLEXCAN_NUM_TQ_MIN 8U
78 #define FLEXCAN_NUM_TQ_MAX 26U
79 #define FLEXCAN_PRESDIV_MAX 256U
80 #define FLEXCAN_PSEG1_MAX 8U
81 #define FLEXCAN_PSEG2_MIN 1U
82 #define FLEXCAN_PSEG2_MAX 8U
83 #define FLEXCAN_PROPSEG_MAX 8U
84 #define FLEXCAN_TSEG1_MIN 2U
85 #define FLEXCAN_TSEG1_MAX 17U
86 #define FLEXCAN_TSEG2_MIN 2U
87 #define FLEXCAN_TSEG2_MAX 9U
88 #define FLEXCAN_RJW_MAX 3U
98 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
117 const uint8_t *mb_data,
133 #if FEATURE_CAN_HAS_DMA_ENABLE
159 CAN_Type * base = g_flexcanBase[instance];
160 #if FEATURE_CAN_HAS_FD
161 bool fdEnabled = FLEXCAN_IsFDEnabled(base);
164 FLEXCAN_EnterFreezeMode(base);
166 #if FEATURE_CAN_HAS_FD
170 FLEXCAN_SetExtendedTimeSegments(base, bitrate);
176 FLEXCAN_SetTimeSegments(base, bitrate);
179 FLEXCAN_ExitFreezeMode(base);
182 #if FEATURE_CAN_HAS_FD
198 CAN_Type * base = g_flexcanBase[instance];
200 FLEXCAN_EnterFreezeMode(base);
203 FLEXCAN_SetFDTimeSegments(base, bitrate);
205 FLEXCAN_ExitFreezeMode(base);
223 CAN_Type * base = g_flexcanBase[instance];
225 FLEXCAN_EnterFreezeMode(base);
228 FLEXCAN_GetTimeSegments(base, bitrate);
230 FLEXCAN_ExitFreezeMode(base);
233 #if FEATURE_CAN_HAS_FD
248 CAN_Type * base = g_flexcanBase[instance];
250 FLEXCAN_EnterFreezeMode(base);
253 FLEXCAN_GetFDTimeSegments(base, bitrate);
255 FLEXCAN_ExitFreezeMode(base);
272 CAN_Type * base = g_flexcanBase[instance];
274 FLEXCAN_EnterFreezeMode(base);
276 FLEXCAN_SetRxMaskType(base, type);
278 FLEXCAN_ExitFreezeMode(base);
296 CAN_Type * base = g_flexcanBase[instance];
298 FLEXCAN_EnterFreezeMode(base);
303 FLEXCAN_SetRxFifoGlobalStdMask(base, mask);
308 FLEXCAN_SetRxFifoGlobalExtMask(base, mask);
314 FLEXCAN_ExitFreezeMode(base);
332 CAN_Type * base = g_flexcanBase[instance];
334 FLEXCAN_EnterFreezeMode(base);
339 FLEXCAN_SetRxMsgBuffGlobalStdMask(base, mask);
344 FLEXCAN_SetRxMsgBuffGlobalExtMask(base, mask);
350 FLEXCAN_ExitFreezeMode(base);
368 CAN_Type * base = g_flexcanBase[instance];
370 FLEXCAN_EnterFreezeMode(base);
375 FLEXCAN_SetRxMsgBuff14StdMask(base, mask);
380 FLEXCAN_SetRxMsgBuff14ExtMask(base, mask);
386 FLEXCAN_ExitFreezeMode(base);
404 CAN_Type * base = g_flexcanBase[instance];
406 FLEXCAN_EnterFreezeMode(base);
411 FLEXCAN_SetRxMsgBuff15StdMask(base, mask);
416 FLEXCAN_SetRxMsgBuff15ExtMask(base, mask);
422 FLEXCAN_ExitFreezeMode(base);
441 CAN_Type * base = g_flexcanBase[instance];
443 FLEXCAN_EnterFreezeMode(base);
445 if (mb_idx > FLEXCAN_GetMaxMsgBuffNum(base))
447 FLEXCAN_ExitFreezeMode(base);
454 FLEXCAN_SetRxIndividualStdMask(base, mb_idx, mask);
459 FLEXCAN_SetRxIndividualExtMask(base, mb_idx, mask);
465 FLEXCAN_ExitFreezeMode(base);
491 DEV_ASSERT((MC_ME->GS & MC_ME_GS_S_FXOSC_MASK) != 0U);
496 CAN_Type * base = g_flexcanBase[instance];
501 FLEXCAN_EnterFreezeMode(base);
502 FLEXCAN_Disable(base);
504 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
506 FLEXCAN_SelectClock(base, data->
pe_clock);
510 FLEXCAN_Enable(base);
512 FLEXCAN_EnterFreezeMode(base);
518 #if FEATURE_CAN_HAS_FD
521 flexcan_msgbuff_code_status_t messageBuff={
522 .code = FLEXCAN_TX_REMOTE,
529 uint8_t dummy_data[16];
531 FLEXCAN_SetSelfReception(base,
true);
536 (void)FLEXCAN_SetTxMsgBuff(base, 0U, &messageBuff, 0x1U, dummy_data);
537 FLEXCAN_SetFDEnabled(base,
true);
539 FLEXCAN_SetExtendedTimeSegments(base, &bitrate);
541 FLEXCAN_SetFDTimeSegments(base, &bitrate);
542 FLEXCAN_ExitFreezeMode(base);
544 while((base->
IFLAG1 & 0x1U) != 0x1U) {};
547 FLEXCAN_EnterFreezeMode(base);
552 #if FEATURE_CAN_HAS_FD
555 FLEXCAN_SetFDEnabled(base, data->
fd_enable);
556 if (FLEXCAN_IsFDEnabled(base) != data->
fd_enable)
563 FLEXCAN_SetStuffBitCount(base, data->
fd_enable);
569 FLEXCAN_SetSelfReception(base,
false);
576 result = FLEXCAN_EnableRxFifo(base, (uint32_t)data->
num_id_filters);
583 #if FEATURE_CAN_HAS_DMA_ENABLE
587 if (FLEXCAN_IsRxFifoEnabled(base))
589 FLEXCAN_SetRxFifoDMA(base,
true);
601 #if FEATURE_CAN_HAS_FD
603 FLEXCAN_SetPayloadSize(base, data->
payload);
606 result = FLEXCAN_SetMaxMsgBuffNum(base, data->
max_num_mb);
612 #if FEATURE_CAN_HAS_FD
614 if (FLEXCAN_IsFDEnabled(base))
617 FLEXCAN_SetExtendedTimeSegments(base, &bitrate);
619 FLEXCAN_SetFDTimeSegments(base, &bitrate);
625 FLEXCAN_SetTimeSegments(base, &bitrate);
628 FLEXCAN_ExitFreezeMode(base);
631 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
652 for (j = 0; j < i; j++)
665 #if FEATURE_CAN_HAS_DMA_ENABLE
670 g_flexcanStatePtr[instance] = state;
696 flexcan_msgbuff_code_status_t cs;
697 CAN_Type * base = g_flexcanBase[instance];
704 cs.code = (uint32_t)FLEXCAN_TX_REMOTE;
708 cs.code = (uint32_t)FLEXCAN_TX_INACTIVE;
710 return FLEXCAN_SetTxMsgBuff(base, mb_idx, &cs, msg_id, NULL);
730 const uint8_t *mb_data)
735 flexcan_msgbuff_code_status_t cs;
736 CAN_Type * base = g_flexcanBase[instance];
741 cs.code = (uint32_t)FLEXCAN_RX_RANSWER;
743 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
745 return FLEXCAN_SetTxMsgBuff(base, mb_idx, &cs, msg_id, mb_data);
762 const uint8_t *mb_data,
770 CAN_Type * base = g_flexcanBase[instance];
779 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
786 if (FLEXCAN_GetMsgBuffIntStatusFlag(base,mb_idx) == (uint8_t)0U)
791 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
814 const uint8_t *mb_data)
820 CAN_Type * base = g_flexcanBase[instance];
826 result = FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
856 flexcan_msgbuff_code_status_t cs;
857 CAN_Type * base = g_flexcanBase[instance];
861 #if FEATURE_CAN_HAS_FD
865 cs.code = (uint32_t)FLEXCAN_RX_NOT_USED;
866 result = FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
873 cs.code = (uint32_t)FLEXCAN_RX_INACTIVE;
874 result = FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
881 cs.code = (uint32_t)FLEXCAN_RX_EMPTY;
882 return FLEXCAN_SetRxMsgBuff(base, mb_idx, &cs, msg_id);
901 CAN_Type * base = g_flexcanBase[instance];
903 FLEXCAN_EnterFreezeMode(base);
906 FLEXCAN_SetRxFifoFilter(base, id_format, id_filter_table);
908 FLEXCAN_ExitFreezeMode(base);
930 CAN_Type * base = g_flexcanBase[instance];
943 if(FLEXCAN_GetMsgBuffIntStatusFlag(base,mb_idx) == (uint8_t)0U)
948 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
998 CAN_Type * base = g_flexcanBase[instance];
1059 CAN_Type * base = g_flexcanBase[instance];
1068 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_ERR,
false);
1069 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_RX_WARNING,
false);
1070 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_TX_WARNING,
false);
1071 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_BUSOFF,
false);
1074 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
1090 FLEXCAN_EnterFreezeMode(g_flexcanBase[instance]);
1092 FLEXCAN_Disable(g_flexcanBase[instance]);
1106 #if FEATURE_CAN_HAS_FD
1119 CAN_Type * base = g_flexcanBase[instance];
1121 FLEXCAN_EnterFreezeMode(base);
1124 FLEXCAN_SetTDCOffset(base, enable, offset);
1126 FLEXCAN_ExitFreezeMode(base);
1140 const CAN_Type * base = g_flexcanBase[instance];
1156 const CAN_Type * base = g_flexcanBase[instance];
1172 CAN_Type * base = g_flexcanBase[instance];
1190 uint32_t flag_reg = 0;
1191 CAN_Type * base = g_flexcanBase[instance];
1196 uint32_t mb_idx = 0;
1197 flag_reg = FLEXCAN_GetMsgBuffIntStatusFlag(base, mb_idx);
1199 while ((flag_reg & 1U) == 0U)
1202 flag_reg = FLEXCAN_GetMsgBuffIntStatusFlag(base, mb_idx);
1213 bool rxfifoEnabled = FLEXCAN_IsRxFifoEnabled(base);
1224 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1238 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1251 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1268 result = FLEXCAN_LockRxMsgBuff(base, mb_idx);
1272 result = FLEXCAN_GetMsgBuff(base, mb_idx, state->
mbs[mb_idx].
mb_message);
1277 FLEXCAN_UnlockRxMsgBuff(base);
1281 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1304 (void) FLEXCAN_LockRxMsgBuff(base, mb_idx);
1305 (void) FLEXCAN_GetMsgBuff(base, mb_idx, &mb);
1306 FLEXCAN_UnlockRxMsgBuff(base);
1308 if (((mb.
cs & CAN_CS_CODE_MASK) >> CAN_CS_CODE_SHIFT) == (uint32_t)FLEXCAN_RX_EMPTY)
1310 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1315 FLEXCAN_ClearMsgBuffIntStatusFlag(base, mb_idx);
1327 #if FEATURE_CAN_HAS_PRETENDED_NETWORKING
1328 uint8_t wtof = FLEXCAN_GetWTOF(base);
1329 uint8_t wumf = FLEXCAN_GetWUMF(base);
1332 if ((wtof != 0U) || (wumf != 0U))
1337 uint32_t ecr = FLEXCAN_GetErrorCounters(base);
1361 CAN_Type * base = g_flexcanBase[instance];
1371 FLEXCAN_ClearErrIntStatusFlag(base);
1376 #if FEATURE_CAN_HAS_WAKE_UP_IRQ
1391 CAN_Type * base = g_flexcanBase[instance];
1397 #if FEATURE_CAN_HAS_PRETENDED_NETWORKING
1398 if (FLEXCAN_IsPNEnabled(base))
1400 if (FLEXCAN_GetWTOF(base) != 0U)
1402 FLEXCAN_ClearWTOF(base);
1405 if (FLEXCAN_GetWUMF(base) != 0U)
1407 FLEXCAN_ClearWUMF(base);
1413 #if FEATURE_CAN_HAS_SELF_WAKE_UP
1414 if (FLEXCAN_IsSelfWakeUpEnabled(base))
1416 if (FLEXCAN_GetWAKINT(base) != 0U)
1418 FLEXCAN_ClearWAKINT(base);
1469 const CAN_Type * base = g_flexcanBase[instance];
1471 return ((uint32_t)(base->
ESR1));
1489 CAN_Type * base = g_flexcanBase[instance];
1499 FLEXCAN_AbortTxMsgBuff(base, mb_idx);
1521 const uint8_t *mb_data,
1529 flexcan_msgbuff_code_status_t cs;
1531 CAN_Type * base = g_flexcanBase[instance];
1544 #if FEATURE_CAN_HAS_FD
1552 cs.code = (uint32_t)FLEXCAN_TX_REMOTE;
1556 cs.code = (uint32_t)FLEXCAN_TX_DATA;
1558 result = FLEXCAN_SetTxMsgBuff(base, mb_idx, &cs, msg_id, mb_data);
1586 CAN_Type * base = g_flexcanBase[instance];
1599 result = FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
true);
1626 CAN_Type * base = g_flexcanBase[instance];
1628 #if FEATURE_CAN_HAS_DMA_ENABLE
1638 if (!FLEXCAN_IsRxFifoEnabled(base))
1650 #if FEATURE_CAN_HAS_DMA_ENABLE
1657 (
void *)((uint32_t)instance));
1667 (uint32_t)(base->
RAMn),
1707 CAN_Type * base = g_flexcanBase[instance];
1711 (void)FLEXCAN_SetMsgBuffIntCmd(base, mb_idx,
false);
1721 #if FEATURE_CAN_HAS_DMA_ENABLE
1732 uint32_t instance = (uint32_t)parameter;
1751 CAN_Type * base = g_flexcanBase[instance];
1761 #if FEATURE_CAN_HAS_DMA_ENABLE
1765 uint32_t *msgData_32 = (uint32_t *)fifo_message->
data;
1769 if (((fifo_message->
cs) & CAN_CS_IDE_MASK) == 0U)
1771 fifo_message->
msgId = fifo_message->
msgId >> CAN_ID_STD_SHIFT;
1774 fifo_message->
dataLen = (uint8_t)((fifo_message->
cs & CAN_CS_DLC_MASK) >> CAN_CS_DLC_SHIFT);
1776 FlexcanSwapBytesInWord(msgData_32[0], msgData_32[0]);
1777 FlexcanSwapBytesInWord(msgData_32[1], msgData_32[1]);
1800 void *callbackParam)
1820 void *callbackParam)
1824 CAN_Type * base = g_flexcanBase[instance];
1830 if (callback != NULL)
1832 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_ERR,
true);
1833 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_RX_WARNING,
true);
1834 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_TX_WARNING,
true);
1835 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_BUSOFF,
true);
1839 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_ERR,
false);
1840 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_RX_WARNING,
false);
1841 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_TX_WARNING,
false);
1842 FLEXCAN_SetErrIntCmd(base, FLEXCAN_INT_BUSOFF,
false);
1846 #if FEATURE_CAN_HAS_PRETENDED_NETWORKING
1859 CAN_Type * base = g_flexcanBase[instance];
1861 FLEXCAN_EnterFreezeMode(base);
1865 FLEXCAN_ConfigPN(base, pnConfig);
1866 #if FEATURE_CAN_HAS_SELF_WAKE_UP
1867 (void)FLEXCAN_SetSelfWakeUp(base,
false);
1871 FLEXCAN_SetPN(base, enable);
1873 FLEXCAN_ExitFreezeMode(base);
1888 uint32_t *tmp, wmbData;
1889 const CAN_Type *base = g_flexcanBase[instance];
1891 tmp = (uint32_t *)&wmb->
data[0];
1895 tmp = (uint32_t *)&wmb->
data[4];
1901 if ((wmb->
cs & CAN_CS_IDE_MASK) != 0U)
1910 wmb->
dataLen = (uint8_t)((wmb->
cs & CAN_CS_DLC_MASK) >> 16);
1915 #if FEATURE_CAN_HAS_SELF_WAKE_UP
1925 status_t FLEXCAN_DRV_ConfigSelfWakeUp(uint8_t instance,
bool enable,
bool lowPassFilterEn)
1929 CAN_Type *base = g_flexcanBase[instance];
1933 status = FLEXCAN_SetSelfWakeUp(base, enable);
1937 FLEXCAN_EnterFreezeMode(base);
1940 FLEXCAN_SetWakSrc(base, lowPassFilterEn);
1942 FLEXCAN_ExitFreezeMode(base);
1961 uint32_t dBitrate, tmpBitrate, dBitrateMin, tmpPresdiv, tmpSample,
1962 dSampleMin, dSample, samplePoint, numTq, pseg1, pseg2, propseg,
1963 presdiv, tSeg1, tSeg2, tmpPseg1, tmpPseg2, tmpPropseg;
1971 dBitrateMin = 1000000U;
1977 numTq = clkFreq / ((tmpPresdiv + 1U) * bitrate);
1979 tmpBitrate = clkFreq / ((tmpPresdiv + 1U) * numTq);
1984 tSeg1 = (numTq * samplePoint / 100U) - 1U;
1985 tSeg2 = numTq - 1U - tSeg1;
1994 tmpPseg2 = tSeg2 - 1U;
1997 tmpPseg1 = tmpPseg2;
1998 tmpPropseg = tSeg1 - tmpPseg1 - 2U;
2000 while (tmpPropseg <= 0U)
2002 tmpPropseg = tmpPropseg + 1U;
2003 tmpPseg1 = tmpPseg1 - 1U;
2007 tmpPropseg = tmpPropseg - 1U;
2008 tmpPseg1 = tmpPseg1 + 1U;
2024 tmpSample = ((tSeg1 + 1U) * 100U) / numTq;
2025 dSample = (tmpSample > samplePoint) ? (tmpSample - samplePoint) : (samplePoint - tmpSample);
2026 dBitrate = (tmpBitrate > bitrate) ? (tmpBitrate - bitrate) : (bitrate - tmpBitrate);
2028 if ((dBitrate < dBitrateMin) ||
2029 ((dBitrate == dBitrateMin) && (dSample < dSampleMin)))
2031 dSampleMin = dSample;
2032 dBitrateMin = dBitrate;
2035 presdiv = tmpPresdiv;
2036 propseg = tmpPropseg;
2038 if ((dBitrate == 0U) && (dSample <= 1U))
2081 #if FEATURE_CAN_HAS_PE_CLKSRC_SELECT
2087 #if FEATURE_CAN_HAS_FD
2097 #if FEATURE_CAN_HAS_DMA_ENABLE
struct CAN_Type::@0 WMB[4u]
volatile const uint32_t WMBn_ID
status_t FLEXCAN_DRV_Receive(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data)
Receives a CAN frame using the specified message buffer.
void FLEXCAN_DRV_GetBitrateFD(uint8_t instance, flexcan_time_segment_t *bitrate)
Gets the FlexCAN bit rate for the data phase of FD frames (BRS enabled).
status_t FLEXCAN_DRV_Deinit(uint8_t instance)
Shuts down a FlexCAN instance.
Internal driver state information.
flexcan_msgbuff_id_type_t
FlexCAN Message Buffer ID type Implements : flexcan_msgbuff_id_type_t_Class.
void FLEXCAN_DRV_GetWMB(uint8_t instance, uint8_t wmbIndex, flexcan_msgbuff_t *wmb)
Extracts one of the frames which triggered the wake up event.
status_t EDMA_DRV_InstallCallback(uint8_t virtualChannel, edma_callback_t callback, void *parameter)
Registers the callback function and the parameter for eDMA channel.
flexcan_operation_modes_t flexcanMode
#define FLEXCAN_TSEG2_MAX
#define FEATURE_CAN_MB_IRQS_MAX_COUNT
flexcan_fd_payload_size_t payload
status_t FLEXCAN_DRV_ConfigTxMb(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id)
FlexCAN transmit message buffer field configuration.
status_t OSIF_SemaDestroy(const semaphore_t *const pSem)
Destroys a previously created semaphore.
void FLEXCAN_DRV_GetDefaultConfig(flexcan_user_config_t *config)
Gets the default configuration structure.
flexcan_time_segment_t bitrate
static const IRQn_Type g_flexcanErrorIrqId[]
flexcan_rx_mask_type_t
FlexCAN Rx mask type. Implements : flexcan_rx_mask_type_t_Class.
#define REV_BYTES_32(a, b)
Reverse byte order in a word.
status_t EDMA_DRV_ConfigSingleBlockTransfer(uint8_t virtualChannel, edma_transfer_type_t type, uint32_t srcAddr, uint32_t destAddr, edma_transfer_size_t transferSize, uint32_t dataBufferSize)
Configures a simple single block data transfer with DMA.
flexcan_rx_fifo_id_filter_num_t num_id_filters
void FLEXCAN_DRV_SetTDCOffset(uint8_t instance, bool enable, uint8_t offset)
Enables/Disables the Transceiver Delay Compensation feature and sets the Transceiver Delay Compensati...
#define FLEXCAN_TSEG1_MIN
static status_t FLEXCAN_StartRxMessageFifoData(uint8_t instance, flexcan_msgbuff_t *data, bool isBlocking)
status_t FLEXCAN_DRV_RxFifo(uint8_t instance, flexcan_msgbuff_t *data)
Receives a CAN frame using the message FIFO.
#define FLEXCAN_PROPSEG_MAX
static flexcan_state_t * g_flexcanStatePtr[(1u)]
void FLEXCAN_DRV_ConfigRxFifo(uint8_t instance, flexcan_rx_fifo_id_element_format_t id_format, const flexcan_id_table_t *id_filter_table)
FlexCAN Rx FIFO field configuration.
#define CAN_FDCTRL_TDCFAIL_MASK
status_t FLEXCAN_DRV_GetTransferStatus(uint8_t instance, uint8_t mb_idx)
Returns whether the previous FlexCAN transfer has finished.
status_t OSIF_SemaCreate(semaphore_t *const pSem, const uint8_t initValue)
Creates a semaphore with a given value.
flexcan_msgbuff_id_type_t msg_id_type
#define FLEXCAN_PRESDIV_MAX
#define FEATURE_CAN_RXFIFO_WARNING
#define FLEXCAN_PSEG2_MIN
static const IRQn_Type g_flexcanOredMessageBufferIrqId[(2U)][(1u)]
void FLEXCAN_DRV_InstallEventCallback(uint8_t instance, flexcan_callback_t callback, void *callbackParam)
Installs a callback function for the IRQ handler.
status_t EDMA_DRV_StopChannel(uint8_t virtualChannel)
Stops the eDMA channel.
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
#define FLEXCAN_MB_HANDLE_RXFIFO
#define CAN_INSTANCE_COUNT
static void FLEXCAN_CompleteTransfer(uint8_t instance, uint32_t mb_idx)
void FLEXCAN_DRV_ClearTDCFail(uint8_t instance)
Clears the TDC Fail flag.
static status_t FLEXCAN_StartSendData(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data, bool isBlocking)
edma_chn_status_t
Channel status for eDMA channel.
flexcan_rxfifo_transfer_type_t transferType
#define FEATURE_CAN_MAX_MB_NUM
status_t FLEXCAN_DRV_AbortTransfer(uint8_t instance, uint8_t mb_idx)
Ends a non-blocking FlexCAN transfer early.
static void FLEXCAN_CompleteRxFifoDataDMA(void *parameter, edma_chn_status_t status)
#define FEATURE_CAN_MB_IRQS
static const IRQn_Type g_flexcanBusOffIrqId[]
void FLEXCAN_DRV_SetRxMb15Mask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB 15 mask (standard or extended).
status_t CLOCK_SYS_GetFreq(clock_names_t clockName, uint32_t *frequency)
Gets the clock frequency for a specific clock name.
void FLEXCAN_DRV_SetRxMaskType(uint8_t instance, flexcan_rx_mask_type_t type)
Sets the Rx masking type.
volatile flexcan_mb_state_t state
FlexCAN bitrate related structures Implements : flexcan_time_segment_t_Class.
volatile uint32_t RAMn[128u]
#define FLEXCAN_PSEG2_MAX
void * errorCallbackParam
status_t FLEXCAN_DRV_ConfigRxMb(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *rx_info, uint32_t msg_id)
FlexCAN receive message buffer field configuration.
#define FLEXCAN_NUM_TQ_MIN
static void FLEXCAN_BitrateToTimeSeg(uint32_t bitrate, uint32_t clkFreq, flexcan_time_segment_t *timeSeg)
status_t FLEXCAN_DRV_ConfigRemoteResponseMb(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data)
Configures a transmit message buffer for remote frame response.
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
IRQn_Type
Defines the Interrupt Numbers definitions.
void(* callback)(uint8_t instance, flexcan_event_type_t eventType, uint32_t buffIdx, struct FlexCANState *driverState)
#define FEATURE_CAN_RXFIFO_OVERFLOW
void FLEXCAN_DRV_InstallErrorCallback(uint8_t instance, flexcan_error_callback_t callback, void *callbackParam)
Installs an error callback function for the IRQ handler and enables error interrupts.
flexcan_mb_handle_t mbs[(32U)]
bool FLEXCAN_DRV_GetTDCFail(uint8_t instance)
Gets the value of the TDC Fail flag.
FlexCAN message buffer structure Implements : flexcan_msgbuff_t_Class.
volatile const uint32_t WMBn_D03
volatile const uint32_t WMBn_CS
flexcan_rx_fifo_id_element_format_t
ID formats for Rx FIFO Implements : flexcan_rx_fifo_id_element_format_t_Class.
status_t FLEXCAN_DRV_SendBlocking(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data, uint32_t timeout_ms)
Sends a CAN frame using the specified message buffer, in a blocking manner.
void(* error_callback)(uint8_t instance, flexcan_event_type_t eventType, struct FlexCANState *driverState)
#define CAN_FDCTRL_TDCVAL_MASK
void FLEXCAN_Error_IRQHandler(uint8_t instance)
Error interrupt handler for a FlexCAN instance.
FlexCAN Rx FIFO ID filter table structure Implements : flexcan_id_table_t_Class.
status_t FLEXCAN_DRV_RxFifoBlocking(uint8_t instance, flexcan_msgbuff_t *data, uint32_t timeout_ms)
Receives a CAN frame using the message FIFO, in a blocking manner.
flexcan_time_segment_t bitrate_cbt
flexcan_rxfifo_transfer_type_t transfer_type
Pretended Networking configuration structure Implements : flexcan_pn_config_t_Class.
status_t OSIF_SemaWait(semaphore_t *const pSem, const uint32_t timeout)
Decrement a semaphore with timeout.
uint8_t FLEXCAN_DRV_GetTDCValue(uint8_t instance)
Gets the value of the Transceiver Delay Compensation.
#define CAN_FDCTRL_TDCFAIL_SHIFT
void FLEXCAN_DRV_SetRxFifoGlobalMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx FIFO global mask (standard or extended).
status_t OSIF_SemaPost(semaphore_t *const pSem)
Increment a semaphore.
static CAN_Type *const g_flexcanBase[]
status_t FLEXCAN_DRV_ReceiveBlocking(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data, uint32_t timeout_ms)
Receives a CAN frame using the specified message buffer, in a blocking manner.
static status_t FLEXCAN_StartRxMessageBufferData(uint8_t instance, uint8_t mb_idx, flexcan_msgbuff_t *data, bool isBlocking)
status_t EDMA_DRV_StartChannel(uint8_t virtualChannel)
Starts an eDMA channel.
void FLEXCAN_DRV_SetBitrateCbt(uint8_t instance, const flexcan_time_segment_t *bitrate)
Sets the FlexCAN bit rate for the data phase of FD frames (BRS enabled).
#define FLEXCAN_NUM_TQ_MAX
void FLEXCAN_IRQHandler(uint8_t instance)
Interrupt handler for a FlexCAN instance.
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
flexcan_msgbuff_t * mb_message
uint32_t FLEXCAN_DRV_GetErrorStatus(uint8_t instance)
Returns reported error conditions.
#define FEATURE_CAN_RXFIFO_FRAME_AVAILABLE
#define FEATURE_CAN_PE_OSC_CLK_NAME
void FLEXCAN_DRV_SetRxMbGlobalMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB global mask (standard or extended).
FlexCAN data info from user Implements : flexcan_data_info_t_Class.
status_t FLEXCAN_DRV_Init(uint8_t instance, flexcan_state_t *state, const flexcan_user_config_t *data)
Initializes the FlexCAN peripheral.
static const IRQn_Type g_flexcanWakeUpIrqId[]
void FLEXCAN_WakeUpHandler(uint8_t instance)
Wake up handler for a FlexCAN instance.
void(* flexcan_error_callback_t)(uint8_t instance, flexcan_event_type_t eventType, flexcan_state_t *flexcanState)
FlexCAN Driver error callback function type Implements : flexcan_error_callback_t_Class.
status_t FLEXCAN_DRV_Send(uint8_t instance, uint8_t mb_idx, const flexcan_data_info_t *tx_info, uint32_t msg_id, const uint8_t *mb_data)
Sends a CAN frame using the specified message buffer.
status_t FLEXCAN_DRV_SetRxIndividualMask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint8_t mb_idx, uint32_t mask)
Sets the FlexCAN Rx individual mask (standard or extended).
void(* flexcan_callback_t)(uint8_t instance, flexcan_event_type_t eventType, uint32_t buffIdx, flexcan_state_t *flexcanState)
FlexCAN Driver callback function type Implements : flexcan_callback_t_Class.
volatile const uint32_t WMBn_D47
#define FLEXCAN_PSEG1_MAX
#define FLEXCAN_TSEG1_MAX
#define CAN_FDCTRL_TDCVAL_SHIFT
#define FLEXCAN_TSEG2_MIN
void FLEXCAN_DRV_SetBitrate(uint8_t instance, const flexcan_time_segment_t *bitrate)
Sets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
static void FLEXCAN_CompleteRxMessageFifoData(uint8_t instance)
flexcan_clk_source_t pe_clock
void FLEXCAN_DRV_SetRxMb14Mask(uint8_t instance, flexcan_msgbuff_id_type_t id_type, uint32_t mask)
Sets the FlexCAN Rx MB 14 mask (standard or extended).
void FLEXCAN_DRV_GetBitrate(uint8_t instance, flexcan_time_segment_t *bitrate)
Gets the FlexCAN bit rate for standard frames or the arbitration phase of FD frames.
void FLEXCAN_DRV_ConfigPN(uint8_t instance, bool enable, const flexcan_pn_config_t *pnConfig)
Configures Pretended Networking settings.