flash_driver.c
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1 /*
2  * Copyright (c) 2016 Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR
7  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
9  * IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
10  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
11  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
12  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
13  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
14  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
15  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
16  * THE POSSIBILITY OF SUCH DAMAGE.
17  */
71 #include "flash_driver.h"
72 #include "interrupt_manager.h"
73 
75 static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)
77 /*******************************************************************************
78  * Code
79  ******************************************************************************/
80 
81 /*FUNCTION**********************************************************************
82  *
83  * Function Name : FLASH_DRV_GetDEPartitionCode
84  * Description : Gets DFlash size from FlexNVM Partition Code.
85  *
86  *END**************************************************************************/
87 static void FLASH_DRV_GetDEPartitionCode(flash_ssd_config_t * const pSSDConfig,
88  uint8_t DEPartitionCode)
89 {
90  /* Select D-Flash size */
91  if (0x00U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0000;}
92  else if (0x01U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0001;}
93  else if (0x02U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0010;}
94  else if (0x03U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0011;}
95  else if (0x04U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0100;}
96  else if (0x05U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0101;}
97  else if (0x06U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0110;}
98  else if (0x07U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_0111;}
99  else if (0x08U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1000;}
100  else if (0x09U == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1001;}
101  else if (0x0AU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1010;}
102  else if (0x0BU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1011;}
103  else if (0x0CU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1100;}
104  else if (0x0DU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1101;}
105  else if (0x0EU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1110;}
106  else if (0x0FU == DEPartitionCode) {pSSDConfig->DFlashSize = (uint32_t)FEATURE_FLS_DF_SIZE_1111;}
107  else {/* Undefined value */}
108 }
109 
110 #if (FEATURE_FLS_IS_FTFC == 0U)
111 /*FUNCTION**********************************************************************
112  *
113  * Function Name : FLASH_DRV_GetEEEDataSetSize
114  * Description : Gets EEPROM size from EEPROM Data Set Size.
115  *
116  *END**************************************************************************/
117 static void FLASH_DRV_GetEEEDataSetSize(flash_ssd_config_t * const pSSDConfig,
118  uint8_t EEEDataSetSize)
119 {
120  /* Select EEPROM size */
121  if (0x00U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0000;}
122  else if (0x01U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0001;}
123  else if (0x02U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0010;}
124  else if (0x03U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0011;}
125  else if (0x04U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0100;}
126  else if (0x05U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0101;}
127  else if (0x06U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0110;}
128  else if (0x07U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_0111;}
129  else if (0x08U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1000;}
130  else if (0x09U == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1001;}
131  else if (0x0AU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1010;}
132  else if (0x0BU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1011;}
133  else if (0x0CU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1100;}
134  else if (0x0DU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1101;}
135  else if (0x0EU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1110;}
136  else if (0x0FU == EEEDataSetSize) {pSSDConfig->EEESize = (uint32_t)FEATURE_FLS_EE_SIZE_1111;}
137  else {/* Undefined value */}
138 }
139 #endif /* if (FEATURE_FLS_IS_FTFC == 0U) */
140 
141 /*FUNCTION**********************************************************************
142  *
143  * Function Name : FLASH_DRV_Init
144  * Description : Initializes Flash module by clearing status error bit
145  * and reporting the memory configuration via SSD configuration structure.
146  *
147  * Implements : FLASH_DRV_Init_Activity
148  *END**************************************************************************/
149 status_t FLASH_DRV_Init(const flash_user_config_t * const pUserConf,
150  flash_ssd_config_t * const pSSDConfig)
151 {
152  DEV_ASSERT(pUserConf != NULL);
153  DEV_ASSERT(pSSDConfig != NULL);
154  status_t ret = STATUS_SUCCESS;
155 #if FEATURE_FLS_HAS_FLEX_NVM
156  uint8_t DEPartitionCode; /* store D/E-Flash Partition Code */
157 #endif
158 
159  pSSDConfig->PFlashBase = pUserConf->PFlashBase;
160  pSSDConfig->PFlashSize = pUserConf->PFlashSize;
161  pSSDConfig->DFlashBase = pUserConf->DFlashBase;
162  pSSDConfig->EERAMBase = pUserConf->EERAMBase;
163  pSSDConfig->CallBack = pUserConf->CallBack;
164 
165 #if FEATURE_FLS_HAS_FLEX_NVM
166  /* Temporary solution for FTFC and S32K144 CSEc part */
167  /* Get DEPART from Flash Configuration Register 1 */
168  DEPartitionCode = (uint8_t)((SIM->FCFG1 & SIM_FCFG1_DEPART_MASK) >> SIM_FCFG1_DEPART_SHIFT);
169  /* Get data flash size */
170  FLASH_DRV_GetDEPartitionCode(pSSDConfig, DEPartitionCode);
171  if (pSSDConfig->DFlashSize < FEATURE_FLS_DF_BLOCK_SIZE)
172  {
173  pSSDConfig->EEESize = FEATURE_FLS_FLEX_RAM_SIZE;
174  }
175  else
176  {
177  pSSDConfig->EEESize = 0U;
178  }
179 #else /* FEATURE_FLS_HAS_FLEX_NVM == 0 */
180  /* If size of D/E-Flash = 0 */
181  pSSDConfig->DFlashSize = 0U;
182  pSSDConfig->EEESize = 0U;
183 #endif /* End of FEATURE_FLS_HAS_FLEX_NVM */
184 
185  return ret;
186 }
187 
188 /*FUNCTION**********************************************************************
189  *
190  * Function Name : FLASH_DRV_CommandSequence
191  * Description : Perform command write sequence on Flash.
192  * It is internal function, called by driver APIs only.
193  *
194  *END**************************************************************************/
196 static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)
197 {
198  status_t ret = STATUS_SUCCESS; /* Return code variable */
199 
200  /* Clear CCIF to launch command */
202 
203  while (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
204  {
205  /* Wait till CCIF bit is set
206  * Serve callback function as often as possible
207  */
208  if (NULL_CALLBACK != pSSDConfig->CallBack)
209  {
210  /* Temporarily disable compiler's check for ROM access call from within a ram function.
211  * The use of a function pointer type makes this check irrelevant.
212  * Nevertheless, it is imperative that the user-provided callback be defined in RAMSECTION */
214  (pSSDConfig->CallBack)();
216  }
217  }
218 
219  /* Check if an error is occurred */
221  {
222  ret = STATUS_ERROR;
223  }
224 
225  return ret;
226 }
228 
229 /*FUNCTION**********************************************************************
230  *
231  * Function Name : FLASH_DRV_GetPFlashProtection
232  * Description : Retrieves the current P-Flash protection status.
233  * Considering the time consumption for getting protection is very low and
234  * even can be ignored. It is not necessary to utilize the Callback function to
235  * support the time-critical events.
236  *
237  * Implements : FLASH_DRV_GetPFlashProtection_Activity
238  *END**************************************************************************/
239 void FLASH_DRV_GetPFlashProtection(uint32_t * protectStatus)
240 {
241  DEV_ASSERT(protectStatus != NULL);
242  uint32_t reg0, reg1, reg2, reg3;
243 
244  reg0 = FTFx_FPROT0;
245  reg1 = FTFx_FPROT1;
246  reg2 = FTFx_FPROT2;
247  reg3 = FTFx_FPROT3;
248 
249  *protectStatus = (uint32_t)((reg0 << 24U) | (reg1 << 16U) | (reg2 << 8U) | reg3);
250 }
251 
252 /*FUNCTION**********************************************************************
253  *
254  * Function Name : FLASH_DRV_SetPFlashProtection
255  * Description : Sets the P-Flash protection to the intended protection status.
256  * Setting P-Flash protection status is subject to a protection transition
257  * restriction. If there is a setting violation, it returns an error code
258  * and the current protection status will not be changed.
259  *
260  * Implements : FLASH_DRV_SetPFlashProtection_Activity
261  *END**************************************************************************/
262 status_t FLASH_DRV_SetPFlashProtection(uint32_t protectStatus)
263 {
264  status_t ret = STATUS_SUCCESS;
265  uint8_t reg0, reg1, reg2, reg3;
266  bool flag0, flag1, flag2, flag3;
267 
268  /* Get register */
269  reg0 = GET_BIT_24_31(protectStatus);
270  reg1 = GET_BIT_16_23(protectStatus);
271  reg2 = GET_BIT_8_15(protectStatus);
272  reg3 = GET_BIT_0_7(protectStatus);
273 
274  /* Write to register */
275  FTFx_FPROT0 = reg0;
276  FTFx_FPROT1 = reg1;
277  FTFx_FPROT2 = reg2;
278  FTFx_FPROT3 = reg3;
279 
280  /* Compare changes */
281  flag0 = (FTFx_FPROT0 != reg0);
282  flag1 = (FTFx_FPROT1 != reg1);
283  flag2 = (FTFx_FPROT2 != reg2);
284  flag3 = (FTFx_FPROT3 != reg3);
285 
286  /* Read the value of FPPROT registers */
287  if (flag0 || flag1 || flag2 || flag3)
288  {
289  ret = STATUS_ERROR;
290  }
291 
292  return ret;
293 }
294 
295 /*FUNCTION**********************************************************************
296  *
297  * Function Name : FLASH_DRV_GetSecurityState
298  * Description : Retrieves the current Flash security status, including
299  * the security enabling state and the back door key enabling state.
300  *
301  * Implements : FLASH_DRV_GetSecurityState_Activity
302  *END**************************************************************************/
303 void FLASH_DRV_GetSecurityState(uint8_t * securityState)
304 {
305  DEV_ASSERT(securityState != NULL);
306  /* Store data read from flash register */
307  uint8_t regValue;
308 
309  /* Get flash security register value */
310  regValue = FTFx_FSEC;
311 
312  /* Check the status of the flash security bits in the security register */
314  {
315  /* Flash in unsecured state */
316  *securityState = FLASH_NOT_SECURE;
317  }
318  else
319  {
320  /* Flash in secured state
321  * Check for backdoor key security enable bit
322  */
323  if (0x80U == (regValue & FTFx_FSEC_KEYEN_MASK))
324  {
325  /* Backdoor key security enabled */
326  *securityState = FLASH_SECURE_BACKDOOR_ENABLED;
327  }
328  else
329  {
330  /* Backdoor key security disabled */
331  *securityState = FLASH_SECURE_BACKDOOR_DISABLED;
332  }
333  }
334 }
335 
336 /*FUNCTION**********************************************************************
337  *
338  * Function Name : FLASH_DRV_SecurityBypass
339  * Description : Un-secures the device by comparing the user's provided back
340  * door key with the ones in the Flash Configuration Field. If they are
341  * matched, the security is released. Otherwise, an error code is returned.
342  *
343  * Implements : FLASH_DRV_SecurityBypass_Activity
344  *END**************************************************************************/
346  const uint8_t * keyBuffer)
347 {
348  DEV_ASSERT(pSSDConfig != NULL);
349  DEV_ASSERT(keyBuffer != NULL);
350  status_t ret; /* Return code variable */
351  uint32_t temp; /* Temporary variable */
352  uint8_t i;
353 
354  /* Check CCIF to verify the previous command is completed */
355  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
356  {
357  ret = STATUS_BUSY;
358  }
359  else
360  {
361  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
363 
364  /* Passing parameter to the command */
366  for (i = 0U; i < 8U; i++)
367  {
368  temp = FTFx_BASE + i + 0x08U;
369  *(uint8_t *)temp = keyBuffer[i];
370  }
371 
372  ret = FLASH_DRV_CommandSequence(pSSDConfig);
373  }
374 
375  return ret;
376 }
377 
378 /*FUNCTION**********************************************************************
379  *
380  * Function Name : FLASH_DRV_EraseAllBlock
381  * Description : Erases all Flash memory, initializes the FlexRAM, verifies
382  * all memory contents, and then releases the MCU security.
383  *
384  * Implements : FLASH_DRV_EraseAllBlock_Activity
385  *END**************************************************************************/
387 {
388  DEV_ASSERT(pSSDConfig != NULL);
389  status_t ret; /* Return code variable */
390 
391  /* Check CCIF to verify the previous command is completed */
392  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
393  {
394  ret = STATUS_BUSY;
395  }
396  else
397  {
398  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
400 
401  /* Passing parameter to the command */
403 
404  /* Calling flash command sequence function to execute the command */
405  ret = FLASH_DRV_CommandSequence(pSSDConfig);
406  }
407 
408  return ret;
409 }
410 
411 /*FUNCTION**********************************************************************
412  *
413  * Function Name : FLASH_DRV_VerifyAllBlock
414  * Description : Checks to see if the P-Flash and/or D-Flash, EEPROM
415  * backup area, and D-Flash IFR have been erased to the specified read
416  * margin level, if applicable, and releases security if the readout passes.
417  *
418  * Implements : FLASH_DRV_VerifyAllBlock_Activity
419  *END**************************************************************************/
421  uint8_t marginLevel)
422 {
423  DEV_ASSERT(pSSDConfig != NULL);
424  status_t ret; /* Return code variable */
425 
426  /* Check CCIF to verify the previous command is completed */
427  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
428  {
429  ret = STATUS_BUSY;
430  }
431  else
432  {
433  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
435 
436  /* Passing parameter to the command */
438  FTFx_FCCOB1 = marginLevel;
439 
440  /* Calling flash command sequence function to execute the command */
441  ret = FLASH_DRV_CommandSequence(pSSDConfig);
442  }
443 
444  return ret;
445 }
446 
447 /*FUNCTION**********************************************************************
448  *
449  * Function Name : FLASH_DRV_EraseSector
450  * Description : Erases one or more sectors in P-Flash or D-Flash memory.
451  * This API always returns STATUS_SUCCESS if size provided by the user is
452  * zero regardless of the input validation.
453  *
454  * Implements : FLASH_DRV_EraseSector_Activity
455  *END**************************************************************************/
457  uint32_t dest,
458  uint32_t size)
459 {
460  DEV_ASSERT(pSSDConfig != NULL);
461  status_t ret = STATUS_SUCCESS; /* Return code variable */
462  uint32_t sectorSize; /* Size of one sector */
463  uint32_t temp; /* Temporary variable */
464  uint32_t tempSize = size; /* Temporary of size variation */
465 
466 #if FEATURE_FLS_HAS_FLEX_NVM
467  temp = pSSDConfig->DFlashBase;
468  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
469  {
471  dest += 0x800000U - temp;
472  sectorSize = (uint32_t)FEATURE_FLS_DF_BLOCK_SECTOR_SIZE;
473  }
474  else
475 #endif
476  {
478  temp = pSSDConfig->PFlashBase;
479  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
480  {
481  dest -= temp;
482  sectorSize = (uint32_t)FEATURE_FLS_PF_BLOCK_SECTOR_SIZE;
483  }
484  else
485  {
486  ret = STATUS_ERROR;
487  tempSize = 0U;
488  sectorSize = 0U;
489  }
490  }
491 
492  /* Check if the size is sector alignment or not */
493  if ((tempSize & (sectorSize - 1U)) != 0U)
494  {
495  /* Return an error code */
496  ret = STATUS_ERROR;
497  }
498 
499  while ((tempSize > 0U) && (STATUS_SUCCESS == ret))
500  {
501  /* Check CCIF to verify the previous command is completed */
502  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
503  {
504  ret = STATUS_BUSY;
505  }
506  else
507  {
508  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
510 
511  /* Passing parameter to the command */
513  FTFx_FCCOB1 = GET_BIT_16_23(dest);
514  FTFx_FCCOB2 = GET_BIT_8_15(dest);
515  FTFx_FCCOB3 = GET_BIT_0_7(dest);
516 
517  /* Calling flash command sequence function to execute the command */
518  ret = FLASH_DRV_CommandSequence(pSSDConfig);
519 
520  /* Update size and destination address */
521  tempSize -= sectorSize;
522  dest += sectorSize;
523  }
524  }
525 
526  return ret;
527 }
528 
529 /*FUNCTION**********************************************************************
530  *
531  * Function Name : FLASH_DRV_VerifySection
532  * Description : Checks if a section of the P-Flash or the D-Flash memory
533  * is erased to the specified read margin level.
534  *
535  * Implements : FLASH_DRV_VerifySection_Activity
536  *END**************************************************************************/
538  uint32_t dest,
539  uint16_t number,
540  uint8_t marginLevel)
541 {
542  DEV_ASSERT(pSSDConfig != NULL);
543  status_t ret = STATUS_SUCCESS; /* Return code variable */
544  uint32_t temp;
545 
546  /* Check if the destination is aligned or not */
547 #if FEATURE_FLS_HAS_FLEX_NVM
548  temp = pSSDConfig->DFlashBase;
549  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
550  {
552  dest += 0x800000U - temp;
553  }
554  else
555 #endif
556  {
558  temp = pSSDConfig->PFlashBase;
559  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
560  {
561  dest -= temp;
562  }
563  else
564  {
565  ret = STATUS_ERROR;
566  }
567  }
568 
569  if (STATUS_SUCCESS == ret)
570  {
571  /* Check CCIF to verify the previous command is completed */
572  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
573  {
574  ret = STATUS_BUSY;
575  }
576  else
577  {
578  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
580 
581  /* Passing parameter to the command */
583  FTFx_FCCOB1 = GET_BIT_16_23(dest);
584  FTFx_FCCOB2 = GET_BIT_8_15(dest);
585  FTFx_FCCOB3 = GET_BIT_0_7(dest);
586  FTFx_FCCOB4 = GET_BIT_8_15(number);
587  FTFx_FCCOB5 = GET_BIT_0_7(number);
588  FTFx_FCCOB6 = marginLevel;
589 
590  /* Calling flash command sequence function to execute the command */
591  ret = FLASH_DRV_CommandSequence(pSSDConfig);
592  }
593  }
594 
595  return ret;
596 }
597 
598 /*FUNCTION**********************************************************************
599  *
600  * Function Name : FLASH_DRV_EraseSuspend
601  * Description : Suspend a current operation of Flash erase sector command.
602  * This function must be located in RAM memory or different Flash blocks which are
603  * targeted for writing to avoid the RWW error.
604  *
605  * Implements : FLASH_DRV_EraseSuspend_Activity
606  *END**************************************************************************/
607 void FLASH_DRV_EraseSuspend(void)
608 {
609  uint32_t count = SUSPEND_WAIT_CNT; /* Counter variable */
610 
611  if ((FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U)
612  {
614 
615  /* Wait till CCIF bit is set */
616  while (((FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK) == 0U) && (count > 0U))
617  {
618  count--;
619  }
620  }
621 }
622 
623 /*FUNCTION**********************************************************************
624  *
625  * Function Name : FLASH_DRV_EraseResume
626  * Description : Resume a previous suspended operation of Flash erase sector command
627  * This function must be located in RAM memory or different Flash blocks which are targeted
628  * for writing to avoid RWW error.
629  *
630  * Implements : FLASH_DRV_EraseResume_Activity
631  *END**************************************************************************/
632 void FLASH_DRV_EraseResume(void)
633 {
634  uint16_t i = 0U; /* Counter variable */
635 
636  /* Check ERSSUSP bit of the flash configuration register */
637  if ((FTFx_FCNFG & FTFx_FCNFG_ERSSUSP_MASK) == FTFx_FCNFG_ERSSUSP_MASK)
638  {
639  /* Clear CCIF to launch command */
641  /* Wait for completion of this command */
642  while ((0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK)) && (i < RESUME_WAIT_CNT))
643  {
644  i++;
645  }
646  }
647 }
648 
649 /*FUNCTION**********************************************************************
650  *
651  * Function Name : FLASH_DRV_ReadOnce
652  * Description : Read out a reserved 64 byte field located in the P-Flash IFR via given number
653  * of record. See the corresponding reference manual to get the correct value of this number.
654  *
655  * Implements : FLASH_DRV_ReadOnce_Activity
656  *END**************************************************************************/
658  uint8_t recordIndex,
659  uint8_t * pDataArray)
660 {
661  DEV_ASSERT(pSSDConfig != NULL);
662  DEV_ASSERT(pDataArray != NULL);
663  status_t ret; /* Return code variable */
664  uint32_t temp; /* Temporary variable */
665  uint8_t i;
666 
667  /* Check CCIF to verify the previous command is completed */
668  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
669  {
670  ret = STATUS_BUSY;
671  }
672  else
673  {
674  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
676 
677  /* Passing parameter to the command */
679  FTFx_FCCOB1 = recordIndex;
680 
681  /* Calling flash command sequence function to execute the command */
682  ret = FLASH_DRV_CommandSequence(pSSDConfig);
683 
684  /* Checking for the success of command execution */
685  if (STATUS_SUCCESS == ret)
686  {
687  /* Read the data from the FCCOB registers into the pDataArray */
688  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
689  {
690  temp = FTFx_BASE + i + 0x08U;
691  pDataArray[i] = *(uint8_t *)temp;
692  }
693  }
694  }
695 
696  return ret;
697 }
698 
699 /*FUNCTION**********************************************************************
700  *
701  * Function Name : FLASH_DRV_ProgramOnce
702  * Description : Program to a reserved 64 byte field located in the
703  * P-Flash IFR via given number of record. See the corresponding reference manual
704  * to get correct value of this number.
705  *
706  * Implements : FLASH_DRV_ProgramOnce_Activity
707  *END**************************************************************************/
709  uint8_t recordIndex,
710  const uint8_t * pDataArray)
711 {
712  DEV_ASSERT(pSSDConfig != NULL);
713  DEV_ASSERT(pDataArray != NULL);
714  status_t ret; /* Return code variable */
715  uint32_t temp; /* Temporary variable */
716  uint8_t i;
717 
718  /* Check CCIF to verify the previous command is completed */
719  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
720  {
721  ret = STATUS_BUSY;
722  }
723  else
724  {
725  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
727 
728  /* Passing parameter to the command */
730  FTFx_FCCOB1 = recordIndex;
731 
732  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
733  {
734  temp = FTFx_BASE + i + 0x08U;
735  *(uint8_t *)temp = pDataArray[i];
736  }
737 
738  /* Calling flash command sequence function to execute the command */
739  ret = FLASH_DRV_CommandSequence(pSSDConfig);
740  }
741 
742  return ret;
743 }
744 
745 #if FEATURE_FLS_HAS_READ_RESOURCE_CMD
746 /*FUNCTION**********************************************************************
747  *
748  * Function Name : FLASH_DRV_ReadResource
749  * Description : Read data from special purpose memory in Flash memory module
750  * including P-Flash IFR, swap IFR, D-Flash IFR space and version ID.
751  *
752  *END**************************************************************************/
753 status_t FLASH_DRV_ReadResource(const flash_ssd_config_t * pSSDConfig,
754  uint32_t dest,
755  uint8_t * pDataArray,
756  uint8_t resourceSelectCode)
757 {
758  DEV_ASSERT(pSSDConfig != NULL);
759  DEV_ASSERT(pDataArray != NULL);
760  status_t ret = STATUS_SUCCESS; /* Return code variable */
761  uint32_t temp;
762  uint8_t i;
763 
764  /* Check if the destination is aligned or not */
765 #if FEATURE_FLS_HAS_FLEX_NVM
766  temp = pSSDConfig->DFlashBase;
767  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
768  {
770  dest += 0x800000U - temp;
771  }
772  else
773 #endif
774  {
776  temp = pSSDConfig->PFlashBase;
777  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
778  {
779  dest -= temp;
780  }
781  else
782  {
783  ret = STATUS_ERROR;
784  }
785  }
786 
787  if (ret == STATUS_SUCCESS)
788  {
789  /* Check CCIF to verify the previous command is completed */
790  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
791  {
792  ret = STATUS_BUSY;
793  }
794  else
795  {
796  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
798  /* Passing parameter to the command */
800  FTFx_FCCOB1 = GET_BIT_16_23(dest);
801  FTFx_FCCOB2 = GET_BIT_8_15(dest);
802  FTFx_FCCOB3 = GET_BIT_0_7(dest);
803  FTFx_RSRC_CODE_REG = resourceSelectCode;
804  /* Calling flash command sequence function to execute the command */
805  ret = FLASH_DRV_CommandSequence(pSSDConfig);
806 
807  if (STATUS_SUCCESS == ret)
808  {
809  /* Read the data from the FCCOB registers into the pDataArray */
810  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
811  {
812  temp = FTFx_BASE + i + 0x08U;
813  pDataArray[i] = *(uint8_t *)temp;
814  }
815  }
816  }
817  }
818 
819  return ret;
820 }
821 #endif /* if FEATURE_FLS_HAS_READ_RESOURCE_CMD */
822 
823 /*FUNCTION**********************************************************************
824  *
825  * Function Name : FLASH_DRV_Program
826  * Description : Program 4 consecutive bytes (for program long word command)
827  * and 8 consecutive bytes (for program phrase command) on P-Flash or D-Flash block.
828  * This API always returns STATUS_SUCCESS if size provided by user is
829  * zero regardless of the input validation.
830  *
831  * Implements : FLASH_DRV_Program_Activity
832  *END**************************************************************************/
834  uint32_t dest,
835  uint32_t size,
836  const uint8_t * pData)
837 {
838  DEV_ASSERT(pSSDConfig != NULL);
839  DEV_ASSERT(pData != NULL);
841  status_t ret = STATUS_SUCCESS; /* Return code variable */
842  uint32_t temp;
843  uint8_t i;
844 
845  if ((size & (FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE - 1U)) != 0U)
846  {
847  ret = STATUS_ERROR;
848  }
849  else
850  {
851  #if FEATURE_FLS_HAS_FLEX_NVM
852  temp = pSSDConfig->DFlashBase;
853  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
854  {
855  dest += 0x800000U - temp;
856  }
857  else
858  #endif
859  {
860  temp = pSSDConfig->PFlashBase;
861  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
862  {
863  dest -= temp;
864  }
865  else
866  {
867  ret = STATUS_ERROR;
868  }
869  }
870 
871  while ((size > 0U) && (STATUS_SUCCESS == ret))
872  {
873  /* Check CCIF to verify the previous command is completed */
874  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
875  {
876  ret = STATUS_BUSY;
877  }
878  else
879  {
880  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
882 
883  /* Passing parameter to the command */
884  #if (FEATURE_FLS_DF_BLOCK_WRITE_UNIT_SIZE == FTFx_PHRASE_SIZE)
886  #else
888  #endif
889  FTFx_FCCOB1 = GET_BIT_16_23(dest);
890  FTFx_FCCOB2 = GET_BIT_8_15(dest);
891  FTFx_FCCOB3 = GET_BIT_0_7(dest);
892 
893  for (i = 0U; i < FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE; i++)
894  {
895  temp = FTFx_BASE + i + 0x08U;
896  *(uint8_t *)(temp) = pData[i];
897  }
898 
899  /* Calling flash command sequence function to execute the command */
900  ret = FLASH_DRV_CommandSequence(pSSDConfig);
901 
902  /* Update destination address for next iteration */
904  /* Update size for next iteration */
906  /* Increment the source address by 1 */
908  }
909  }
910  }
911 
912  return ret;
913 }
914 
915 /*FUNCTION**********************************************************************
916  *
917  * Function Name : FLASH_DRV_ProgramCheck
918  * Description : Tests a previously programmed P-Flash or D-Flash long word
919  * to see if it reads correctly at the specified margin level. This
920  * API always returns STATUS_SUCCESS if size provided by user is zero
921  * regardless of the input validation
922  *
923  * Implements : FLASH_DRV_ProgramCheck_Activity
924  *END**************************************************************************/
926  uint32_t dest,
927  uint32_t size,
928  const uint8_t * pExpectedData,
929  uint32_t * pFailAddr,
930  uint8_t marginLevel)
931 {
932  DEV_ASSERT(pSSDConfig != NULL);
933  DEV_ASSERT(pExpectedData != NULL);
934  DEV_ASSERT(pFailAddr != NULL);
936  status_t ret = STATUS_SUCCESS; /* Return code variable */
937  uint32_t offsetAddr; /* Offset address to convert to internal memory address */
938  uint32_t temp; /* Temporary variable */
939  uint32_t tempSize = size; /* Temporary of size variation */
940  uint8_t i;
941 
942  if ((tempSize & (FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT - 1U)) != 0U)
943  {
944  ret = STATUS_ERROR;
945  }
946  else
947  {
948  /* Check if the destination is aligned or not */
949  #if FEATURE_FLS_HAS_FLEX_NVM
950  offsetAddr = pSSDConfig->DFlashBase;
951  if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->DFlashSize)))
952  {
953  dest += 0x800000U - offsetAddr;
954  }
955  else
956  #endif
957  {
958  offsetAddr = pSSDConfig->PFlashBase;
959  if ((dest >= offsetAddr) && (dest < (offsetAddr + pSSDConfig->PFlashSize)))
960  {
961  dest -= offsetAddr;
962  }
963  else
964  {
965  ret = STATUS_ERROR;
966  tempSize = 0U;
967  }
968  }
969 
970  while (tempSize > 0U)
971  {
972  /* Check CCIF to verify the previous command is completed */
973  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
974  {
975  ret = STATUS_BUSY;
976  }
977  else
978  {
979  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
981 
982  /* Passing parameter to the command */
984  FTFx_FCCOB1 = GET_BIT_16_23(dest);
985  FTFx_FCCOB2 = GET_BIT_8_15(dest);
986  FTFx_FCCOB3 = GET_BIT_0_7(dest);
987  FTFx_FCCOB4 = marginLevel;
988 
989  for (i = 0U; i < FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT; i++)
990  {
991  temp = FTFx_BASE + i + 0x0CU;
992  *(uint8_t *)(temp) = pExpectedData[i];
993  }
994 
995  /* Calling flash command sequence function to execute the command */
996  ret = FLASH_DRV_CommandSequence(pSSDConfig);
997 
998  /* Checking for the success of command execution */
999  if (STATUS_SUCCESS != ret)
1000  {
1001  #if FEATURE_FLS_HAS_FLEX_NVM
1002  if (dest >= 0x800000U)
1003  {
1004  *pFailAddr = dest + offsetAddr - 0x800000U;
1005  }
1006  else
1007  #endif
1008  {
1009  *pFailAddr = dest + offsetAddr;
1010  }
1011 
1013  }
1014 
1015  /* Update size for next iteration */
1017  /* Increment the source address by 1 */
1019  /* Update destination address for next iteration */
1021  }
1022  }
1023  }
1024 
1025  return ret;
1026 }
1027 
1028 /*FUNCTION**********************************************************************
1029  *
1030  * Function Name : FLASH_DRV_CheckSum
1031  * Description : Performs 32 bit sum of each byte data over a specified Flash
1032  * memory range without carry which provides rapid method for checking data integrity.
1033  * The callback time period of this API is determined via FLASH_CALLBACK_CS macro in the
1034  * flash_driver.h which is used as a counter value for the CallBack() function calling in
1035  * this API. This value can be changed as per the user requirement. User can change this value
1036  * to obtain the maximum permissible callback time period.
1037  * This API always returns STATUS_SUCCESS if size provided by user is zero regardless of the input
1038  * validation.
1039  *
1040  * Implements : FLASH_DRV_CheckSum_Activity
1041  *END**************************************************************************/
1043  uint32_t dest,
1044  uint32_t size,
1045  uint32_t * pSum)
1046 {
1047  DEV_ASSERT(pSSDConfig != NULL);
1048  DEV_ASSERT(pSum != NULL);
1049  status_t ret = STATUS_SUCCESS; /* Return code variable */
1050  uint32_t counter = 0U; /* Counter for callback operation */
1051  uint32_t data; /* Data read from Flash address */
1052  uint32_t endAddress; /* PFlash end address */
1053  uint32_t tempSize = size; /* Temporary of size variation */
1054 
1055  /* Calculating Flash end address */
1056  endAddress = dest + tempSize;
1057 
1058  /* Check for valid range of the target addresses */
1059  if ((dest < pSSDConfig->PFlashBase) || (endAddress > (pSSDConfig->PFlashBase + pSSDConfig->PFlashSize)))
1060  {
1061  #if FEATURE_FLS_HAS_FLEX_NVM
1062  if ((dest < pSSDConfig->DFlashBase) || (endAddress > (pSSDConfig->DFlashBase + pSSDConfig->DFlashSize)))
1063  {
1064  #endif
1065  ret = STATUS_ERROR;
1066  tempSize = 0U;
1067  #if FEATURE_FLS_HAS_FLEX_NVM
1068  }
1069  #endif /* End of if FEATURE_FLS_HAS_FLEX_NVM */
1070  }
1071 
1072  *pSum = 0U;
1073  /* Doing sum operation */
1074  while (tempSize > 0U)
1075  {
1076  data = *(uint8_t *)(dest);
1077  *pSum += data;
1078  dest += 1U;
1079  tempSize -= 1U;
1080  ++counter;
1081 
1082  /* Check if need to serve callback function */
1083  if (counter >= FLASH_CALLBACK_CS)
1084  {
1085  /* Serve callback function if counter reaches limitation */
1086  if (NULL_CALLBACK != pSSDConfig->CallBack)
1087  {
1088  pSSDConfig->CallBack();
1089  }
1090 
1091  /* Reset counter */
1092  counter = 0U;
1093  }
1094  }
1095 
1096  return ret;
1097 }
1098 
1099 #if FEATURE_FLS_HAS_PROGRAM_SECTION_CMD
1100 /*FUNCTION**********************************************************************
1101  *
1102  * Function Name : FLASH_DRV_ProgramSection
1103  * Description : Program the data found in the Section Program Buffer
1104  * to previously erased locations in the Flash memory. Data is preloaded into
1105  * the Section Program Buffer by writing to the acceleration Ram and FlexRam
1106  * while it is set to function as a RAM. The Section Program Buffer is limited
1107  * to the value of FlexRam divides by a ratio. Refer to the associate reference
1108  * manual to get correct value of this ratio.
1109  * For derivatives including swap feature, the swap indicator address is encountered
1110  * during FlashProgramSection, it is bypassed without setting FPVIOL but the content
1111  * are not be programmed. In addition, the content of source data used to program to
1112  * swap indicator will be re-initialized to 0xFF after completion of this command.
1113  *
1114  * Implements : FLASH_DRV_ProgramSection_Activity
1115  *END**************************************************************************/
1117  uint32_t dest,
1118  uint16_t number)
1119 {
1120  DEV_ASSERT(pSSDConfig != NULL);
1121  status_t ret = STATUS_SUCCESS; /* Return code variable */
1122  uint32_t temp;
1123 
1124  /* Check RAMRDY bit of the flash configuration register */
1125  if (0U == (FTFx_FCNFG & FTFx_FCNFG_RAMRDY_MASK))
1126  {
1127  /* Return an error code */
1128  ret = STATUS_UNSUPPORTED;
1129  }
1130  else
1131  {
1132  #if FEATURE_FLS_HAS_FLEX_NVM
1133  temp = pSSDConfig->DFlashBase;
1134  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1135  {
1137  dest += 0x800000U - temp;
1138  }
1139  else
1140  #endif
1141  {
1143  temp = pSSDConfig->PFlashBase;
1144  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1145  {
1146  dest -= temp;
1147  }
1148  else
1149  {
1150  ret = STATUS_ERROR;
1151  }
1152  }
1153 
1154  if (ret == STATUS_SUCCESS)
1155  {
1156  /* Check CCIF to verify the previous command is completed */
1157  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1158  {
1159  ret = STATUS_BUSY;
1160  }
1161  else
1162  {
1163  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register.
1164  * Write 1 to clear
1165  */
1167  /* Passing parameter to command */
1169  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1170  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1171  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1172  FTFx_FCCOB4 = GET_BIT_8_15(number);
1173  FTFx_FCCOB5 = GET_BIT_0_7(number);
1174 
1175  /* Calling flash command sequence function to execute the command */
1176  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1177  }
1178  }
1179  }
1180 
1181  return ret;
1182 }
1183 #endif /* if FEATURE_FLS_HAS_PROGRAM_SECTION_CMD */
1184 
1185 #if FEATURE_FLS_HAS_ERASE_BLOCK_CMD
1186 /*FUNCTION**********************************************************************
1187  *
1188  * Function Name : FLASH_DRV_EraseBlock
1189  * Description : Erases all addresses in an individual P-Flash or D-Flash block.
1190  * For the derivatives including multiply logical P-Flash or D-Flash blocks,
1191  * this API erases a single block in a single call.
1192  *
1193  * Implements : FLASH_DRV_EraseBlock_Activity
1194  *END**************************************************************************/
1196  uint32_t dest)
1197 {
1198  DEV_ASSERT(pSSDConfig != NULL);
1199  status_t ret = STATUS_SUCCESS; /* Return code variable */
1200  uint32_t temp; /* Temporary variable */
1201 
1202  /* Check if the destination is aligned or not */
1203 #if FEATURE_FLS_HAS_FLEX_NVM
1204  temp = pSSDConfig->DFlashBase;
1205  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1206  {
1208  dest += 0x800000U - temp;
1209  }
1210  else
1211 #endif
1212  {
1214  temp = pSSDConfig->PFlashBase;
1215  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1216  {
1217  dest -= temp;
1218  }
1219  else
1220  {
1221  ret = STATUS_ERROR;
1222  }
1223  }
1224 
1225  if (STATUS_SUCCESS == ret)
1226  {
1227  /* Check CCIF to verify the previous command is completed */
1228  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1229  {
1230  ret = STATUS_BUSY;
1231  }
1232  else
1233  {
1234  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1236 
1237  /* Passing parameter to the command */
1239  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1240  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1241  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1242 
1243  /* Calling flash command sequence function to execute the command */
1244  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1245  }
1246  }
1247 
1248  return ret;
1249 }
1250 #endif /* if FEATURE_FLS_HAS_ERASE_BLOCK_CMD */
1251 
1252 #if FEATURE_FLS_HAS_READ_1S_BLOCK_CMD
1253 /*FUNCTION**********************************************************************
1254  *
1255  * Function Name : FLASH_DRV_VerifyBlock
1256  * Description : Checks to see if an entire P-Flash or D-Flash block has been
1257  * erased to the specified margin level. For the derivatives including multiply
1258  * logical P-Flash or D-Flash blocks, this API erases a single block in a single call.
1259  *
1260  * Implements : FLASH_DRV_VerifyBlock_Activity
1261  *END**************************************************************************/
1263  uint32_t dest,
1264  uint8_t marginLevel)
1265 {
1266  DEV_ASSERT(pSSDConfig != NULL);
1267  status_t ret = STATUS_SUCCESS; /* Return code variable */
1268  uint32_t temp;
1269 
1270  /* Check if the destination is aligned or not */
1271 #if FEATURE_FLS_HAS_FLEX_NVM
1272  temp = pSSDConfig->DFlashBase;
1273  if ((dest >= temp) && (dest < (temp + pSSDConfig->DFlashSize)))
1274  {
1276  dest += 0x800000U - temp;
1277  }
1278  else
1279 #endif
1280  {
1282  temp = pSSDConfig->PFlashBase;
1283  if ((dest >= temp) && (dest < (temp + pSSDConfig->PFlashSize)))
1284  {
1285  dest -= temp;
1286  }
1287  else
1288  {
1289  ret = STATUS_ERROR;
1290  }
1291  }
1292 
1293  if (STATUS_SUCCESS == ret)
1294  {
1295  /* Check CCIF to verify the previous command is completed */
1296  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1297  {
1298  ret = STATUS_BUSY;
1299  }
1300  else
1301  {
1302  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1304 
1305  /* Passing parameter to the command */
1307  FTFx_FCCOB1 = GET_BIT_16_23(dest);
1308  FTFx_FCCOB2 = GET_BIT_8_15(dest);
1309  FTFx_FCCOB3 = GET_BIT_0_7(dest);
1310  FTFx_FCCOB4 = marginLevel;
1311 
1312  /* Calling flash command sequence function to execute the command */
1313  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1314  }
1315  }
1316 
1317  return ret;
1318 }
1319 #endif /* if FEATURE_FLS_HAS_READ_1S_BLOCK_CMD */
1320 
1321 #if FEATURE_FLS_HAS_FLEX_NVM
1322 /*FUNCTION**********************************************************************
1323  *
1324  * Function Name : FLASH_DRV_GetEERAMProtection
1325  * Description : Retrieves which EEPROM sections of FlexRAM are protected
1326  * against program and erase operations. Considering the time consumption
1327  * for getting protection is very low and even can be ignored, it is not necessary
1328  * to utilize the Callback function to support the time-critical events
1329  *
1330  * Implements : FLASH_DRV_GetEERAMProtection_Activity
1331  *END**************************************************************************/
1332 status_t FLASH_DRV_GetEERAMProtection(uint8_t * protectStatus)
1333 {
1334  DEV_ASSERT(protectStatus != NULL);
1335  status_t ret = STATUS_SUCCESS; /* Return code variable */
1336 
1337  /* Check if EERAM is set for EEPROM */
1338  if ((FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK) == FTFx_FCNFG_EEERDY_MASK)
1339  {
1340  *protectStatus = FTFx_FEPROT;
1341  }
1342  else
1343  {
1344  ret = STATUS_UNSUPPORTED;
1345  }
1346 
1347  return ret;
1348 }
1349 
1350 /*FUNCTION**********************************************************************
1351  *
1352  * Function Name : FLASH_DRV_SetEERAMProtection
1353  * Description : Sets protection to the intended protection status for EEPROM us
1354  * area of FlexRam. This is subject to a protection transition restriction.
1355  * If there is a setting violation, it returns failed information and
1356  * the current protection status will not be changed.
1357  *
1358  * Implements : FLASH_DRV_SetEERAMProtection_Activity
1359  *END**************************************************************************/
1360 status_t FLASH_DRV_SetEERAMProtection(uint8_t protectStatus)
1361 {
1362  status_t ret = STATUS_SUCCESS; /* Return code variable */
1363 
1364  /* Check if FlexRAM is set for EEPROM */
1365  if (0U == (FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK))
1366  {
1367  /* FlexRAM is not set for EEPROM */
1368  ret = STATUS_UNSUPPORTED;
1369  }
1370  else
1371  {
1372  FTFx_FEPROT = protectStatus;
1373  if (protectStatus != FTFx_FEPROT)
1374  {
1375  ret = STATUS_ERROR;
1376  }
1377  else
1378  {
1379  /* Do nothing */
1380  }
1381  }
1382 
1383  return ret;
1384 }
1385 
1386 /*FUNCTION**********************************************************************
1387  *
1388  * Function Name : FLASH_DRV_SetFlexRamFunction
1389  * Description : This function is used to change the function of the FlexRAM. When not partitioned for
1390  * emulated EEPROM, the FlexRAM is typically used as traditional RAM.
1391  * Otherwise, the FlexRam is typically used to store EEPROM data, the writing to EEPROM is normal write or
1392  * quick write.
1393  * In addition, this function may be used to get EEPROM status or complete interrupted EEPROM quick write process.
1394  * For example, after partitioning to have EEPROM backup, FlexRAM is used for EEPROM
1395  * use accordingly and if want to change FlexRAM to traditional RAM for FlashProgramSection() use, call this API
1396  * with the function control code is 0xFFU.
1397  *
1398  * Implements : FLASH_DRV_SetFlexRamFunction_Activity
1399  *END**************************************************************************/
1401  flash_flexRam_function_control_code_t flexRamFuncCode,
1402  uint16_t byteOfQuickWrite,
1403  flash_eeprom_status_t * const pEEPROMStatus)
1404 {
1405  DEV_ASSERT(pSSDConfig != NULL);
1406  status_t ret; /* Return code variable */
1407 
1408  /* Check CCIF to verify the previous command is completed */
1409  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1410  {
1411  ret = STATUS_BUSY;
1412  }
1413  else
1414  {
1415  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1417 
1418  /* Passing parameter to the command */
1420  FTFx_FCCOB1 = (uint8_t)flexRamFuncCode;
1421 
1422  if (flexRamFuncCode == EEE_QUICK_WRITE)
1423  {
1424  FTFx_FCCOB4 = (uint8_t)(byteOfQuickWrite >> 0x8U);
1425  FTFx_FCCOB5 = (uint8_t)(byteOfQuickWrite & 0xFFU);
1426  }
1427 
1428  /* Calling flash command sequence function to execute the command */
1429  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1430 
1431  if ((flexRamFuncCode == EEE_STATUS_QUERY) && (ret == STATUS_SUCCESS))
1432  {
1433  if (pEEPROMStatus == NULL)
1434  {
1435  ret = STATUS_ERROR;
1436  }
1437  else
1438  {
1439  pEEPROMStatus->brownOutCode = FTFx_FCCOB5;
1440  pEEPROMStatus->sectorEraseCount = (uint16_t)((uint16_t)FTFx_FCCOB8 << 8U);
1441  pEEPROMStatus->sectorEraseCount |= (uint16_t)FTFx_FCCOB9;
1442  pEEPROMStatus->numOfRecordReqMaintain = (uint16_t)((uint16_t)FTFx_FCCOB6 << 8U);
1443  pEEPROMStatus->numOfRecordReqMaintain |= (uint16_t)FTFx_FCCOB7;
1444  }
1445  }
1446  }
1447 
1448  return ret;
1449 }
1450 
1451 /*FUNCTION**********************************************************************
1452  *
1453  * Function Name : FLASH_DRV_WaitEEWriteToFinish
1454  * Description : Write to EEPROM with data was aligned and wait until operation finish.
1455  *
1456  *END**************************************************************************/
1457 static status_t FLASH_DRV_WaitEEWriteToFinish(const flash_ssd_config_t * pSSDConfig,
1458  uint32_t dest,
1459  const uint8_t * pData,
1460  uint8_t step)
1461 {
1462  DEV_ASSERT(pData != NULL);
1463  status_t ret = STATUS_SUCCESS; /* Return code variable */
1464  uint32_t temp; /* Temporary variable */
1465 
1466  if (0x01U == step)
1467  {
1468  *(uint8_t *)dest = *pData;
1469  }
1470 
1471  if (0x02U == step)
1472  {
1473  temp = (uint32_t)(pData[1]) << 8U;
1474  temp |= (uint32_t)(pData[0]);
1475  *(volatile uint16_t *)dest = (uint16_t)temp;
1476  }
1477 
1478  if (0x04U == step)
1479  {
1480  temp = (uint32_t)(pData[3]) << 24U;
1481  temp |= (uint32_t)(pData[2]) << 16U;
1482  temp |= (uint32_t)(pData[1]) << 8U;
1483  temp |= (uint32_t)(pData[0]);
1484  *(volatile uint32_t *)dest = temp;
1485  }
1486 
1487  while (0U == (FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK))
1488  {
1489  /* Wait till EEERDY bit is set
1490  * Serve callback function as often as possible
1491  */
1492  if (NULL_CALLBACK != pSSDConfig->CallBack)
1493  {
1494  (pSSDConfig->CallBack)();
1495  }
1496  }
1497 
1498  /* Check for protection violation error */
1500  {
1501  ret = STATUS_ERROR;
1502  }
1503 
1504  return ret;
1505 }
1506 
1507 /*FUNCTION**********************************************************************
1508  *
1509  * Function Name : FLASH_DRV_EEEWrite
1510  * Description : Write data to FlexRAM section which is partitioned
1511  * as EEPROM use for EEPROM operation. After data has been written to EEPROM
1512  * use section of FlexRAM, the EEPROM file system will create new data record
1513  * in EEPROM back-up area of FlexNVM in round-robin fashion.
1514  * There is no alignment constraint for destination and size parameters
1515  * provided by user. However, according to user's input provided, this
1516  * API will set priority to write to FlexRAM with following rules:
1517  * 32-bit writing is invoked if destination is 32 bit aligned and size
1518  * is not less than 32 bits.
1519  * 16-bit writing is invoked if destination is 16 bit aligned and size
1520  * is not less than 16 bits.
1521  * 8-bit writing is invoked if destination is 8 bit aligned and size
1522  * is not less than 8 bits.
1523  * When EEPROM was set to EEPROM quick writes mode, the dest address
1524  * should be aligned 4 bytes,the size should be divided by 4.
1525  * Implements : FLASH_DRV_EEEWrite_Activity
1526  *END**************************************************************************/
1528  uint32_t dest,
1529  uint32_t size,
1530  const uint8_t * pData)
1531 {
1532  DEV_ASSERT(pSSDConfig != NULL);
1533  DEV_ASSERT(pData != NULL);
1534  DEV_ASSERT(size > 0U);
1535  status_t ret = STATUS_SUCCESS; /* Return code variable */
1536  uint8_t i;
1537 
1538  /* Check if EEE is enabled */
1539  if ((FTFx_FCNFG & FTFx_FCNFG_EEERDY_MASK) == FTFx_FCNFG_EEERDY_MASK)
1540  {
1541  /* Check range */
1542  if ((dest < pSSDConfig->EERAMBase) || ((dest + size) > (pSSDConfig->EERAMBase + pSSDConfig->EEESize)))
1543  {
1544  ret = STATUS_ERROR;
1545  }
1546 
1547  while ((size > 0U) && (ret == STATUS_SUCCESS))
1548  {
1549  /* Dest is 32bit-aligned and size is not less than 4 */
1550  if ((0U == (dest & 3U)) && (size >= 4U))
1551  {
1552  i = 4U;
1553  }
1554  else if ((0U == (dest & 1U)) && (size >= 2U))
1555  {
1556  i = 2U;
1557  }
1558  else
1559  {
1560  i = 1U;
1561  }
1562 
1563  ret = FLASH_DRV_WaitEEWriteToFinish(pSSDConfig,
1564  dest,
1565  pData,
1566  i);
1567  /* Update destination address for next iteration */
1568  dest += i;
1569  /* Update size for next iteration */
1570  size -= i;
1571  /* Update data for next iteration */
1572  pData += i;
1573  }
1574  }
1575  else
1576  {
1577  ret = STATUS_UNSUPPORTED;
1578  }
1579 
1580  return ret;
1581 }
1582 
1583 /*FUNCTION**********************************************************************
1584  *
1585  * Function Name : FLASH_DRV_DEFlashPartition
1586  * Description : Prepares the FlexNVM block for use as D-Flash, EEPROM backup, or a combination
1587  * of both and initializes the FlexRAM.
1588  * The single partition choice should be used through entire life time of a given
1589  * application to guarantee the Flash endurance and data retention of Flash module.
1590  *
1591  * Implements : FLASH_DRV_DEFlashPartition_Activity
1592  *END**************************************************************************/
1594  uint8_t uEEEDataSizeCode,
1595  uint8_t uDEPartitionCode,
1596  uint8_t uCSEcKeySize,
1597  bool uSFE,
1598  bool flexRamEnableLoadEEEData)
1599 {
1600  DEV_ASSERT(pSSDConfig != NULL);
1601  DEV_ASSERT(uCSEcKeySize <= CSE_KEY_SIZE_CODE_MAX);
1602  status_t ret; /* Return code variable */
1603 
1604  /* Check CCIF to verify the previous command is completed */
1605  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1606  {
1607  ret = STATUS_BUSY;
1608  }
1609  else
1610  {
1611  /* Clear RDCOLERR & ACCERR & FPVIOL & MGSTAT0 flag in flash status register. Write 1 to clear */
1613 
1614  /* Passing parameter to the command */
1616  FTFx_FCCOB1 = uCSEcKeySize;
1617  FTFx_FCCOB2 = (uint8_t)(uSFE ? 1U : 0U);
1618  FTFx_FCCOB3 = (uint8_t)(flexRamEnableLoadEEEData ? 0U : 1U);
1619  FTFx_FCCOB4 = uEEEDataSizeCode;
1620  FTFx_FCCOB5 = uDEPartitionCode;
1621 
1622  /* Calling flash command sequence function to execute the command */
1623  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1624  }
1625 
1626  return ret;
1627 }
1628 
1629 /*FUNCTION**********************************************************************
1630  *
1631  * Function Name : FLASH_DRV_GetDFlashProtection
1632  * Description : Retrieves current P-Flash protection status. Considering the time consumption
1633  * for getting protection is very low and even can be ignored, it is not necessary to utilize
1634  * the Callback function to support the time-critical events.
1635  *
1636  * Implements : FLASH_DRV_GetDFlashProtection_Activity
1637  *END**************************************************************************/
1639  uint8_t * protectStatus)
1640 {
1641  DEV_ASSERT(pSSDConfig != NULL);
1642  DEV_ASSERT(protectStatus != NULL);
1643  status_t ret = STATUS_SUCCESS; /* Return code variable */
1644 
1645  /* Check if size of DFlash = 0 */
1646  if (pSSDConfig->DFlashSize == 0U)
1647  {
1648  ret = STATUS_UNSUPPORTED;
1649  }
1650  else
1651  {
1652  *protectStatus = FTFx_FDPROT;
1653  }
1654 
1655  return ret;
1656 }
1657 
1658 /*FUNCTION**********************************************************************
1659  *
1660  * Function Name : FLASH_DRV_SetDFlashProtection
1661  * Description : Sets the D-Flash protection to the intended protection status.
1662  * Setting D-Flash protection status is subject to a protection transition restriction.
1663  * If there is a setting violation, it returns failed information
1664  * and the current protection status will not be changed.
1665  *
1666  * Implements : FLASH_DRV_SetDFlashProtection_Activity
1667  *END**************************************************************************/
1669  uint8_t protectStatus)
1670 {
1671  DEV_ASSERT(pSSDConfig != NULL);
1672  status_t ret = STATUS_SUCCESS; /* Return code variable */
1673 
1674  /* Check if size of DFlash = 0 */
1675  if (pSSDConfig->DFlashSize == 0U)
1676  {
1677  ret = STATUS_UNSUPPORTED;
1678  }
1679  else
1680  {
1681  FTFx_FDPROT = protectStatus;
1682  if (protectStatus != FTFx_FDPROT)
1683  {
1684  ret = STATUS_ERROR;
1685  }
1686  else
1687  {
1688  /* Do nothing */
1689  }
1690  }
1691 
1692  return ret;
1693 }
1694 #endif /* If FEATURE_FLS_HAS_FLEX_NVM */
1695 
1696 #if FEATURE_FLS_HAS_PF_BLOCK_SWAP
1697 /*FUNCTION**********************************************************************
1698  *
1699  * Function Name : FLASH_DRV_PFlashSwap
1700  * Description : Provides to user with an ability to interfere in a swap progress by letting the
1701  * user code know about the swap state in each phase of the process. This is done via pSwapCallBack()
1702  * parameter. To stop at each intermediate swap state, set the return value of
1703  * this callback function to FALSE. To complete swap process within a single call,
1704  * set the return value of this function to TRUE.
1705  *
1706  * Erase the non-active swap indicator somewhere in the application code
1707  * or in the swap call back function when swap system is in UPDATE state.
1708  *
1709  * In addition, if user does not want to use the swap call back parameter, pass the NULL_SWAP_CALLBACK
1710  * as a null pointer. In this situation, the PFlashSwap() behaves in the same way as setting the return
1711  * value of pSwapCallBack to TRUE and the user does not need to erase the non-active swap
1712  * indicator when the swap system is in UPDATE state.
1713  * The swap indicator provided by the user must be within the lower half of P-Flash block but not in the
1714  * Flash configuration area. If P-Flash block has two logical blocks, the swap indicator must be
1715  * in P-Flash block 0. If the P-Flash block has four logical blocks, the swap indicator can be in block
1716  * 0 or block 1. It must not be in the Flash configuration field.
1717  * The user must use the same swap indicator for all swap control code except report swap status once
1718  * swap system has been initialized. To refresh swap system to un-initialization state,
1719  * use the FlashEraseAllBlock() to clean up the swap environment.
1720  *
1721  *END**************************************************************************/
1722 status_t FLASH_DRV_PFlashSwap(const flash_ssd_config_t * pSSDConfig,
1723  uint32_t addr,
1724  flash_swap_callback_t pSwapCallback)
1725 {
1726  DEV_ASSERT(pSSDConfig != NULL);
1727  DEV_ASSERT(pSwapCallback != NULL);
1728  status_t ret = STATUS_SUCCESS; /* Return code variable */
1729  uint8_t currentSwapMode, currentSwapBlockStatus, nextSwapBlockStatus;
1730  bool swapContinue;
1731  currentSwapMode = 0xFFU;
1732  currentSwapBlockStatus = 0xFFU;
1733  nextSwapBlockStatus = 0xFFU;
1734  swapContinue = false;
1735 
1736  /* Report current swap state */
1737  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig, addr, FTFx_SWAP_REPORT_STATUS, &currentSwapMode, &currentSwapBlockStatus, &nextSwapBlockStatus);
1738 
1739  if (STATUS_SUCCESS == ret)
1740  {
1741  if ((FTFx_SWAP_UNINIT == currentSwapMode) || (FTFx_SWAP_READY == currentSwapMode) || (FTFx_SWAP_UPDATE == currentSwapMode))
1742  {
1743  /* If current swap mode is Uninitialized */
1744  if (FTFx_SWAP_UNINIT == currentSwapMode)
1745  {
1746  /* Initialize Swap to Initialized/READY state */
1747  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1748  addr,
1750  &currentSwapMode,
1751  &currentSwapBlockStatus,
1752  &nextSwapBlockStatus);
1753  }
1754  /* If current swap mode is Initialized/Ready */
1755  else if (FTFx_SWAP_READY == currentSwapMode)
1756  {
1757  /* Initialize Swap to UPDATE state */
1758  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1759  addr,
1761  &currentSwapMode,
1762  &currentSwapBlockStatus,
1763  &nextSwapBlockStatus);
1764  }
1765  else
1766  {
1767  /* If (FTFx_SWAP_UPDATE == currentSwapMode) do nothing */
1768  }
1769 
1770  /* Check for the success of command execution
1771  * Report the current swap state to user via callback
1772  */
1773  if ((NULL_SWAP_CALLBACK != pSwapCallback) && (STATUS_SUCCESS == ret))
1774  {
1775  swapContinue = pSwapCallback(currentSwapMode);
1776 
1777  if (swapContinue == true)
1778  {
1779  /* Report current swap state */
1780  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1781  addr,
1783  &currentSwapMode,
1784  &currentSwapBlockStatus,
1785  &nextSwapBlockStatus);
1786  }
1787  }
1788  }
1789  else
1790  {
1791  /* Do nothing */
1792  }
1793 
1794  if ((NULL_SWAP_CALLBACK == pSwapCallback) && (FTFx_SWAP_UPDATE == currentSwapMode))
1795  {
1796  /* Erase indicator sector in non active block to proceed swap system to update-erased state */
1797  ret = FLASH_DRV_EraseSector(pSSDConfig, addr + (pSSDConfig->PFlashSize >> 1U), (uint32_t)FEATURE_FLS_PF_BLOCK_SECTOR_SIZE);
1798  if (STATUS_SUCCESS == ret)
1799  {
1800  /* Now the swap state must be Update-Erased, so report current swap state */
1801  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1802  addr,
1804  &currentSwapMode,
1805  &currentSwapBlockStatus,
1806  &nextSwapBlockStatus);
1807  }
1808  }
1809 
1810  /* If current swap mode is Update or Update-Erased */
1811  if (FTFx_SWAP_UPDATE_ERASED == currentSwapMode)
1812  {
1813  if (NULL_SWAP_CALLBACK == pSwapCallback)
1814  {
1815  swapContinue = true;
1816  }
1817  else
1818  {
1819  swapContinue = pSwapCallback(currentSwapMode);
1820  }
1821 
1822  if (swapContinue == true)
1823  {
1824  /* Progress Swap to COMPLETE State */
1825  ret = FLASH_DRV_PFlashSwapCtl(pSSDConfig,
1826  addr,
1828  &currentSwapMode,
1829  &currentSwapBlockStatus,
1830  &nextSwapBlockStatus);
1831  }
1832  }
1833  }
1834 
1835  return ret;
1836 }
1837 
1838 /*FUNCTION**********************************************************************
1839  *
1840  * Function Name : FLASH_DRV_PFlashSwapCtl
1841  * Description : Performs swap control command corresponding with the swap
1842  * control code provided via the swap command parameter.
1843  *
1844  *END**************************************************************************/
1845 status_t FLASH_DRV_PFlashSwapCtl(const flash_ssd_config_t * pSSDConfig,
1846  uint32_t addr,
1847  uint8_t swapcmd,
1848  uint8_t * pCurrentSwapMode,
1849  uint8_t * pCurrentSwapBlockStatus,
1850  uint8_t * pNextSwapBlockStatus)
1851 {
1852  DEV_ASSERT(pSSDConfig != NULL);
1853  DEV_ASSERT(pCurrentSwapMode != NULL);
1854  DEV_ASSERT(pCurrentSwapBlockStatus != NULL);
1855  DEV_ASSERT(pNextSwapBlockStatus != NULL);
1856  status_t ret; /* Return code variable */
1857 
1858  /* Check CCIF to verify the previous command is completed */
1859  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1860  {
1861  ret = STATUS_BUSY;
1862  }
1863  else
1864  {
1865  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1867 
1868  /* Passing parameter to the command */
1870  FTFx_FCCOB1 = GET_BIT_16_23(addr);
1871  FTFx_FCCOB2 = GET_BIT_8_15(addr);
1872  FTFx_FCCOB3 = GET_BIT_0_7(addr);
1873  FTFx_FCCOB4 = swapcmd;
1874  FTFx_FCCOB5 = 0xFFU;
1875  FTFx_FCCOB6 = 0xFFU;
1876  FTFx_FCCOB7 = 0xFFU;
1877 
1878  /* Calling flash command sequence function to execute the command */
1879  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1880 
1881  if (STATUS_SUCCESS == ret)
1882  {
1883  *pCurrentSwapMode = FTFx_FCCOB5;
1884  *pCurrentSwapBlockStatus = FTFx_FCCOB6;
1885  *pNextSwapBlockStatus = FTFx_FCCOB7;
1886  }
1887  }
1888 
1889  return ret;
1890 }
1891 #endif /* End of FEATURE_FLASH_HAS_PFLASH_BLOCK_SWAP */
1892 
1893 #if FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD
1894 /*FUNCTION**********************************************************************
1895  *
1896  * Function Name : FLASH_DRV_EraseAllBlockUnsecure
1897  * Description : Erases all Flash memory, initializes the FlexRAM, verifies
1898  * all memory contents, and then releases the MCU security.
1899  *
1900  * Implements : FLASH_DRV_EraseAllBlockUnsecure_Activity
1901  *END**************************************************************************/
1903 {
1904  DEV_ASSERT(pSSDConfig != NULL);
1905  status_t ret; /* Return code variable */
1906 
1907  /* Check CCIF to verify the previous command is completed */
1908  if (0U == (FTFx_FSTAT & FTFx_FSTAT_CCIF_MASK))
1909  {
1910  ret = STATUS_BUSY;
1911  }
1912  else
1913  {
1914  /* Clear RDCOLERR & ACCERR & FPVIOL flag in flash status register. Write 1 to clear */
1916 
1917  /* Passing parameter to the command */
1919 
1920  /* Calling flash command sequence function to execute the command */
1921  ret = FLASH_DRV_CommandSequence(pSSDConfig);
1922  }
1923 
1924  return ret;
1925 }
1926 #endif /* End of FEATURE_FLS_HAS_ERASE_ALL_BLOCKS_UNSECURE_CMD */
1927 
1928 /*FUNCTION**********************************************************************
1929  *
1930  * Function Name : FLASH_DRV_EnableCmdCompleteInterupt
1931  * Description : Enable the command complete interrupt is generated when
1932  * an FTFC command completes.
1933  *
1934  * Implements : FLASH_DRV_EnableCmdCompleteInterupt_Activity
1935  *END**************************************************************************/
1937 {
1938  const IRQn_Type flashIrqId = FTFC_COMMAND_COMPLETE_IRQS;
1939 
1940  /* Enable the command complete interrupt */
1942  INT_SYS_EnableIRQ(flashIrqId);
1943 
1944  return STATUS_SUCCESS;
1945 }
1946 
1947 /*FUNCTION**********************************************************************
1948  *
1949  * Function Name : FLASH_DRV_DisableCmdCompleteInterupt
1950  * Description : Disable the command complete interrupt.
1951  *
1952  * Implements : FLASH_DRV_DisableCmdCompleteInterupt_Activity
1953  *END**************************************************************************/
1955 {
1956  const IRQn_Type flashIrqId = FTFC_COMMAND_COMPLETE_IRQS;
1957 
1958  /* Disable the command complete interrupt */
1959  FTFx_FCNFG &= (uint8_t)(~FTFx_FCNFG_CCIE_MASK);
1960  INT_SYS_DisableIRQ(flashIrqId);
1961 }
1962 
1963 /*FUNCTION**********************************************************************
1964  *
1965  * Function Name : FLASH_DRV_EnableReadColisionInterupt
1966  * Description : Enable the read collision error interrupt generation when an
1967  * FTFC read collision error occurs.
1968  *
1969  * Implements : FLASH_DRV_EnableReadColisionInterupt_Activity
1970  *END**************************************************************************/
1972 {
1973  const IRQn_Type flashIrqId = FTFC_READ_COLLISION_IRQS;
1974 
1975  /* Enable the read collision error interrupt */
1977  INT_SYS_EnableIRQ(flashIrqId);
1978 
1979  return STATUS_SUCCESS;
1980 }
1981 
1982 /*FUNCTION**********************************************************************
1983  *
1984  * Function Name : FLASH_DRV_DisableReadColisionInterupt
1985  * Description : Disable the read collision error interrupt
1986  *
1987  * Implements : FLASH_DRV_DisableReadColisionInterupt_Activity
1988  *END**************************************************************************/
1990 {
1991  const IRQn_Type flashIrqId = FTFC_READ_COLLISION_IRQS;
1992 
1993  /* Disable the read collision error interrupt */
1994  FTFx_FCNFG &= (uint8_t)(~FTFx_FCNFG_RDCOLLIE_MASK);
1995  INT_SYS_DisableIRQ(flashIrqId);
1996 }
1997 
1998 #if FEATURE_FLS_HAS_DETECT_ECC_ERROR
1999 /*FUNCTION**********************************************************************
2000  *
2001  * Function Name : FLASH_DRV_EnableDoubleBitFaultInterupt
2002  * Description : Enable the double bit fault detect interrupt generation when
2003  * an uncorrectable ECC fault is detected during a valid flash read access from
2004  * the platform flash controller.
2005  *
2006  * Implements : FLASH_DRV_EnableDoubleBitFaultInterupt_Activity
2007  *END**************************************************************************/
2009 {
2010  /* Enable the double bit fault detect interrupt */
2012 #if FEATURE_FLS_HAS_INTERRUPT_DOUBLE_BIT_FAULT_IRQ
2013  INT_SYS_EnableIRQ(FTFC_Fault_IRQn);
2014 #else
2016 #endif
2017  return STATUS_SUCCESS;
2018 }
2019 
2020 /*FUNCTION**********************************************************************
2021  *
2022  * Function Name : FLASH_DRV_DisableDoubleBitFaultInterupt
2023  * Description : Disable the double bit fault detect interrupt
2024  *
2025  * Implements : FLASH_DRV_DisableDoubleBitFaultInterupt_Activity
2026  *END**************************************************************************/
2028 {
2029  /* Disable the double bit fault detect interrupt */
2030  FTFx_FERCNFG &= (uint8_t)(~FTFx_FERCNFG_DFDIE_MASK);
2031 #if FEATURE_FLS_HAS_INTERRUPT_DOUBLE_BIT_FAULT_IRQ
2032  INT_SYS_DisableIRQ(FTFC_Fault_IRQn);
2033 #else
2035 #endif
2036 }
2037 #endif
2038 
2039 /*******************************************************************************
2040 * EOF
2041 *******************************************************************************/
#define FTFx_FCNFG_RAMRDY_MASK
Definition: flash_driver.h:264
status_t FLASH_DRV_DEFlashPartition(const flash_ssd_config_t *pSSDConfig, uint8_t uEEEDataSizeCode, uint8_t uDEPartitionCode, uint8_t uCSEcKeySize, bool uSFE, bool flexRamEnableLoadEEEData)
Flash D/E-Flash Partition.
status_t FLASH_DRV_GetDFlashProtection(const flash_ssd_config_t *pSSDConfig, uint8_t *protectStatus)
D-Flash get protection.
#define FTFx_SWAP_SET_IN_COMPLETE
Set Swap in Complete State.
Definition: flash_driver.h:430
status_t FLASH_DRV_VerifyAllBlock(const flash_ssd_config_t *pSSDConfig, uint8_t marginLevel)
Flash verify all blocks.
#define NULL_CALLBACK
Null callback.
Definition: flash_driver.h:526
#define FEATURE_FLS_DF_SIZE_0100
#define END_FUNCTION_DECLARATION_RAMSECTION
Definition: s32_core_cm0.h:136
#define FTFx_FSEC_SEC_MASK
Definition: flash_driver.h:285
#define FTFx_FSTAT_ACCERR_MASK
Definition: flash_driver.h:247
#define FTFx_VERIFY_BLOCK
Definition: flash_driver.h:401
#define FTFx_VERIFY_SECTION
Definition: flash_driver.h:402
#define FEATURE_FLS_EE_SIZE_1111
#define FTFx_FCNFG_EEERDY_MASK
Definition: flash_driver.h:260
void FLASH_DRV_EraseResume(void)
Flash erase resume.
#define FEATURE_FLS_PF_SECTOR_CMD_ADDRESS_ALIGMENT
status_t FLASH_DRV_SetEERAMProtection(uint8_t protectStatus)
EERAM set protection.
flash_callback_t CallBack
Definition: flash_driver.h:594
#define FEATURE_FLS_PF_BLOCK_CMD_ADDRESS_ALIGMENT
#define FEATURE_FLS_EE_SIZE_1100
#define FEATURE_FLS_EE_SIZE_0011
#define CLEAR_FTFx_FSTAT_ERROR_BITS
Definition: flash_driver.h:380
status_t FLASH_DRV_GetEERAMProtection(uint8_t *protectStatus)
EERAM get protection.
#define FTFx_SWAP_SET_IN_PREPARE
Set Swap in Update State.
Definition: flash_driver.h:428
#define FEATURE_FLS_DF_SIZE_0001
#define FLASH_NOT_SECURE
Flash currently not in secure state.
Definition: flash_driver.h:498
void FLASH_DRV_EraseSuspend(void)
Flash erase suspend.
#define FEATURE_FLS_EE_SIZE_0010
#define FEATURE_FLS_DF_SIZE_1010
#define FTFx_FPROT1
Definition: flash_driver.h:229
status_t FLASH_DRV_EEEWrite(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pData)
EEPROM Emulator Write.
#define SIM
Definition: S32K118.h:9629
#define FEATURE_FLS_EE_SIZE_0001
#define FTFx_PROGRAM_ONCE
Definition: flash_driver.h:412
#define FTFx_SET_EERAM
Definition: flash_driver.h:418
#define FEATURE_FLS_EE_SIZE_0101
#define FLASH_SECURE_BACKDOOR_DISABLED
Flash is secured and backdoor key access disabled.
Definition: flash_driver.h:502
status_t FLASH_DRV_EraseSector(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size)
Flash erase sector.
#define GET_BIT_0_7(value)
Definition: flash_driver.h:462
#define FEATURE_FLS_DF_SIZE_1000
#define FTFx_FEPROT
Definition: flash_driver.h:231
void FLASH_DRV_DisableDoubleBitFaultInterupt(void)
Disable the double bit fault detect interrupt.
#define FTFx_FSTAT_RDCOLERR_MASK
Definition: flash_driver.h:251
#define FTFx_SWAP_UPDATE
Update swap mode.
Definition: flash_driver.h:444
#define FLASH_CALLBACK_CS
Callback period count for FlashCheckSum.
Definition: flash_driver.h:515
#define FTFx_FCCOB8
Definition: flash_driver.h:226
#define FTFx_PROGRAM_CHECK
Definition: flash_driver.h:403
#define FTFx_FCCOB2
Definition: flash_driver.h:216
#define FEATURE_FLS_EE_SIZE_1011
#define FEATURE_FLS_DF_SIZE_0101
status_t FLASH_DRV_Init(const flash_user_config_t *const pUserConf, flash_ssd_config_t *const pSSDConfig)
Initializes Flash.
#define FEATURE_FLS_DF_BLOCK_SIZE
#define FTFx_SECURITY_BY_PASS
Definition: flash_driver.h:414
#define FTFx_FPROT0
Definition: flash_driver.h:230
#define FTFx_ERASE_ALL_BLOCK
Definition: flash_driver.h:413
#define START_FUNCTION_DECLARATION_RAMSECTION
Places a function in RAM.
Definition: s32_core_cm0.h:135
status_t FLASH_DRV_Program(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pData)
Flash program.
#define FTFx_ERASE_ALL_BLOCK_UNSECURE
Definition: flash_driver.h:416
#define FTFx_FCCOB4
Definition: flash_driver.h:222
#define FTFx_SWAP_REPORT_STATUS
Report Swap Status.
Definition: flash_driver.h:432
#define FTFx_SWAP_READY
Ready swap mode.
Definition: flash_driver.h:442
status_t FLASH_DRV_EnableReadColisionInterupt(void)
Enable the read collision error interrupt.
#define CSE_KEY_SIZE_CODE_MAX
Definition: flash_driver.h:472
#define FEATURE_FLS_DF_BLOCK_SECTOR_SIZE
status_t FLASH_DRV_VerifyBlock(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint8_t marginLevel)
Flash verify block.
flash_flexRam_function_control_code_t
FlexRAM Function control Code.
Definition: flash_driver.h:484
#define FEATURE_FLS_DF_SIZE_0110
#define FTFx_FSTAT
Definition: flash_driver.h:211
#define FEATURE_FLS_DF_SIZE_0111
#define FEATURE_FLS_PF_RESOURCE_CMD_ADDRESS_ALIGMENT
#define FTFx_FCCOB0
Definition: flash_driver.h:218
#define SIM_FCFG1_DEPART_SHIFT
Definition: S32K118.h:9870
#define FTFx_RSRC_CODE_REG
Definition: flash_driver.h:393
void INT_SYS_DisableIRQ(IRQn_Type irqNumber)
Disables an interrupt for a given IRQ number.
#define FEATURE_FLS_DF_SIZE_1110
static START_FUNCTION_DECLARATION_RAMSECTION status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t *pSSDConfig) END_FUNCTION_DECLARATION_RAMSECTION static void FLASH_DRV_GetDEPartitionCode(flash_ssd_config_t *const pSSDConfig
#define GET_BIT_8_15(value)
Definition: flash_driver.h:463
#define DEV_ASSERT(x)
Definition: devassert.h:77
#define FEATURE_FLS_PF_SECTION_CMD_ADDRESS_ALIGMENT
void FLASH_DRV_GetPFlashProtection(uint32_t *protectStatus)
P-Flash get protection.
#define FEATURE_FLS_DF_SECTOR_CMD_ADDRESS_ALIGMENT
status_t FLASH_DRV_ProgramCheck(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, const uint8_t *pExpectedData, uint32_t *pFailAddr, uint8_t marginLevel)
Flash program check.
#define FTFx_FPROT3
Definition: flash_driver.h:227
#define FEATURE_FLS_PF_CHECK_CMD_ADDRESS_ALIGMENT
#define FTFx_READ_ONCE
Definition: flash_driver.h:411
status_t FLASH_DRV_SetFlexRamFunction(const flash_ssd_config_t *pSSDConfig, flash_flexRam_function_control_code_t flexRamFuncCode, uint16_t byteOfQuickWrite, flash_eeprom_status_t *const pEEPROMStatus)
Set FlexRAM function.
#define FEATURE_FLS_DF_RESOURCE_CMD_ADDRESS_ALIGMENT
#define FTFx_SWAP_SET_INDICATOR_ADDR
Initialize Swap System control code.
Definition: flash_driver.h:426
status_t FLASH_DRV_CheckSum(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint32_t size, uint32_t *pSum)
Calculates check sum.
#define FTFx_FSTAT_FPVIOL_MASK
Definition: flash_driver.h:243
#define FTFx_PROGRAM_LONGWORD
Definition: flash_driver.h:405
#define GET_BIT_24_31(value)
Definition: flash_driver.h:465
status_t FLASH_DRV_SetDFlashProtection(const flash_ssd_config_t *pSSDConfig, uint8_t protectStatus)
D-Flash set protection.
status_t FLASH_DRV_EraseBlock(const flash_ssd_config_t *pSSDConfig, uint32_t dest)
Flash erase block.
#define FEATURE_FLS_EE_SIZE_0111
#define FEATURE_FLS_PF_BLOCK_SECTOR_SIZE
#define FTFx_FCCOB1
Definition: flash_driver.h:217
#define FTFx_ERASE_BLOCK
Definition: flash_driver.h:407
#define SUSPEND_WAIT_CNT
Suspend wait count used in FLASH_DRV_EraseSuspend function.
Definition: flash_driver.h:454
#define FLASH_SECURITY_STATE_UNSECURED
Definition: flash_driver.h:469
status_t
Status return codes. Common error codes will be a unified enumeration (C enum) that will contain all ...
Definition: status.h:44
IRQn_Type
Defines the Interrupt Numbers definitions.
Definition: S32K118.h:188
status_t FLASH_DRV_ProgramSection(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint16_t number)
Flash program section.
#define FEATURE_FLS_EE_SIZE_1000
#define FEATURE_FLS_EE_SIZE_0110
#define FTFx_FSEC_KEYEN_MASK
Definition: flash_driver.h:297
EEPROM status structure.
Definition: flash_driver.h:603
#define FTFx_BASE
Definition: flash_driver.h:210
#define FTFx_FSTAT_CCIF_MASK
Definition: flash_driver.h:255
#define FTFx_FCNFG
Definition: flash_driver.h:212
#define FEATURE_FLS_DF_SIZE_1111
#define FTFx_FCCOB9
Definition: flash_driver.h:225
#define FTFx_FCCOB3
Definition: flash_driver.h:215
status_t FLASH_DRV_EnableCmdCompleteInterupt(void)
Enable the command complete interrupt.
void FLASH_DRV_DisableCmdCompleteInterupt(void)
Disable the command complete interrupt.
#define FEATURE_FLS_DF_SIZE_1100
#define FEATURE_FLS_DF_BLOCK_CMD_ADDRESS_ALIGMENT
uint16_t numOfRecordReqMaintain
Definition: flash_driver.h:606
status_t FLASH_DRV_SetPFlashProtection(uint32_t protectStatus)
P-Flash set protection.
#define ENABLE_CHECK_RAMSECTION_FUNCTION_CALL
Definition: s32_core_cm0.h:150
#define END_FUNCTION_DEFINITION_RAMSECTION
Definition: s32_core_cm0.h:143
#define FEATURE_FLS_DF_SIZE_0010
#define FEATURE_FLS_EE_SIZE_1101
#define FEATURE_FLS_DF_SIZE_1101
#define FTFx_SWAP_UPDATE_ERASED
Update-Erased swap mode.
Definition: flash_driver.h:446
#define FTFx_PROGRAM_PHRASE
Definition: flash_driver.h:406
#define FTFx_READ_RESOURCE
Definition: flash_driver.h:404
status_t FLASH_DRV_VerifySection(const flash_ssd_config_t *pSSDConfig, uint32_t dest, uint16_t number, uint8_t marginLevel)
Flash verify section.
#define FTFx_FPROT2
Definition: flash_driver.h:228
#define FTFx_FSTAT_MGSTAT0_MASK
Definition: flash_driver.h:239
status_t FLASH_DRV_ReadOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, uint8_t *pDataArray)
Flash read once.
#define FTFx_FCCOB7
Definition: flash_driver.h:219
#define FTFx_VERIFY_ALL_BLOCK
Definition: flash_driver.h:410
#define FTFx_FCCOB6
Definition: flash_driver.h:220
#define FEATURE_FLS_EE_SIZE_1010
#define FTFx_FERCNFG
Definition: flash_driver.h:236
#define FTFx_PROGRAM_SECTION
Definition: flash_driver.h:409
Flash SSD Configuration Structure.
Definition: flash_driver.h:581
#define FTFx_FCNFG_ERSSUSP_MASK
Definition: flash_driver.h:268
#define FTFx_PFLASH_SWAP
Definition: flash_driver.h:415
#define START_FUNCTION_DEFINITION_RAMSECTION
Definition: s32_core_cm0.h:142
status_t FLASH_DRV_EraseAllBlock(const flash_ssd_config_t *pSSDConfig)
Flash erase all blocks.
#define FEATURE_FLS_EE_SIZE_1110
void INT_SYS_EnableIRQ(IRQn_Type irqNumber)
Enables an interrupt for a given IRQ number.
#define FEATURE_FLS_EE_SIZE_0100
#define FTFx_ERASE_SECTOR
Definition: flash_driver.h:408
#define DISABLE_CHECK_RAMSECTION_FUNCTION_CALL
Definition: s32_core_cm0.h:149
#define SIM_FCFG1_DEPART_MASK
Definition: S32K118.h:9869
#define FEATURE_FLS_DF_SECTION_CMD_ADDRESS_ALIGMENT
#define FLASH_SECURE_BACKDOOR_ENABLED
Flash is secured and backdoor key access enabled.
Definition: flash_driver.h:500
#define FTFC_COMMAND_COMPLETE_IRQS
Definition: S32K118.h:3653
#define FEATURE_FLS_EE_SIZE_0000
#define FEATURE_FLS_PF_BLOCK_WRITE_UNIT_SIZE
#define FEATURE_FLS_EE_SIZE_1001
#define FTFx_FDPROT
Definition: flash_driver.h:232
#define FEATURE_FLS_FLEX_RAM_SIZE
#define GET_BIT_16_23(value)
Definition: flash_driver.h:464
#define RESUME_WAIT_CNT
Resume wait count used in FLASH_DRV_EraseResume function.
Definition: flash_driver.h:452
status_t FLASH_DRV_EnableDoubleBitFaultInterupt(void)
Enable the double bit fault detect interrupt.
#define FEATURE_FLS_DF_SIZE_1001
#define FTFx_FCCOB5
Definition: flash_driver.h:221
#define FTFx_FSEC
Definition: flash_driver.h:213
#define FTFx_SWAP_UNINIT
Uninitialized swap mode.
Definition: flash_driver.h:440
void FLASH_DRV_DisableReadColisionInterupt(void)
Disable the read collision error interrupt.
status_t FLASH_DRV_EraseAllBlockUnsecure(const flash_ssd_config_t *pSSDConfig)
Flash erase all blocks unsecure.
#define FTFx_FCNFG_CCIE_MASK
Definition: flash_driver.h:280
Flash User Configuration Structure.
Definition: flash_driver.h:557
#define FEATURE_FLS_DF_SIZE_0011
status_t FLASH_DRV_SecurityBypass(const flash_ssd_config_t *pSSDConfig, const uint8_t *keyBuffer)
Flash security bypass.
#define FEATURE_FLS_DF_SIZE_0000
#define FTFx_PROGRAM_PARTITION
Definition: flash_driver.h:417
status_t FLASH_DRV_ProgramOnce(const flash_ssd_config_t *pSSDConfig, uint8_t recordIndex, const uint8_t *pDataArray)
Flash program once.
#define FTFx_FERCNFG_DFDIE_MASK
Definition: flash_driver.h:366
#define FTFC_READ_COLLISION_IRQS
Definition: S32K118.h:3654
void FLASH_DRV_GetSecurityState(uint8_t *securityState)
Flash get security state.
#define FEATURE_FLS_DF_SIZE_1011
#define FTFx_FCNFG_RDCOLLIE_MASK
Definition: flash_driver.h:276