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CMSIS-Driver
Version 2.02
Peripheral Interface for Middleware and Application Code
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Driver API for NAND Flash Device Interface (Driver_NAND.h). More...
Content | |
Status Error Codes | |
Negative values indicate errors (NAND has specific codes in addition to common Status Error Codes). | |
NAND Events | |
The NAND driver generates call back events that are notified via the function ARM_NAND_SignalEvent. | |
NAND Flags | |
Specify Flag codes. | |
NAND Control Codes | |
Many parameters of the NAND driver are configured using the ARM_NAND_Control function. | |
NAND ECC Codes | |
Specify ECC codes. | |
NAND Sequence Execution Codes | |
Specify execution codes. | |
Data Structures | |
struct | ARM_NAND_STATUS |
NAND Status. More... | |
struct | ARM_DRIVER_NAND |
Access structure of the NAND Driver. More... | |
struct | ARM_NAND_CAPABILITIES |
NAND Driver Capabilities. More... | |
struct | ARM_NAND_ECC_INFO |
NAND ECC (Error Correction Code) Information. More... | |
Typedefs | |
typedef void(* | ARM_NAND_SignalEvent_t )(uint32_t dev_num, uint32_t event) |
Pointer to ARM_NAND_SignalEvent : Signal NAND Event. | |
Functions | |
ARM_DRIVER_VERSION | ARM_NAND_GetVersion (void) |
Get driver version. | |
ARM_NAND_CAPABILITIES | ARM_NAND_GetCapabilities (void) |
Get driver capabilities. | |
int32_t | ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event) |
Initialize the NAND Interface. | |
int32_t | ARM_NAND_Uninitialize (void) |
De-initialize the NAND Interface. | |
int32_t | ARM_NAND_PowerControl (ARM_POWER_STATE state) |
Control the NAND interface power. | |
int32_t | ARM_NAND_DevicePower (uint32_t voltage) |
Set device power supply voltage. | |
int32_t | ARM_NAND_WriteProtect (uint32_t dev_num, bool enable) |
Control WPn (Write Protect). | |
int32_t | ARM_NAND_ChipEnable (uint32_t dev_num, bool enable) |
Control CEn (Chip Enable). | |
int32_t | ARM_NAND_GetDeviceBusy (uint32_t dev_num) |
Get Device Busy pin state. | |
int32_t | ARM_NAND_SendCommand (uint32_t dev_num, uint8_t cmd) |
Send command to NAND device. | |
int32_t | ARM_NAND_SendAddress (uint32_t dev_num, uint8_t addr) |
Send address to NAND device. | |
int32_t | ARM_NAND_ReadData (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode) |
Read data from NAND device. | |
int32_t | ARM_NAND_WriteData (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode) |
Write data to NAND device. | |
int32_t | ARM_NAND_ExecuteSequence (uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count) |
Execute sequence of operations. | |
int32_t | ARM_NAND_AbortSequence (uint32_t dev_num) |
Abort sequence execution. | |
int32_t | ARM_NAND_Control (uint32_t dev_num, uint32_t control, uint32_t arg) |
Control NAND Interface. | |
ARM_NAND_STATUS | ARM_NAND_GetStatus (uint32_t dev_num) |
Get NAND status. | |
int32_t | ARM_NAND_InquireECC (int32_t index, ARM_NAND_ECC_INFO *info) |
Inquire about available ECC. | |
void | ARM_NAND_SignalEvent (uint32_t dev_num, uint32_t event) |
Signal NAND event. | |
Driver API for NAND Flash Device Interface (Driver_NAND.h).
NAND devices are a type of non-volatile storage and do not require power to hold data. Wikipedia offers more information about the Flash Memories, including NAND.
NAND Structure
NAND API
The following header files define the Application Programming Interface (API) for the NAND interface:
The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.
Driver Functions
The driver functions are published in the access struct as explained in Driver Functions
struct ARM_NAND_STATUS |
struct ARM_DRIVER_NAND |
Access structure of the NAND Driver.
The functions of the NAND driver are accessed by function pointers exposed by this structure. Refer to Driver Functions for overview information.
Each instance of a NAND interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:
A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_NANDn. The default is 0, which connects a middleware to the first instance of a driver.
Data Fields | |
ARM_DRIVER_VERSION(* | GetVersion )(void) |
Pointer to ARM_NAND_GetVersion : Get driver version. | |
ARM_NAND_CAPABILITIES(* | GetCapabilities )(void) |
Pointer to ARM_NAND_GetCapabilities : Get driver capabilities. | |
int32_t(* | Initialize )(ARM_NAND_SignalEvent_t cb_event) |
Pointer to ARM_NAND_Initialize : Initialize NAND Interface. | |
int32_t(* | Uninitialize )(void) |
Pointer to ARM_NAND_Uninitialize : De-initialize NAND Interface. | |
int32_t(* | PowerControl )(ARM_POWER_STATE state) |
Pointer to ARM_NAND_PowerControl : Control NAND Interface Power. | |
int32_t(* | DevicePower )(uint32_t voltage) |
Pointer to ARM_NAND_DevicePower : Set device power supply voltage. | |
int32_t(* | WriteProtect )(uint32_t dev_num, bool enable) |
Pointer to ARM_NAND_WriteProtect : Control WPn (Write Protect). | |
int32_t(* | ChipEnable )(uint32_t dev_num, bool enable) |
Pointer to ARM_NAND_ChipEnable : Control CEn (Chip Enable). | |
int32_t(* | GetDeviceBusy )(uint32_t dev_num) |
Pointer to ARM_NAND_GetDeviceBusy : Get Device Busy pin state. | |
int32_t(* | SendCommand )(uint32_t dev_num, uint8_t cmd) |
Pointer to ARM_NAND_SendCommand : Send command to NAND device. | |
int32_t(* | SendAddress )(uint32_t dev_num, uint8_t addr) |
Pointer to ARM_NAND_SendAddress : Send address to NAND device. | |
int32_t(* | ReadData )(uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode) |
Pointer to ARM_NAND_ReadData : Read data from NAND device. | |
int32_t(* | WriteData )(uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode) |
Pointer to ARM_NAND_WriteData : Write data to NAND device. | |
int32_t(* | ExecuteSequence )(uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count) |
Pointer to ARM_NAND_ExecuteSequence : Execute sequence of operations. | |
int32_t(* | AbortSequence )(uint32_t dev_num) |
Pointer to ARM_NAND_AbortSequence : Abort sequence execution. | |
int32_t(* | Control )(uint32_t dev_num, uint32_t control, uint32_t arg) |
Pointer to ARM_NAND_Control : Control NAND Interface. | |
ARM_NAND_STATUS(* | GetStatus )(uint32_t dev_num) |
Pointer to ARM_NAND_GetStatus : Get NAND status. | |
int32_t(* | InquireECC )(int32_t index, ARM_NAND_ECC_INFO *info) |
Pointer to ARM_NAND_InquireECC : Inquire about available ECC. | |
int32_t(* AbortSequence)(uint32_t dev_num) |
Pointer to ARM_NAND_AbortSequence : Abort sequence execution.
int32_t(* ChipEnable)(uint32_t dev_num, bool enable) |
Pointer to ARM_NAND_ChipEnable : Control CEn (Chip Enable).
int32_t(* Control)(uint32_t dev_num, uint32_t control, uint32_t arg) |
Pointer to ARM_NAND_Control : Control NAND Interface.
int32_t(* DevicePower)(uint32_t voltage) |
Pointer to ARM_NAND_DevicePower : Set device power supply voltage.
int32_t(* ExecuteSequence)(uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count) |
Pointer to ARM_NAND_ExecuteSequence : Execute sequence of operations.
ARM_NAND_CAPABILITIES(* GetCapabilities)(void) |
Pointer to ARM_NAND_GetCapabilities : Get driver capabilities.
int32_t(* GetDeviceBusy)(uint32_t dev_num) |
Pointer to ARM_NAND_GetDeviceBusy : Get Device Busy pin state.
ARM_NAND_STATUS(* GetStatus)(uint32_t dev_num) |
Pointer to ARM_NAND_GetStatus : Get NAND status.
ARM_DRIVER_VERSION(* GetVersion)(void) |
Pointer to ARM_NAND_GetVersion : Get driver version.
int32_t(* Initialize)(ARM_NAND_SignalEvent_t cb_event) |
Pointer to ARM_NAND_Initialize : Initialize NAND Interface.
int32_t(* InquireECC)(int32_t index, ARM_NAND_ECC_INFO *info) |
Pointer to ARM_NAND_InquireECC : Inquire about available ECC.
int32_t(* PowerControl)(ARM_POWER_STATE state) |
Pointer to ARM_NAND_PowerControl : Control NAND Interface Power.
int32_t(* ReadData)(uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode) |
Pointer to ARM_NAND_ReadData : Read data from NAND device.
int32_t(* SendAddress)(uint32_t dev_num, uint8_t addr) |
Pointer to ARM_NAND_SendAddress : Send address to NAND device.
int32_t(* SendCommand)(uint32_t dev_num, uint8_t cmd) |
Pointer to ARM_NAND_SendCommand : Send command to NAND device.
int32_t(* Uninitialize)(void) |
Pointer to ARM_NAND_Uninitialize : De-initialize NAND Interface.
int32_t(* WriteData)(uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode) |
Pointer to ARM_NAND_WriteData : Write data to NAND device.
int32_t(* WriteProtect)(uint32_t dev_num, bool enable) |
Pointer to ARM_NAND_WriteProtect : Control WPn (Write Protect).
struct ARM_NAND_CAPABILITIES |
NAND Driver Capabilities.
A NAND driver can be implemented with different capabilities. The bitfield members of this struct encode the capabilities implemented by this driver.
Returned by:
struct ARM_NAND_ECC_INFO |
NAND ECC (Error Correction Code) Information.
Structure with information about the Error Correction Code for a NAND.
Parameter for:
ARM_NAND_SignalEvent_t |
Pointer to ARM_NAND_SignalEvent : Signal NAND Event.
Provides the typedef for the callback function ARM_NAND_SignalEvent.
Parameter for:
int32_t ARM_NAND_AbortSequence | ( | uint32_t | dev_num | ) |
Abort sequence execution.
[in] | dev_num | Device number |
Aborts execution of the current sequence for a NAND device. The parameter dev_num is the device number.
int32_t ARM_NAND_ChipEnable | ( | uint32_t | dev_num, |
bool | enable | ||
) |
Control CEn (Chip Enable).
[in] | dev_num | Device number |
[in] | enable |
|
Controls the Chip Enable (CEn) pin of a NAND device in order to enable or disable the device. The parameter dev_num is the device number. The boolean parameter enable specifies to enables or disable the device.
This function is optional and supported only when reported by ce_manual flag in ARM_NAND_CAPABILITIES. Otherwise the Chip Enable (CEn) signal is controlled automatically by SendCommand/Address, Read/WriteData and ExecuteSequence (for example when the NAND device is connected to a memory bus).
int32_t ARM_NAND_Control | ( | uint32_t | dev_num, |
uint32_t | control, | ||
uint32_t | arg | ||
) |
Control NAND Interface.
[in] | dev_num | Device number |
[in] | control | Operation |
[in] | arg | Argument of operation |
Controls the NAND interface settings.
The parameter dev_num is the device number. The parameter control specifies various settings (see tables below). Depending on the control bits, the parameter arg provides additional information.
The table lists values for the parameter control.
Mode Control Bits | Description |
---|---|
ARM_NAND_BUS_MODE | Set the bus mode. Specify the value with the parameter arg as defined in the table Bus Mode. |
ARM_NAND_BUS_DATA_WIDTH | Set the data bus width. Specify the value with the parameter arg as defined in the table Data Bus Width. |
ARM_NAND_DRIVER_STRENGTH | Set the driver strength. Specify the value with the parameter arg as defined in the table Driver Strength. |
ARM_NAND_DEVICE_READY_EVENT | Generate ARM_NAND_EVENT_DEVICE_READY; arg = [0:disabled (default); 1:enabled]. |
ARM_NAND_DRIVER_READY_EVENT | Generate ARM_NAND_EVENT_DRIVER_READY; arg = [0:disabled (default); 1:enabled]. |
ARM_NAND_BUS_xxx specifies the bus mode (ONFI - Open NAND Flash Interface).
Control Bits: Bus Mode | Description |
---|---|
ARM_NAND_BUS_SDR | Set the Data Interface: SDR (Single Data Rate) - Traditional interface (default) |
ARM_NAND_BUS_DDR | Set the Data Interface: NV-DDR (Double Data Rate) |
ARM_NAND_BUS_DDR2 | Set the Data Interface: NV-DDR2 (Double Data Rate) |
ARM_NAND_BUS_TIMING_MODE_0 | Set the Timing Mode 0 (default) |
ARM_NAND_BUS_TIMING_MODE_1 | Set the Timing Mode 1 |
ARM_NAND_BUS_TIMING_MODE_2 | Set the Timing Mode 2 |
ARM_NAND_BUS_TIMING_MODE_3 | Set the Timing Mode 3 |
ARM_NAND_BUS_TIMING_MODE_4 | Set the Timing Mode 4 (SDR EDO capable) |
ARM_NAND_BUS_TIMING_MODE_5 | Set the Timing Mode 5 (SDR EDO capable) |
ARM_NAND_BUS_TIMING_MODE_6 | Set the Timing Mode 6 (NV-DDR2 only) |
ARM_NAND_BUS_TIMING_MODE_7 | Set the Timing Mode 7 (NV-DDR2 only) |
ARM_NAND_BUS_DDR2_DO_WCYC_0 | Set the DDR2 Data Output Warmup cycles: 0 (default) |
ARM_NAND_BUS_DDR2_DO_WCYC_1 | Set the DDR2 Data Output Warmup cycles: 1 |
ARM_NAND_BUS_DDR2_DO_WCYC_2 | Set the DDR2 Data Output Warmup cycles: 2 |
ARM_NAND_BUS_DDR2_DO_WCYC_4 | Set the DDR2 Data Output Warmup cycles: 4 |
ARM_NAND_BUS_DDR2_DI_WCYC_0 | Set the DDR2 Data Input Warmup cycles: 0 (default) |
ARM_NAND_BUS_DDR2_DI_WCYC_1 | Set the DDR2 Data Input Warmup cycles: 1 |
ARM_NAND_BUS_DDR2_DI_WCYC_2 | Set the DDR2 Data Input Warmup cycles: 2 |
ARM_NAND_BUS_DDR2_DI_WCYC_4 | Set the DDR2 Data Input Warmup cycles: 4 |
ARM_NAND_BUS_DDR2_VEN | Set the DDR2 Enable external VREFQ as reference |
ARM_NAND_BUS_DDR2_CMPD | Set the DDR2 Enable complementary DQS (DQS_c) signal |
ARM_NAND_BUS_DDR2_CMPR | Set the DDR2 Enable complementary RE_n (RE_c) signal |
ARM_NAND_BUS_DATA_WIDTH_xx specifies the bus data width.
Control Bits: Data Bus Width | Description |
---|---|
ARM_NAND_BUS_DATA_WIDTH_8 | Set the Bus Data Width: 8 bit (default) |
ARM_NAND_BUS_DATA_WIDTH_16 | Set the Bus Data Width: 16 bit |
ARM_NAND_DRIVER_STRENGTH_xx specifies the driver strength (ONFI - Open NAND Flash Interface).
Control Bits: Driver Strength | Description |
---|---|
ARM_NAND_DRIVER_STRENGTH_18 | Set the Driver Strength 2.0x = 18 Ohms |
ARM_NAND_DRIVER_STRENGTH_25 | Set the Driver Strength 1.4x = 25 Ohms |
ARM_NAND_DRIVER_STRENGTH_35 | Set the Driver Strength 1.0x = 35 Ohms (default) |
ARM_NAND_DRIVER_STRENGTH_50 | Set the Driver Strength 0.7x = 50 Ohms |
int32_t ARM_NAND_DevicePower | ( | uint32_t | voltage | ) |
Set device power supply voltage.
[in] | voltage | NAND Device supply voltage |
Controls power supply of the NAND device.
The parameter voltage sets the device supply voltage as defined in the table.
AMR_NAND_POWER_xxx_xxx specifies power settings.
Device Power Bits | Description |
---|---|
ARM_NAND_POWER_VCC_OFF | Set VCC Power off |
ARM_NAND_POWER_VCC_3V3 | Set VCC = 3.3V |
ARM_NAND_POWER_VCC_1V8 | Set VCC = 1.8V |
ARM_NAND_POWER_VCCQ_OFF | Set VCCQ I/O Power off |
ARM_NAND_POWER_VCCQ_3V3 | Set VCCQ = 3.3V |
ARM_NAND_POWER_VCCQ_1V8 | Set VCCQ = 1.8V |
ARM_NAND_POWER_VPP_OFF | Set VPP off |
ARM_NAND_POWER_VPP_ON | Set VPP on |
int32_t ARM_NAND_ExecuteSequence | ( | uint32_t | dev_num, |
uint32_t | code, | ||
uint32_t | cmd, | ||
uint32_t | addr_col, | ||
uint32_t | addr_row, | ||
void * | data, | ||
uint32_t | data_cnt, | ||
uint8_t * | status, | ||
uint32_t * | count | ||
) |
Execute sequence of operations.
[in] | dev_num | Device number |
[in] | code | Sequence code |
[in] | cmd | Command(s) |
[in] | addr_col | Column address |
[in] | addr_row | Row address |
[in,out] | data | Pointer to data to be written or read |
[in] | data_cnt | Number of data items in one iteration |
[out] | status | Pointer to status read |
[in,out] | count | Number of iterations |
Execute a sequence of operations for a NAND device. The parameter dev_num is the device number. The parameter code is the sequence encoding as defined in the table Sequence execution Code. The parameter cmd is the command or a series of commands The parameter addr_col is the column address. The parameter addr_row is the row address. The parameter data is a pointer to the buffer that stores the data to or loads the data from. The parameter data_cnt is the number of data items to read or write in one iteration. The parameter status is a pointer to the buffer that stores the status read. The parameter count is a pointer to the number of iterations.
ARM_NAND_CODE_xxx specifies sequence execution codes.
Sequence Execution Code | Description |
---|---|
ARM_NAND_CODE_SEND_CMD1 | Send Command 1 (cmd[7..0]) |
ARM_NAND_CODE_SEND_ADDR_COL1 | Send Column Address 1 (addr_col[7..0]) |
ARM_NAND_CODE_SEND_ADDR_COL2 | Send Column Address 2 (addr_col[15..8]) |
ARM_NAND_CODE_SEND_ADDR_ROW1 | Send Row Address 1 (addr_row[7..0]) |
ARM_NAND_CODE_SEND_ADDR_ROW2 | Send Row Address 2 (addr_row[15..8]) |
ARM_NAND_CODE_SEND_ADDR_ROW3 | Send Row Address 3 (addr_row[23..16]) |
ARM_NAND_CODE_INC_ADDR_ROW | Auto-increment Row Address |
ARM_NAND_CODE_WRITE_DATA | Write Data |
ARM_NAND_CODE_SEND_CMD2 | Send Command 2 (cmd[15..8]) |
ARM_NAND_CODE_WAIT_BUSY | Wait while R/Bn busy |
ARM_NAND_CODE_READ_DATA | Read Data |
ARM_NAND_CODE_SEND_CMD3 | Send Command 3 (cmd[23..16]) |
ARM_NAND_CODE_READ_STATUS | Read Status byte and check FAIL bit (bit 0) |
ARM_NAND_ECC(n) | Select ECC |
ARM_NAND_ECC0 | Use ECC0 of selected ECC |
ARM_NAND_ECC1 | Use ECC1 of selected ECC |
ARM_NAND_DRIVER_DONE_EVENT | Generate ARM_NAND_EVENT_DRIVER_DONE |
The data item size is defined by the data type which depends on the configured data bus width.
Data type is:
The function is non-blocking and returns as soon as the driver has started executing the specified sequence. When the operation is completed the ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT). Progress of the operation can also be monitored by calling the ARM_NAND_GetStatus function and checking the busy flag.
Driver executes the number of specified iterations where in each iteration items specified by ARM_NAND_CODE_xxx are executed in the order as listed in the table Sequence execution Code. The parameter count is holding the current number of iterations left.
Execution is automatically aborted and ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT):
ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities | ( | void | ) |
Get driver capabilities.
Retrieves information about capabilities in this driver implementation. The bitfield members of the struct ARM_NAND_CAPABILITIES encode various capabilities, for example if a hardware is able to create signal events using the ARM_NAND_SignalEvent callback function.
Example:
int32_t ARM_NAND_GetDeviceBusy | ( | uint32_t | dev_num | ) |
Get Device Busy pin state.
[in] | dev_num | Device number |
Retrieve the Device Busy pin state of a NAND device. The parameter dev_num is the device number.
The function returns the status of the Device Busy pin: [1=busy; 0=not busy or error].
ARM_NAND_STATUS ARM_NAND_GetStatus | ( | uint32_t | dev_num | ) |
Get NAND status.
[in] | dev_num | Device number |
Retrieve the current NAND interface status. The parameter dev_num is the device number.
ARM_DRIVER_VERSION ARM_NAND_GetVersion | ( | void | ) |
Get driver version.
Returns version information of the driver implementation in ARM_DRIVER_VERSION
Example:
int32_t ARM_NAND_Initialize | ( | ARM_NAND_SignalEvent_t | cb_event | ) |
Initialize the NAND Interface.
[in] | cb_event | Pointer to ARM_NAND_SignalEvent |
The function initializes the NAND interface. It is called when the middleware component starts operation.
The function performs the following operations:
The parameter cb_event is a pointer to the ARM_NAND_SignalEvent callback function; use a NULL pointer when no callback signals are required.
Example:
int32_t ARM_NAND_InquireECC | ( | int32_t | index, |
ARM_NAND_ECC_INFO * | info | ||
) |
Inquire about available ECC.
[in] | index | Device number |
[out] | info | Pointer to ECC information ARM_NAND_ECC_INFO retrieved |
Retrieve information about the ECC referenced by index.
int32_t ARM_NAND_PowerControl | ( | ARM_POWER_STATE | state | ) |
Control the NAND interface power.
[in] | state | Power state |
Allows you to control the power modes of the NAND interface.
int32_t ARM_NAND_ReadData | ( | uint32_t | dev_num, |
void * | data, | ||
uint32_t | cnt, | ||
uint32_t | mode | ||
) |
Read data from NAND device.
[in] | dev_num | Device number |
[out] | data | Pointer to buffer for data to read from NAND device |
[in] | cnt | Number of data items to read |
[in] | mode | Operation mode |
Read data from a NAND device. The parameter dev_num is the device number. The parameter data is a pointer to the buffer that stores the data read from a NAND device. The parameter cnt is the number of data items to read. The parameter mode defines the operation mode as listed in the table below.
Read Data Mode | Description |
---|---|
ARM_NAND_ECC(n) | Select ECC |
ARM_NAND_ECC0 | Use ECC0 of selected ECC |
ARM_NAND_ECC1 | Use ECC1 of selected ECC |
ARM_NAND_DRIVER_DONE_EVENT | Generate ARM_NAND_EVENT_DRIVER_DONE |
The data item size is defined by the data type which depends on the configured data bus width.
Data type is:
The function executes in the following ways:
int32_t ARM_NAND_SendAddress | ( | uint32_t | dev_num, |
uint8_t | addr | ||
) |
Send address to NAND device.
[in] | dev_num | Device number |
[in] | addr | Address |
Send an address to the NAND device. The parameter dev_num is the device number. The parameter addr is the address.
int32_t ARM_NAND_SendCommand | ( | uint32_t | dev_num, |
uint8_t | cmd | ||
) |
Send command to NAND device.
[in] | dev_num | Device number |
[in] | cmd | Command |
Send a command to the NAND device. The parameter dev_num is the device number. The parameter cmd is the command sent to the NAND device.
void ARM_NAND_SignalEvent | ( | uint32_t | dev_num, |
uint32_t | event | ||
) |
Signal NAND event.
[in] | dev_num | Device number |
[in] | event | Event notification mask |
The function ARM_NAND_SignalEvent notifies the application of the NAND Events and it is registered by the function ARM_NAND_Initialize. The function ARM_NAND_GetCapabilities returns information about the implemented optional events in a driver.
The parameter dev_num is the device number. The argument event represents the notification mask of the events. Each event is coded in a separate bit and therefore it is possible to signal multiple events in the event call back function. The following call back notifications are generated:
Bit | Event | Description |
---|---|---|
0 | ARM_NAND_EVENT_DEVICE_READY | Occurs when rising edge is detected on R/Bn (Ready/Busy) pin indicating that the device is ready. |
1 | ARM_NAND_EVENT_DRIVER_READY | Occurs when SendCommand/Address, Read/WriteData or ExecuteSequence indicate that they can be executed (after previously being busy and not able to start the requested operation). |
2 | ARM_NAND_EVENT_DRIVER_DONE | Occurs after Read/WriteData or ExecuteSequence operation has finished (after being successfully started). |
3 | ARM_NAND_EVENT_ECC_ERROR | Occurs after Read/WriteData or ExecuteSequence (together with ARM_NAND_EVENT_DRIVER_DONE) when ECC generation or correction failed. |
int32_t ARM_NAND_Uninitialize | ( | void | ) |
De-initialize the NAND Interface.
The function ARM_NAND_Uninitialize de-initializes the resources of NAND interface.
It is called when the middleware component stops operation and releases the software resources used by the interface.
int32_t ARM_NAND_WriteData | ( | uint32_t | dev_num, |
const void * | data, | ||
uint32_t | cnt, | ||
uint32_t | mode | ||
) |
Write data to NAND device.
[in] | dev_num | Device number |
[out] | data | Pointer to buffer with data to write to NAND device |
[in] | cnt | Number of data items to write |
[in] | mode | Operation mode |
Write data to a NAND device. The parameter dev_num is the device number. The parameter data is a pointer to the buffer with data to write. The parameter cnt is the number of data items to write. The parameter mode defines the operation mode as listed in the table below.
Write Data Mode | Description |
---|---|
ARM_NAND_ECC(n) | Select ECC |
ARM_NAND_ECC0 | Use ECC0 of selected ECC |
ARM_NAND_ECC1 | Use ECC1 of selected ECC |
ARM_NAND_DRIVER_DONE_EVENT | Generate ARM_NAND_EVENT_DRIVER_DONE |
The data item size is defined by the data type which depends on the configured data bus width.
Data type is:
The function executes in the following ways:
int32_t ARM_NAND_WriteProtect | ( | uint32_t | dev_num, |
bool | enable | ||
) |
Control WPn (Write Protect).
[in] | dev_num | Device number |
[in] | enable |
|
Control the Write Protect (WPn) pin of a NAND device in order to enable or disable write protection. The parameter dev_num is the device number. The boolean parameter enable specifies to enables or disables write protection.