CMSIS Driver  Version 1.10 - Preliminary
Middleware Driver API for microcontroller peripherals
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Driver_NAND.h File Reference

Data Structures

struct  ARM_NAND_PAGE_LAYOUT
 NAND Page Layout configuration. More...
 
struct  ARM_NAND_DEVICE
 NAND Flash Device information. More...
 
struct  ARM_NAND_CAPABILITIES
 NAND Driver Capabilities. More...
 
struct  ARM_DRIVER_NAND
 Access structure of the NAND Driver. More...
 
struct  ARM_NAND_PAGE_LAYOUT.spare
 

Macros

#define ARM_NAND_API_VERSION   ARM_DRV_VERSION_MAJOR_MINOR(1,10) /* API version */
 
#define ARM_NAND_STAT_FAIL   0x01
 Last command failed.
 
#define ARM_NAND_STAT_FAILC   0x02
 Command prior last failed.
 
#define ARM_NAND_STAT_CSP   0x08
 Command specific.
 
#define ARM_NAND_STAT_VSP   0x10
 Vendor specific.
 
#define ARM_NAND_STAT_ARDY   0x20
 Array operation in progress.
 
#define ARM_NAND_STAT_RDY   0x40
 LUN ready for another command.
 
#define ARM_NAND_STAT_WP   0x80
 Write protected.
 
#define ARM_NAND_ID_ADDR_ONFI   0x20
 ONFI signature address for Read ID command.
 
#define ARM_NAND_ID_ADDR_JEDEC   0x00
 JEDEC signature address for the Read ID command.
 

Typedefs

typedef void(* ARM_NAND_SignalEvent_t )(uint32_t dev_num)
 Pointer to ARM_NAND_SignalEvent : Signal NAND Event.
 

Enumerations

enum  ARM_NAND_COMMAND {
  ARM_NAND_CMD_READ_1ST = 0x00,
  ARM_NAND_CMD_CHANGE_RD_COL_1ST = 0x05,
  ARM_NAND_CMD_PROGRAM_2ND = 0x10,
  ARM_NAND_CMD_READ_2ND = 0x30,
  ARM_NAND_CMD_ERASE_1ST = 0x60,
  ARM_NAND_CMD_STATUS = 0x70,
  ARM_NAND_CMD_PROGRAM_1ST = 0x80,
  ARM_NAND_CMD_CHANGE_WR_COL = 0x85,
  ARM_NAND_CMD_READ_ID = 0x90,
  ARM_NAND_CMD_ERASE_2ND = 0xD0,
  ARM_NAND_CMD_CHANGE_RD_COL_2ND = 0xE0,
  ARM_NAND_CMD_READ_PARAM_PAGE = 0xEC,
  ARM_NAND_CMD_RESET = 0xFF
}
 Mandatory NAND Flash Commands (ONFI V1.0 or higher) More...
 
enum  ARM_NAND_COMMAND_OPTIONAL {
  ARM_NAND_CMD_COPYBACK_READ_1ST = 0x00,
  ARM_NAND_CMD_COPYBACK_READ_2ND = 0x35,
  ARM_NAND_CMD_READ_CACHE_SEQUENTIAL = 0x31,
  ARM_NAND_CMD_READ_CACHE_END = 0x3F,
  ARM_NAND_CMD_READ_STATUS_ENHANCED = 0x78,
  ARM_NAND_CMD_PAGE_CACHE_PROGRAM_1ST = 0x80,
  ARM_NAND_CMD_PAGE_CACHE_PROGRAM_2ND = 0x15,
  ARM_NAND_CMD_COPYBACK_PROGRAM_1ST = 0x85,
  ARM_NAND_CMD_COPYBACK_PROGRAM_2ND = 0x10,
  ARM_NAND_CMD_READ_UNIQUE_ID = 0xED,
  ARM_NAND_CMD_GET_FEATURES = 0xEE,
  ARM_NAND_CMD_SET_FEATURES = 0xEF
}
 Optional NAND Flash Commands (ONFI V1.0 or higher) More...
 
enum  ARM_NAND_TYPE {
  ARM_NAND_TYPE_RAW_NAND = 0,
  ARM_NAND_TYPE_EZ_NAND = 1,
  ARM_NAND_TYPE_ONENAND = 2
}
 NAND Flash Device Type. More...
 
enum  ARM_NAND_STATUS {
  ARM_NAND_OK = 0,
  ARM_NAND_ECC_CORRECTED = 1,
  ARM_NAND_ECC_FAILED = 2,
  ARM_NAND_PROGRAM_FAILED = 3,
  ARM_NAND_ERASE_FAILED = 4,
  ARM_NAND_TIMEOUT = 5,
  ARM_NAND_UNSUPPORTED = 6,
  ARM_NAND_ERROR = 7
}
 NAND Flash Driver Status. More...
 

Macro Definition Documentation

#define ARM_NAND_API_VERSION   ARM_DRV_VERSION_MAJOR_MINOR(1,10) /* API version */
#define ARM_NAND_ID_ADDR_JEDEC   0x00

JEDEC signature address for the Read ID command.

#define ARM_NAND_ID_ADDR_ONFI   0x20

ONFI signature address for Read ID command.

#define ARM_NAND_STAT_ARDY   0x20

Array operation in progress.

#define ARM_NAND_STAT_CSP   0x08

Command specific.

#define ARM_NAND_STAT_FAIL   0x01

Last command failed.

#define ARM_NAND_STAT_FAILC   0x02

Command prior last failed.

#define ARM_NAND_STAT_RDY   0x40

LUN ready for another command.

#define ARM_NAND_STAT_VSP   0x10

Vendor specific.

#define ARM_NAND_STAT_WP   0x80

Write protected.