Private

Content
	Structure Types
	Data structure types used by private functions.
	Convolution
	LSTM
	Fully Connected
	Softmax
	BasicMath
	Data Conversion

Functions
void	arm_nn_depthwise_conv1d_k3_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float32_t *__RESTRICT kernel, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC depthwise 1D kernel for k=3, ch_mult=1 (float32).
void	arm_nn_depthwise_conv3x3_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t batches, int32_t in_c, int32_t in_h, int32_t in_w, const float32_t *__RESTRICT kernel, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t stride_x, int32_t stride_y, int32_t pad_x, int32_t pad_y, int32_t out_h, int32_t out_w, float32_t act_min, float32_t act_max)
	Specialized NHWC depthwise 3x3 kernel (float32, ch_mult=1).
arm_cmsis_nn_status	arm_nn_depthwise_conv_nt_t_f32 (const float32_t *__RESTRICT lhs, const float32_t *__RESTRICT rhs, const float32_t *__RESTRICT bias, float32_t *__RESTRICT out, int32_t lhs_rows, int32_t total_ch, int32_t row_x_col, int32_t out_row_stride, float32_t activation_min, float32_t activation_max)
	Generic depthwise helper with packed lhs tiles and transposed rhs layout (float32).
void	arm_nn_conv1d_k5_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float32_t *__RESTRICT kernel, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=5 (float32).
void	arm_nn_conv1d_k5_packed_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float32_t *__RESTRICT kernel_packed, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=5 (float32, packed weights).
void	arm_nn_conv1d_k3_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float32_t *__RESTRICT kernel, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=3 (float32).
void	arm_nn_conv1d_k3_packed_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float32_t *__RESTRICT kernel_packed, const float32_t *__RESTRICT b, float32_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=3 (float32, packed weights).
void	arm_nn_maxpool1d_k3s3_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float32_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC max-pool 1D kernel for k=3, s=3 (float32).
void	arm_nn_maxpool1d_k2s2_nhwc_noclip_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float32_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC max-pool 1D kernel for k=2, s=2 without output clamp (float32).
void	arm_nn_maxpool1d_k2s2_nhwc_f32 (const float32_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float32_t *__RESTRICT out, int32_t out_w, float32_t act_min, float32_t act_max)
	Specialized NHWC max-pool 1D kernel for k=2, s=2 with clamp (float32).
arm_cmsis_nn_status	arm_nn_mat_mult_nt_t_f32 (const float32_t *__RESTRICT lhs, const float32_t *__RESTRICT rhs, const float32_t *__RESTRICT bias, float32_t *__RESTRICT dst, int32_t lhs_rows, int32_t rhs_rows, int32_t rhs_cols, int32_t row_address_offset, float32_t activation_min, float32_t activation_max)
	Matrix multiply with non-transposed lhs and transposed rhs rows (float32).
arm_cmsis_nn_status	arm_nn_mat_mult_nt_n_packed_f32 (const float32_t *__RESTRICT lhs, const float32_t *__RESTRICT rhs_packed, const float32_t *__RESTRICT bias, float32_t *__RESTRICT dst, int32_t lhs_rows, int32_t rhs_rows, int32_t rhs_cols, int32_t row_address_offset, float32_t activation_min, float32_t activation_max)
	Matrix multiply with non-transposed lhs and packed non-transposed rhs (float32).
void	arm_nn_pack_conv_patch_f32 (const float32_t *__RESTRICT input, int32_t in_h, int32_t in_w, int32_t in_c, int32_t kernel_h, int32_t kernel_w, int32_t stride_h, int32_t stride_w, int32_t pad_h, int32_t pad_w, int32_t dilation_h, int32_t dilation_w, int32_t out_y, int32_t out_x, float32_t pad_value, float32_t *__RESTRICT patch_row)
	Pack a single convolution patch into one row of a contiguous float32 patch matrix.
void	arm_nn_softmax_1x2_f32 (const float32_t in[2], float32_t out[2])
	Specialized softmax helper for a single float32 row of length 2.
void	arm_nn_depthwise_conv2x5_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t batches, int32_t in_c, int32_t in_w, int32_t ch_mult, const float16_t *__RESTRICT kernel, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_w, float16_t act_min, float16_t act_max)
	Specialized NHWC depthwise 2x5 kernel (float16).
void	arm_nn_depthwise_conv1d_k3_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float16_t *__RESTRICT kernel, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC depthwise 1D kernel for k=3, ch_mult=1 (float32).
void	arm_nn_depthwise_conv3x3_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t batches, int32_t in_c, int32_t in_h, int32_t in_w, const float16_t *__RESTRICT kernel, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t stride_x, int32_t stride_y, int32_t pad_x, int32_t pad_y, int32_t out_h, int32_t out_w, float16_t act_min, float16_t act_max)
	Specialized NHWC depthwise 3x3 kernel (float32, ch_mult=1).
arm_cmsis_nn_status	arm_nn_depthwise_conv_nt_t_f16 (const float16_t *__RESTRICT lhs, const float16_t *__RESTRICT rhs, const float16_t *__RESTRICT bias, float16_t *__RESTRICT out, int32_t lhs_rows, int32_t total_ch, int32_t row_x_col, int32_t out_row_stride, float16_t activation_min, float16_t activation_max)
	Generic depthwise helper with packed lhs tiles and transposed rhs layout (float32).
void	arm_nn_conv1d_k5_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float16_t *__RESTRICT kernel, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=5 (float32).
void	arm_nn_conv1d_k5_packed_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float16_t *__RESTRICT kernel_packed, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=5 (float16, packed weights).
void	arm_nn_conv1d_k3_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float16_t *__RESTRICT kernel, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=3 (float32).
void	arm_nn_conv1d_k3_packed_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, const float16_t *__RESTRICT kernel_packed, const float16_t *__RESTRICT b, float16_t *__RESTRICT out, int32_t out_c, int32_t out_w)
	Specialized NHWC 1D convolution kernel for k=3 (float16, packed weights).
void	arm_nn_maxpool1d_k3s3_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float16_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC max-pool 1D kernel for k=3, s=3 (float16).
void	arm_nn_maxpool1d_k2s2_nhwc_noclip_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float16_t *__RESTRICT out, int32_t out_w)
	Specialized NHWC max-pool 1D kernel for k=2, s=2 without output clamp (float16).
void	arm_nn_maxpool1d_k2s2_nhwc_f16 (const float16_t *__RESTRICT x_nhwc, int32_t in_c, int32_t in_w, float16_t *__RESTRICT out, int32_t out_w, float16_t act_min, float16_t act_max)
	Specialized NHWC max-pool 1D kernel for k=2, s=2 with clamp (float16).
arm_cmsis_nn_status	arm_nn_mat_mult_nt_t_f16 (const float16_t *__RESTRICT lhs, const float16_t *__RESTRICT rhs, const float16_t *__RESTRICT bias, float16_t *__RESTRICT dst, int32_t lhs_rows, int32_t rhs_rows, int32_t rhs_cols, int32_t row_address_offset, float16_t activation_min, float16_t activation_max)
	Matrix multiply with non-transposed lhs and transposed rhs rows (float32).
arm_cmsis_nn_status	arm_nn_mat_mult_nt_n_packed_f16 (const float16_t *__RESTRICT lhs, const float16_t *__RESTRICT rhs_packed, const float16_t *__RESTRICT bias, float16_t *__RESTRICT dst, int32_t lhs_rows, int32_t rhs_rows, int32_t rhs_cols, int32_t row_address_offset, float16_t activation_min, float16_t activation_max)
	Matrix multiply with non-transposed lhs and packed non-transposed rhs (float16).
arm_cmsis_nn_status	arm_nn_lstm_step_f16 (const float16_t *data_in, const float16_t *hidden_in, float16_t *hidden_out, const cmsis_nn_lstm_params_f16 *params, cmsis_nn_lstm_context_f16 *buffers, const int32_t batch_offset)
	Update LSTM function for an iteration step using float16 input, output and state.
void	arm_nn_pack_conv_patch_f16 (const float16_t *__RESTRICT input, int32_t in_h, int32_t in_w, int32_t in_c, int32_t kernel_h, int32_t kernel_w, int32_t stride_h, int32_t stride_w, int32_t pad_h, int32_t pad_w, int32_t dilation_h, int32_t dilation_w, int32_t out_y, int32_t out_x, float16_t pad_value, float16_t *__RESTRICT patch_row)
	Pack a single convolution patch into one row of a contiguous float32 patch matrix.
void	arm_nn_softmax_1x2_f16 (const float16_t in[2], float16_t out[2])
	Specialized softmax helper for a single float32 row of length 2.
arm_cmsis_nn_status	arm_nn_lstm_step_f32 (const float32_t *data_in, const float32_t *hidden_in, float32_t *hidden_out, const cmsis_nn_lstm_params_f32 *params, cmsis_nn_lstm_context_f32 *buffers, const int32_t batch_offset)
	Update LSTM function for an iteration step using float32 input, output and state.

Variables
const float32_t	arm_nn_exp_poly_coeffs_f32 [8]
	Polynomial coefficients used by the float32 MVE exp approximation.
const float32_t	arm_nn_exp2_lut256_f32 [257]
	LUT for 2^(i/256) used by the float32 LUT softmax approximation.
const float32_t	arm_nn_tanh_lut256_f32 [257]
	LUT for tanh(x) sampled over x in [0, 4] for float32 helpers.
const float32_t	arm_nn_exp_poly_coeffs_f16 [8]
	Polynomial coefficients used by the float16 MVE exp approximation.
const float32_t	arm_nn_tanh_approx_coeffs_f16 [3]
	Coefficients used by the float16 tanh rational approximation.
const uint16_t	arm_nn_exp2_lut256_f16 [257]
	Quantized binary16 LUT for 2^(i/256) used by float16 helpers.
const uint16_t	arm_nn_tanh_lut256_f16 [257]
	Quantized binary16 LUT for tanh(x) with x in [0, 4].
const float32_t	arm_nn_exp_poly_coeffs_f32 [8]
	Polynomial coefficients used by the float32 MVE exp approximation.
const float32_t	arm_nn_exp2_lut256_f32 [257]
	LUT for 2^(i/256) used by the float32 LUT softmax approximation.
const float32_t	arm_nn_tanh_lut256_f32 [257]
	LUT for tanh(x) sampled over x in [0, 4] for float32 helpers.
const float32_t	arm_nn_exp_poly_coeffs_f16 [8]
	Polynomial coefficients used by the float16 MVE exp approximation.
const float32_t	arm_nn_tanh_approx_coeffs_f16 [3]
	Coefficients used by the float16 tanh rational approximation.
const uint16_t	arm_nn_exp2_lut256_f16 [257]
	Quantized binary16 LUT for 2^(i/256) used by float16 helpers.
const uint16_t	arm_nn_tanh_lut256_f16 [257]
	Quantized binary16 LUT for tanh(x) with x in [0, 4].

Description

Internal Support functions. Not intended to be called direclty by a CMSIS-NN user.

Function Documentation

arm_nn_conv1d_k3_nhwc_f16()

void arm_nn_conv1d_k3_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=3 (float32).

arm_nn_conv1d_k3_nhwc_f32()

void arm_nn_conv1d_k3_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=3 (float32).

arm_nn_conv1d_k3_packed_f16()

void arm_nn_conv1d_k3_packed_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel_packed,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=3 (float16, packed weights).

The packed kernel uses the same NTxN RHS layout as arm_nn_mat_mult_nt_n_packed_f16, i.e. [(3 * in_c)][out_c_block_of_8].

arm_nn_conv1d_k3_packed_f32()

void arm_nn_conv1d_k3_packed_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel_packed,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=3 (float32, packed weights).

The packed kernel uses the same NTxN RHS layout as arm_nn_mat_mult_nt_n_packed_f32, i.e. [(3 * in_c)][out_c_block_of_4].

arm_nn_conv1d_k5_nhwc_f16()

void arm_nn_conv1d_k5_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=5 (float32).

arm_nn_conv1d_k5_nhwc_f32()

void arm_nn_conv1d_k5_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=5 (float32).

arm_nn_conv1d_k5_packed_f16()

void arm_nn_conv1d_k5_packed_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel_packed,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=5 (float16, packed weights).

The packed kernel uses the same NTxN RHS layout as arm_nn_mat_mult_nt_n_packed_f16, i.e. [(5 * in_c)][out_c_block_of_8].

arm_nn_conv1d_k5_packed_f32()

void arm_nn_conv1d_k5_packed_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel_packed,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	out_c,
		int32_t	out_w
	)

Specialized NHWC 1D convolution kernel for k=5 (float32, packed weights).

The packed kernel uses the same NTxN RHS layout as arm_nn_mat_mult_nt_n_packed_f32, i.e. [(5 * in_c)][out_c_block_of_4].

arm_nn_depthwise_conv1d_k3_nhwc_f16()

void arm_nn_depthwise_conv1d_k3_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC depthwise 1D kernel for k=3, ch_mult=1 (float32).

arm_nn_depthwise_conv1d_k3_nhwc_f32()

void arm_nn_depthwise_conv1d_k3_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC depthwise 1D kernel for k=3, ch_mult=1 (float32).

arm_nn_depthwise_conv2x5_nhwc_f16()

void arm_nn_depthwise_conv2x5_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	batches,
		int32_t	in_c,
		int32_t	in_w,
		int32_t	ch_mult,
		const float16_t *__RESTRICT	kernel,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	out_w,
		float16_t	act_min,
		float16_t	act_max
	)

Specialized NHWC depthwise 2x5 kernel (float16).

arm_nn_depthwise_conv3x3_nhwc_f16()

void arm_nn_depthwise_conv3x3_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	batches,
		int32_t	in_c,
		int32_t	in_h,
		int32_t	in_w,
		const float16_t *__RESTRICT	kernel,
		const float16_t *__RESTRICT	b,
		float16_t *__RESTRICT	out,
		int32_t	stride_x,
		int32_t	stride_y,
		int32_t	pad_x,
		int32_t	pad_y,
		int32_t	out_h,
		int32_t	out_w,
		float16_t	act_min,
		float16_t	act_max
	)

Specialized NHWC depthwise 3x3 kernel (float32, ch_mult=1).

arm_nn_depthwise_conv3x3_nhwc_f32()

void arm_nn_depthwise_conv3x3_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	batches,
		int32_t	in_c,
		int32_t	in_h,
		int32_t	in_w,
		const float32_t *__RESTRICT	kernel,
		const float32_t *__RESTRICT	b,
		float32_t *__RESTRICT	out,
		int32_t	stride_x,
		int32_t	stride_y,
		int32_t	pad_x,
		int32_t	pad_y,
		int32_t	out_h,
		int32_t	out_w,
		float32_t	act_min,
		float32_t	act_max
	)

Specialized NHWC depthwise 3x3 kernel (float32, ch_mult=1).

arm_nn_depthwise_conv_nt_t_f16()

arm_cmsis_nn_status arm_nn_depthwise_conv_nt_t_f16	(	const float16_t *__RESTRICT	lhs,
		const float16_t *__RESTRICT	rhs,
		const float16_t *__RESTRICT	bias,
		float16_t *__RESTRICT	out,
		int32_t	lhs_rows,
		int32_t	total_ch,
		int32_t	row_x_col,
		int32_t	out_row_stride,
		float16_t	activation_min,
		float16_t	activation_max
	)

Generic depthwise helper with packed lhs tiles and transposed rhs layout (float32).

arm_nn_depthwise_conv_nt_t_f32()

arm_cmsis_nn_status arm_nn_depthwise_conv_nt_t_f32	(	const float32_t *__RESTRICT	lhs,
		const float32_t *__RESTRICT	rhs,
		const float32_t *__RESTRICT	bias,
		float32_t *__RESTRICT	out,
		int32_t	lhs_rows,
		int32_t	total_ch,
		int32_t	row_x_col,
		int32_t	out_row_stride,
		float32_t	activation_min,
		float32_t	activation_max
	)

Generic depthwise helper with packed lhs tiles and transposed rhs layout (float32).

arm_nn_lstm_step_f16()

arm_cmsis_nn_status arm_nn_lstm_step_f16	(	const float16_t *	data_in,
		const float16_t *	hidden_in,
		float16_t *	hidden_out,
		const cmsis_nn_lstm_params_f16 *	params,
		cmsis_nn_lstm_context_f16 *	buffers,
		const int32_t	batch_offset
	)

Update LSTM function for an iteration step using float16 input, output and state.

Parameters

[in]	data_in	Data input pointer.
[in]	hidden_in	Hidden state / recurrent input pointer. May be NULL for the first step.
[out]	hidden_out	Hidden state / recurrent output pointer.
[in]	params	Struct containing all information about the LSTM operator.
[in]	buffers	Struct containing pointers to mutable cell-state storage.
[in]	batch_offset	Number of timesteps between consecutive batches.

Returns

The function returns ARM_CMSIS_NN_SUCCESS.

arm_nn_lstm_step_f32()

arm_cmsis_nn_status arm_nn_lstm_step_f32	(	const float32_t *	data_in,
		const float32_t *	hidden_in,
		float32_t *	hidden_out,
		const cmsis_nn_lstm_params_f32 *	params,
		cmsis_nn_lstm_context_f32 *	buffers,
		const int32_t	batch_offset
	)

Update LSTM function for an iteration step using float32 input, output and state.

Parameters

[in]	data_in	Data input pointer.
[in]	hidden_in	Hidden state / recurrent input pointer. May be NULL for the first step.
[out]	hidden_out	Hidden state / recurrent output pointer.
[in]	params	Struct containing all information about the LSTM operator.
[in]	buffers	Struct containing pointers to mutable cell-state storage.
[in]	batch_offset	Number of timesteps between consecutive batches.

Returns

The function returns ARM_CMSIS_NN_SUCCESS.

arm_nn_mat_mult_nt_n_packed_f16()

arm_cmsis_nn_status arm_nn_mat_mult_nt_n_packed_f16	(	const float16_t *__RESTRICT	lhs,
		const float16_t *__RESTRICT	rhs_packed,
		const float16_t *__RESTRICT	bias,
		float16_t *__RESTRICT	dst,
		int32_t	lhs_rows,
		int32_t	rhs_rows,
		int32_t	rhs_cols,
		int32_t	row_address_offset,
		float16_t	activation_min,
		float16_t	activation_max
	)

Matrix multiply with non-transposed lhs and packed non-transposed rhs (float16).

Parameters

[in]	lhs	Left-hand matrix stored row-major with logical shape [lhs_rows, rhs_cols].
[in]	rhs_packed	Right-hand matrix with logical shape [rhs_cols, rhs_rows], packed in column blocks of 8. The final block uses the same packed stride and inactive tail lanes are ignored.
[in]	bias	Optional bias vector.
[out]	dst	Output matrix.
[in]	lhs_rows	Number of rows in lhs.
[in]	rhs_rows	Number of logical output columns in the unpacked rhs matrix.
[in]	rhs_cols	Shared reduction dimension K.
[in]	row_address_offset	Output row stride, expressed in elements.
[in]	activation_min	Lower clamp bound.
[in]	activation_max	Upper clamp bound.

Returns

ARM_CMSIS_NN_SUCCESS on success or ARM_CMSIS_NN_ARG_ERROR on invalid arguments.

arm_nn_mat_mult_nt_n_packed_f32()

arm_cmsis_nn_status arm_nn_mat_mult_nt_n_packed_f32	(	const float32_t *__RESTRICT	lhs,
		const float32_t *__RESTRICT	rhs_packed,
		const float32_t *__RESTRICT	bias,
		float32_t *__RESTRICT	dst,
		int32_t	lhs_rows,
		int32_t	rhs_rows,
		int32_t	rhs_cols,
		int32_t	row_address_offset,
		float32_t	activation_min,
		float32_t	activation_max
	)

Matrix multiply with non-transposed lhs and packed non-transposed rhs (float32).

Parameters

[in]	lhs	Left-hand matrix stored row-major with logical shape [lhs_rows, rhs_cols].
[in]	rhs_packed	Right-hand matrix with logical shape [rhs_cols, rhs_rows], packed in column blocks of 4. The final block uses the same packed stride and inactive tail lanes are ignored.
[in]	bias	Optional bias vector.
[out]	dst	Output matrix.
[in]	lhs_rows	Number of rows in lhs.
[in]	rhs_rows	Number of logical output columns in the unpacked rhs matrix.
[in]	rhs_cols	Shared reduction dimension K.
[in]	row_address_offset	Output row stride, expressed in elements.
[in]	activation_min	Lower clamp bound.
[in]	activation_max	Upper clamp bound.

Returns

ARM_CMSIS_NN_SUCCESS on success or ARM_CMSIS_NN_ARG_ERROR on invalid arguments.

arm_nn_mat_mult_nt_t_f16()

arm_cmsis_nn_status arm_nn_mat_mult_nt_t_f16	(	const float16_t *__RESTRICT	lhs,
		const float16_t *__RESTRICT	rhs,
		const float16_t *__RESTRICT	bias,
		float16_t *__RESTRICT	dst,
		int32_t	lhs_rows,
		int32_t	rhs_rows,
		int32_t	rhs_cols,
		int32_t	row_address_offset,
		float16_t	activation_min,
		float16_t	activation_max
	)

Matrix multiply with non-transposed lhs and transposed rhs rows (float32).

Parameters

[in]	lhs	Left-hand matrix stored row-major.
[in]	rhs	Right-hand matrix stored row-major, one row per output channel.
[in]	bias	Optional bias vector.
[out]	dst	Output matrix.
[in]	lhs_rows	Number of rows in lhs.
[in]	rhs_rows	Number of rows in rhs.
[in]	rhs_cols	Number of columns in rhs.
[in]	row_address_offset	Output row stride, expressed in elements.
[in]	activation_min	Lower clamp bound.
[in]	activation_max	Upper clamp bound.

Returns

ARM_CMSIS_NN_SUCCESS on success or ARM_CMSIS_NN_ARG_ERROR on invalid arguments.

arm_nn_mat_mult_nt_t_f32()

arm_cmsis_nn_status arm_nn_mat_mult_nt_t_f32	(	const float32_t *__RESTRICT	lhs,
		const float32_t *__RESTRICT	rhs,
		const float32_t *__RESTRICT	bias,
		float32_t *__RESTRICT	dst,
		int32_t	lhs_rows,
		int32_t	rhs_rows,
		int32_t	rhs_cols,
		int32_t	row_address_offset,
		float32_t	activation_min,
		float32_t	activation_max
	)

Matrix multiply with non-transposed lhs and transposed rhs rows (float32).

Parameters

[in]	lhs	Left-hand matrix stored row-major.
[in]	rhs	Right-hand matrix stored row-major, one row per output channel.
[in]	bias	Optional bias vector.
[out]	dst	Output matrix.
[in]	lhs_rows	Number of rows in lhs.
[in]	rhs_rows	Number of rows in rhs.
[in]	rhs_cols	Number of columns in rhs.
[in]	row_address_offset	Output row stride, expressed in elements.
[in]	activation_min	Lower clamp bound.
[in]	activation_max	Upper clamp bound.

Returns

ARM_CMSIS_NN_SUCCESS on success or ARM_CMSIS_NN_ARG_ERROR on invalid arguments.

arm_nn_maxpool1d_k2s2_nhwc_f16()

void arm_nn_maxpool1d_k2s2_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float16_t *__RESTRICT	out,
		int32_t	out_w,
		float16_t	act_min,
		float16_t	act_max
	)

Specialized NHWC max-pool 1D kernel for k=2, s=2 with clamp (float16).

arm_nn_maxpool1d_k2s2_nhwc_f32()

void arm_nn_maxpool1d_k2s2_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float32_t *__RESTRICT	out,
		int32_t	out_w,
		float32_t	act_min,
		float32_t	act_max
	)

Specialized NHWC max-pool 1D kernel for k=2, s=2 with clamp (float32).

arm_nn_maxpool1d_k2s2_nhwc_noclip_f16()

void arm_nn_maxpool1d_k2s2_nhwc_noclip_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float16_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC max-pool 1D kernel for k=2, s=2 without output clamp (float16).

arm_nn_maxpool1d_k2s2_nhwc_noclip_f32()

void arm_nn_maxpool1d_k2s2_nhwc_noclip_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float32_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC max-pool 1D kernel for k=2, s=2 without output clamp (float32).

arm_nn_maxpool1d_k3s3_nhwc_f16()

void arm_nn_maxpool1d_k3s3_nhwc_f16	(	const float16_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float16_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC max-pool 1D kernel for k=3, s=3 (float16).

arm_nn_maxpool1d_k3s3_nhwc_f32()

void arm_nn_maxpool1d_k3s3_nhwc_f32	(	const float32_t *__RESTRICT	x_nhwc,
		int32_t	in_c,
		int32_t	in_w,
		float32_t *__RESTRICT	out,
		int32_t	out_w
	)

Specialized NHWC max-pool 1D kernel for k=3, s=3 (float32).

arm_nn_pack_conv_patch_f16()

void arm_nn_pack_conv_patch_f16	(	const float16_t *__RESTRICT	input,
		int32_t	in_h,
		int32_t	in_w,
		int32_t	in_c,
		int32_t	kernel_h,
		int32_t	kernel_w,
		int32_t	stride_h,
		int32_t	stride_w,
		int32_t	pad_h,
		int32_t	pad_w,
		int32_t	dilation_h,
		int32_t	dilation_w,
		int32_t	out_y,
		int32_t	out_x,
		float16_t	pad_value,
		float16_t *__RESTRICT	patch_row
	)

Pack a single convolution patch into one row of a contiguous float32 patch matrix.

Developers familiar with im2row/im2col terminology can think of this as packing one output patch into one row.

arm_nn_pack_conv_patch_f32()

void arm_nn_pack_conv_patch_f32	(	const float32_t *__RESTRICT	input,
		int32_t	in_h,
		int32_t	in_w,
		int32_t	in_c,
		int32_t	kernel_h,
		int32_t	kernel_w,
		int32_t	stride_h,
		int32_t	stride_w,
		int32_t	pad_h,
		int32_t	pad_w,
		int32_t	dilation_h,
		int32_t	dilation_w,
		int32_t	out_y,
		int32_t	out_x,
		float32_t	pad_value,
		float32_t *__RESTRICT	patch_row
	)

Pack a single convolution patch into one row of a contiguous float32 patch matrix.

Developers familiar with im2row/im2col terminology can think of this as packing one output patch into one row.

arm_nn_softmax_1x2_f16()

void arm_nn_softmax_1x2_f16	(	const float16_t	in[2],
		float16_t	out[2]
	)

Specialized softmax helper for a single float32 row of length 2.

arm_nn_softmax_1x2_f32()

void arm_nn_softmax_1x2_f32	(	const float32_t	in[2],
		float32_t	out[2]
	)

Specialized softmax helper for a single float32 row of length 2.

Variable Documentation

arm_nn_exp2_lut256_f16 [1/2]

const uint16_t arm_nn_exp2_lut256_f16[257]

extern

Quantized binary16 LUT for 2^(i/256) used by float16 helpers.

Stores 257 samples for i = 0..256 so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments.

arm_nn_exp2_lut256_f16 [2/2]

const uint16_t arm_nn_exp2_lut256_f16[257]

Initial value:

= {
    0x3C00u, 0x3C03u, 0x3C06u, 0x3C08u, 0x3C0Bu, 0x3C0Eu, 0x3C11u, 0x3C14u, 0x3C16u, 0x3C19u, 0x3C1Cu, 0x3C1Fu, 0x3C22u,
    0x3C25u, 0x3C28u, 0x3C2Au, 0x3C2Du, 0x3C30u, 0x3C33u, 0x3C36u, 0x3C39u, 0x3C3Cu, 0x3C3Fu, 0x3C42u, 0x3C45u, 0x3C48u,
    0x3C4Bu, 0x3C4Eu, 0x3C51u, 0x3C54u, 0x3C57u, 0x3C5Au, 0x3C5Du, 0x3C60u, 0x3C63u, 0x3C66u, 0x3C69u, 0x3C6Cu, 0x3C6Fu,
    0x3C72u, 0x3C75u, 0x3C78u, 0x3C7Bu, 0x3C7Eu, 0x3C82u, 0x3C85u, 0x3C88u, 0x3C8Bu, 0x3C8Eu, 0x3C91u, 0x3C94u, 0x3C98u,
    0x3C9Bu, 0x3C9Eu, 0x3CA1u, 0x3CA4u, 0x3CA8u, 0x3CABu, 0x3CAEu, 0x3CB1u, 0x3CB5u, 0x3CB8u, 0x3CBBu, 0x3CBEu, 0x3CC2u,
    0x3CC5u, 0x3CC8u, 0x3CCCu, 0x3CCFu, 0x3CD2u, 0x3CD6u, 0x3CD9u, 0x3CDCu, 0x3CE0u, 0x3CE3u, 0x3CE7u, 0x3CEAu, 0x3CEDu,
    0x3CF1u, 0x3CF4u, 0x3CF8u, 0x3CFBu, 0x3CFFu, 0x3D02u, 0x3D06u, 0x3D09u, 0x3D0Cu, 0x3D10u, 0x3D14u, 0x3D17u, 0x3D1Bu,
    0x3D1Eu, 0x3D22u, 0x3D25u, 0x3D29u, 0x3D2Cu, 0x3D30u, 0x3D34u, 0x3D37u, 0x3D3Bu, 0x3D3Eu, 0x3D42u, 0x3D46u, 0x3D49u,
    0x3D4Du, 0x3D51u, 0x3D54u, 0x3D58u, 0x3D5Cu, 0x3D60u, 0x3D63u, 0x3D67u, 0x3D6Bu, 0x3D6Fu, 0x3D72u, 0x3D76u, 0x3D7Au,
    0x3D7Eu, 0x3D81u, 0x3D85u, 0x3D89u, 0x3D8Du, 0x3D91u, 0x3D95u, 0x3D99u, 0x3D9Cu, 0x3DA0u, 0x3DA4u, 0x3DA8u, 0x3DACu,
    0x3DB0u, 0x3DB4u, 0x3DB8u, 0x3DBCu, 0x3DC0u, 0x3DC4u, 0x3DC8u, 0x3DCCu, 0x3DD0u, 0x3DD4u, 0x3DD8u, 0x3DDCu, 0x3DE0u,
    0x3DE4u, 0x3DE8u, 0x3DECu, 0x3DF0u, 0x3DF5u, 0x3DF9u, 0x3DFDu, 0x3E01u, 0x3E05u, 0x3E09u, 0x3E0Eu, 0x3E12u, 0x3E16u,
    0x3E1Au, 0x3E1Eu, 0x3E23u, 0x3E27u, 0x3E2Bu, 0x3E30u, 0x3E34u, 0x3E38u, 0x3E3Cu, 0x3E41u, 0x3E45u, 0x3E49u, 0x3E4Eu,
    0x3E52u, 0x3E57u, 0x3E5Bu, 0x3E5Fu, 0x3E64u, 0x3E68u, 0x3E6Du, 0x3E71u, 0x3E76u, 0x3E7Au, 0x3E7Fu, 0x3E83u, 0x3E88u,
    0x3E8Cu, 0x3E91u, 0x3E95u, 0x3E9Au, 0x3E9Eu, 0x3EA3u, 0x3EA8u, 0x3EACu, 0x3EB1u, 0x3EB5u, 0x3EBAu, 0x3EBFu, 0x3EC4u,
    0x3EC8u, 0x3ECDu, 0x3ED2u, 0x3ED6u, 0x3EDBu, 0x3EE0u, 0x3EE5u, 0x3EE9u, 0x3EEEu, 0x3EF3u, 0x3EF8u, 0x3EFDu, 0x3F02u,
    0x3F06u, 0x3F0Bu, 0x3F10u, 0x3F15u, 0x3F1Au, 0x3F1Fu, 0x3F24u, 0x3F29u, 0x3F2Eu, 0x3F33u, 0x3F38u, 0x3F3Du, 0x3F42u,
    0x3F47u, 0x3F4Cu, 0x3F51u, 0x3F56u, 0x3F5Bu, 0x3F60u, 0x3F65u, 0x3F6Au, 0x3F70u, 0x3F75u, 0x3F7Au, 0x3F7Fu, 0x3F84u,
    0x3F8Au, 0x3F8Fu, 0x3F94u, 0x3F99u, 0x3F9Fu, 0x3FA4u, 0x3FA9u, 0x3FAEu, 0x3FB4u, 0x3FB9u, 0x3FBFu, 0x3FC4u, 0x3FC9u,
    0x3FCFu, 0x3FD4u, 0x3FDAu, 0x3FDFu, 0x3FE4u, 0x3FEAu, 0x3FEFu, 0x3FF5u, 0x3FFAu, 0x4000u,
}

Quantized binary16 LUT for 2^(i/256) used by float16 helpers.

Stores 257 samples for i = 0..256 so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments.

arm_nn_exp2_lut256_f32 [1/2]

const float32_t arm_nn_exp2_lut256_f32[257]

extern

LUT for 2^(i/256) used by the float32 LUT softmax approximation.

Stores 257 samples for i = 0..256 so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments.

arm_nn_exp2_lut256_f32 [2/2]

const float32_t arm_nn_exp2_lut256_f32[257]

LUT for 2^(i/256) used by the float32 LUT softmax approximation.

Stores 257 samples for i = 0..256 so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments.

arm_nn_exp_poly_coeffs_f16 [1/2]

const float32_t arm_nn_exp_poly_coeffs_f16[8]

extern

Polynomial coefficients used by the float16 MVE exp approximation.

The float16 MVE helper evaluates the polynomial in widened float32 lanes, but it uses a dedicated coefficient table to keep the float16 path isolated from the float32 feature gate and softmax support stack.

arm_nn_exp_poly_coeffs_f16 [2/2]

const float32_t arm_nn_exp_poly_coeffs_f16[8]

Initial value:

= {
    1.0f,
    0.0416598916054f,
    0.500000596046f,
    0.0014122662833f,
    1.00000011921f,
    0.00833693705499f,
    0.166665703058f,
    0.000195780929062f,
}

Polynomial coefficients used by the float16 MVE exp approximation.

The float16 MVE helper evaluates the polynomial in widened float32 lanes, but it uses a dedicated coefficient table to keep the float16 path isolated from the float32 feature gate and softmax support stack.

arm_nn_exp_poly_coeffs_f32 [1/2]

const float32_t arm_nn_exp_poly_coeffs_f32[8]

extern

Polynomial coefficients used by the float32 MVE exp approximation.

arm_nn_exp_poly_coeffs_f32 [2/2]

const float32_t arm_nn_exp_poly_coeffs_f32[8]

Initial value:

= {
    1.0f,
    0.0416598916054f,
    0.500000596046f,
    0.0014122662833f,
    1.00000011921f,
    0.00833693705499f,
    0.166665703058f,
    0.000195780929062f,
}

Polynomial coefficients used by the float32 MVE exp approximation.

arm_nn_tanh_approx_coeffs_f16 [1/2]

const float32_t arm_nn_tanh_approx_coeffs_f16[3]

extern

Coefficients used by the float16 tanh rational approximation.

arm_nn_tanh_approx_coeffs_f16 [2/2]

const float32_t arm_nn_tanh_approx_coeffs_f16[3]

Initial value:

= {
    3.0f,
    27.0f,
    9.0f,
}

Coefficients used by the float16 tanh rational approximation.

arm_nn_tanh_lut256_f16 [1/2]

const uint16_t arm_nn_tanh_lut256_f16[257]

extern

Quantized binary16 LUT for tanh(x) with x in [0, 4].

Stores 257 samples so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments across the interval.

arm_nn_tanh_lut256_f16 [2/2]

const uint16_t arm_nn_tanh_lut256_f16[257]

Initial value:

= {
    0x0000u, 0x2400u, 0x27FFu, 0x29FFu, 0x2BFDu, 0x2CFDu, 0x2DFCu, 0x2EF9u, 0x2FF5u, 0x3078u, 0x30F6u, 0x3172u, 0x31EEu,
    0x3269u, 0x32E4u, 0x335Eu, 0x33D6u, 0x3427u, 0x3463u, 0x349Du, 0x34D8u, 0x3512u, 0x354Bu, 0x3584u, 0x35BCu, 0x35F3u,
    0x362Au, 0x3660u, 0x3696u, 0x36CBu, 0x36FFu, 0x3732u, 0x3765u, 0x3797u, 0x37C8u, 0x37F9u, 0x3814u, 0x382Cu, 0x3843u,
    0x3859u, 0x3870u, 0x3886u, 0x389Bu, 0x38B1u, 0x38C5u, 0x38DAu, 0x38EEu, 0x3902u, 0x3915u, 0x3928u, 0x393Au, 0x394Cu,
    0x395Eu, 0x3970u, 0x3981u, 0x3991u, 0x39A2u, 0x39B2u, 0x39C1u, 0x39D0u, 0x39DFu, 0x39EEu, 0x39FCu, 0x3A0Au, 0x3A18u,
    0x3A25u, 0x3A32u, 0x3A3Fu, 0x3A4Bu, 0x3A57u, 0x3A63u, 0x3A6Eu, 0x3A79u, 0x3A84u, 0x3A8Fu, 0x3A99u, 0x3AA3u, 0x3AADu,
    0x3AB7u, 0x3AC0u, 0x3AC9u, 0x3AD2u, 0x3ADBu, 0x3AE3u, 0x3AEBu, 0x3AF3u, 0x3AFBu, 0x3B03u, 0x3B0Au, 0x3B11u, 0x3B18u,
    0x3B1Fu, 0x3B25u, 0x3B2Cu, 0x3B32u, 0x3B38u, 0x3B3Eu, 0x3B43u, 0x3B49u, 0x3B4Eu, 0x3B54u, 0x3B59u, 0x3B5Eu, 0x3B62u,
    0x3B67u, 0x3B6Cu, 0x3B70u, 0x3B74u, 0x3B78u, 0x3B7Du, 0x3B80u, 0x3B84u, 0x3B88u, 0x3B8Cu, 0x3B8Fu, 0x3B92u, 0x3B96u,
    0x3B99u, 0x3B9Cu, 0x3B9Fu, 0x3BA2u, 0x3BA5u, 0x3BA7u, 0x3BAAu, 0x3BADu, 0x3BAFu, 0x3BB2u, 0x3BB4u, 0x3BB6u, 0x3BB9u,
    0x3BBBu, 0x3BBDu, 0x3BBFu, 0x3BC1u, 0x3BC3u, 0x3BC5u, 0x3BC6u, 0x3BC8u, 0x3BCAu, 0x3BCBu, 0x3BCDu, 0x3BCFu, 0x3BD0u,
    0x3BD2u, 0x3BD3u, 0x3BD4u, 0x3BD6u, 0x3BD7u, 0x3BD8u, 0x3BD9u, 0x3BDBu, 0x3BDCu, 0x3BDDu, 0x3BDEu, 0x3BDFu, 0x3BE0u,
    0x3BE1u, 0x3BE2u, 0x3BE3u, 0x3BE4u, 0x3BE5u, 0x3BE5u, 0x3BE6u, 0x3BE7u, 0x3BE8u, 0x3BE9u, 0x3BE9u, 0x3BEAu, 0x3BEBu,
    0x3BEBu, 0x3BECu, 0x3BEDu, 0x3BEDu, 0x3BEEu, 0x3BEEu, 0x3BEFu, 0x3BEFu, 0x3BF0u, 0x3BF0u, 0x3BF1u, 0x3BF1u, 0x3BF2u,
    0x3BF2u, 0x3BF3u, 0x3BF3u, 0x3BF3u, 0x3BF4u, 0x3BF4u, 0x3BF5u, 0x3BF5u, 0x3BF5u, 0x3BF6u, 0x3BF6u, 0x3BF6u, 0x3BF6u,
    0x3BF7u, 0x3BF7u, 0x3BF7u, 0x3BF8u, 0x3BF8u, 0x3BF8u, 0x3BF8u, 0x3BF9u, 0x3BF9u, 0x3BF9u, 0x3BF9u, 0x3BF9u, 0x3BFAu,
    0x3BFAu, 0x3BFAu, 0x3BFAu, 0x3BFAu, 0x3BFBu, 0x3BFBu, 0x3BFBu, 0x3BFBu, 0x3BFBu, 0x3BFBu, 0x3BFBu, 0x3BFCu, 0x3BFCu,
    0x3BFCu, 0x3BFCu, 0x3BFCu, 0x3BFCu, 0x3BFCu, 0x3BFCu, 0x3BFDu, 0x3BFDu, 0x3BFDu, 0x3BFDu, 0x3BFDu, 0x3BFDu, 0x3BFDu,
    0x3BFDu, 0x3BFDu, 0x3BFDu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu,
    0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFEu, 0x3BFFu, 0x3BFFu, 0x3BFFu,
}

Quantized binary16 LUT for tanh(x) with x in [0, 4].

Stores 257 samples so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments across the interval.

arm_nn_tanh_lut256_f32 [1/2]

const float32_t arm_nn_tanh_lut256_f32[257]

extern

LUT for tanh(x) sampled over x in [0, 4] for float32 helpers.

Stores 257 samples so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments across the interval.

arm_nn_tanh_lut256_f32 [2/2]

const float32_t arm_nn_tanh_lut256_f32[257]

LUT for tanh(x) sampled over x in [0, 4] for float32 helpers.

Stores 257 samples so interpolation can safely read lut[idx + 1] while indexing the 256 fractional segments across the interval.