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Microchip ATSAM4CMP32C

Hz, , Hz, , , 120 MHz, , 120 MHz, 2 MB ROM, 272 kB RAM

Symmetrical/Asynchronous Dual Core Architecture - Interrupt-based Interprocessor Communication - Cryptography - Physical Anti-tamper Detection I/O - Security bit for Device Protection - Segmented LCD Controller - Two-phase (SAM4CMS) or three-phase (SAM4CMP) Energy Metering Analog-Front-End - SW Controlled On-Chip Reference ranging from 1.6V to 3.4V - Temperature Sensor and Backup Battery Voltage Measurement Channel

Core Hz, , Hz, , , MPU 120 MHz, , FPU 120 MHz
  • Processor:Hz,
  • Processor:Hz,
  • Processor:, MPU 120 MHz
  • Processor:, FPU 120 MHz
  • Cryptographic Engine:1 -bit AES, CPKCC, ICM (SHA), TRNG
Memory 8 -bit External Bus Interface, 272 kB RAM, 2 MB ROM
  • External Bus Interface:8 -bit External Bus Interface
  • ROM:1 MB32 kB
  • ROM:1 MB
  • RAM:256 kB16 kB
Clock & Power 120 MHz, 120 MHz
  • Maximum Clock Frequency: , 120 MHz, 120 MHz,
Communication SPI, UART, USART, Other
  • SPI:1 x SPI Interface
  • UART:2 x UART Interface
  • USART:3 x USART Interface
  • Other:2 x TWI Two-wire Interface
Timer/Counter/PWM 6 x 16-bit Timer, 3 x 16-bit Pulse Width Modulation
  • Watchdog:1 x Watchdog Timer
  • Timer/Counter:6 x 16-bit Timer
  • PWM:3 x 16-bit Pulse Width Modulation
Analog 8-channel 10 bit ADC, 7 x Energy Metering Analog-Front -End
  • ADC:8-channel x 10 bit ADC
  • Other:7 x Energy Metering Analog-Front -End
I/O & Package 100-QFP
  • I/Os:52 General Purpose I/Os
  • Package, QFP:100-lead LQFP Package
Development Tools
CMSIS Drivers No CMSIS-Driver in Device Family Pack.
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