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Application Note 163

Programming the Infineon XC16x / ST Super10 Devices

This Application Note describes the features in the Keil C166/A166 toolchain that are available to support the Infineon C166v2 and STMicroelectronics Super10 architecture. Based on the C166v2 core Infineon offers today several device variants like the XC161, XC164 and XC167.

Compared to the C166 architecture, the C166v2 / Super10 core offers many CPU core enhancements such as single cycle instruction execution, a five-stage pipeline and a Multiply Accumulate unit (MAC).

This application note shows you:

  • How to configure the Startup code for the XC166 CPU variants.
  • How to write code for the MAC unit that adds DSP capabilities.
  • How to enhance interrupt performance using fast register banks and cached interrupt vectors.
  • New toolchain options for the C166v2 / Super10 CPU variants.
  • The features of the On-Chip Debug System (OCDS) Interface.
  • Usage of the µVision2 with the OCDS interface.
APNT_163.ZIP (85K)
Tuesday, October 11, 2005
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