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/****************************************************/ /* Release Notes for Version 6.12 */ /* 8051 DEVELOPMENT TOOL KITS */ /****************************************************/ This file contains release notes and last minute changes relating to the 8051 Version 6.12 Tool Chain. Information in this file, the accompanying manual, and software is Copyright (c) 2001 Keil Software and Keil Elektronik. All rights reserved. Contents ======== 1. What's New in C51 Version 6.12 2. uVision2 Integrated Development Environment 3. Compiler Enhancements 4. Assembler Enhancements 5. Linker Enhancements 6. Manuals Provided 7. Example Programs 8. New Devices & Register Header Files 9. uVision2 Debugger - On Chip Peripherals in the Simulator 10. Sales and Technical Support 1. What's New in C51 Version 6.12 There are numerous new features in C51 that make your software development efforts easier. - 32-bit applications run in Windows 95/98/NT/2000/ME. - Long filenames are supported. - New optimizer levels shrink program code size. - The uVision2 IDE is enhanced to make software development faster and easier. - The Device Database makes CPU configuration a one-click process. All assembler, compiler, and linker options are set automatically. - The Source Browser allows you to quickly navigate your program's variables and functions. We are constantly improving our products. To keep your product current during the Support Period listed in the uVision2 "About" box, download the latest updates from our Web page. If your support is exhausted, contact our Sales department to extend your support period. Compared to Version 6.00, Release V6.12 contains the following enhancements: - C51 directives RET_PSTK, and RET_XSTK unload the on-chip stack and use the reentrant stack for storing the return address. - The ANSI library functions modf, strtod, strtol, and strtoul have been added. - Linker directives have been enhanced to support multiple XDATA and CODE address ranges. - Wildcards are now supported in the segment control directives. - Simulation support has been added for the on-chip peripherals of the Analog Devices ADuC812, Philips LPC series, Philips 80C552/554, Dallas 320/520/530, Temic 89C51RD2 (including on-chip E2PROM), Temic 80C51CC2 and most other standard 40-pin devices like the 8051FC,RD,RD+, 8052, and so on. - Full simulation support of multiple DPTR registers in various devices has been added. - The uVision2 Debugger now includes a Monitor-51 interface. - The uVision2 Editor provides syntax coloring for assembler code. - You may now use the context menu in the uVision2 Editor to insert the CPU register definition include files. - Context Sensitive help is available for library functions and error messages. Position the cursor on a library function call or an error message and press the F1 key. - Philips 80C51MX support and Dallas 80C390 contiguous mode support in the PK51 package. LX51 Extended Linker/Locator. - New PDF Version of the Getting Started, C51 and A51/Utilities User's Guide. - Debugger Interface for Triscend E5 CSoC (more information is provided in the file C51\HLP\Readme_for_TE5_UV2.TXT). - No limitation on number of segments, publics in object files. - C51 variable names can be up to 256 characters long. 2. uVision2 Integrated Development Environment This release includes uVision2 for Windows which is an integrated development environment that encapsulates the following: - a project manager - integrated make facility - tool configuration - editor - a powerful debugger Using our tools, uVision2 allows you to write, compile, and debug your programs. The example programs provided on this CD are designed to work with uVision2. 3. Compiler Enhancements C51 Version 6.11 contains the following improvements: - Three new Optimize Levels focus on code density and reduce the code size of your application by 5-15%. OPTIMIZE(7) Extended Access Optimization: This optimizer level uses the DPTR for register variables. Pointer and array accesses are optimized for both speed and code size. OPTIMIZE(8) Re-use Common Entry Code: This optimizer level moves common function entry code to the beginning of a function to save code memory. This is the new default optimization level. OPTIMIZE(9) Common Block Subroutines: This optimizer level detects and merges multiple instances of common instruction sequences into subroutines. This optimization provides the greatest benefit to large, monolithic modules. - The enum data type automatically adjusts its size to 8 or 16 bits. - Support is available for Atmel, Philips, and Temic dual DPTR and functions the same as the Dallas 80C320, 80C520, 80C530, and 80C550 (ref: C51 User's Guide, chapter 5). Atmel Devices: Dual DPTR's are currently available on the AT89S8252. The C51 directive MODA2 generates code for dual DPTR's on Atmel and NOMODA2 disables dual DPTR usage. Philips and Temic Devices: Dual DPTR's are available on several Philips devices. The C51 directive MODP2 generates code for dual DPTR's and NOMODP2 disables dual DPTR usage. - A new directive, ONEREGBANK, offers enhanced support for programs that use a single register bank. By default, the C51 Compiler ensures that registerbank 0 is selected during by interrupt service routines (ISRs) that are declared without a using directive. This is done by adding the instruction MOV PSW,#0 to the entry code. This is necessary when the using directive is omitted on high-priority ISRs that may interrupt other low-priority ISRs (that have a register bank specified with the using directive). This also applies to RTX-51 and RTX-51 Tiny applications. You may now use the ONEREGBANK directive to specify that only registerbank 0 is in your application. Then, C51 will not generate the additional MOV PSW,#0 instruction for ISRs. - The C51 directives RET_ISTK, RET_PSTK, and RET_XSTK let you unload the on-chip stack and use the reentrant stack for storing the return address. - The following ANSI library routines have been included: modf, strtod, strtol, and strtoul. - The C51 directive OMF2 outputs a new object file format for the Extended LX51 Linker/Locator. With this new format, 16MB code space for constants and 16MB xdata space are supported for extended 8051 device variants, like ADuC812, Dallas 390 and others. - The C51 directive ROM(D512K) and ROM(D16M) generates code for the Dallas 390 contigious mode. You need to use this directive together with the OMF2 directive. More information is provided in the file C51\EXAMPLES\DALLAS 390\README.TXT. 4. Assembler Enhancements A51 Version 6.11 contains the following improvements: - Support has been added to provide compatibility with the C Preprocessor used in the C51 Compiler. Now in A51, a standard C macro preprocessor expands source text before the source file is assembled. This preprocessor is almost identical to the one implemented in the C51 Compiler (refer to the C51 User's Guide, chapter 4). The #include file path specification used is obtained from the C51INC environment variable. - The INCDIR directive (abbreviation ID) lets you specify the paths to assembler include files. With INCDIR, you may supply one or more paths to search for when a $INCLUDE (file) directive is processed. For example: $INCDIR (C:\C51\ASM) A51 STARTUP.A51 INCDIR (C:\C51\INC,C:\MYDIR) The search order for $INCLUDE is: a. Current directory (typically, the folder of the uVision2 project file) b. Paths specified with $INCDIR c. Path derived from the bin directory with ..\asm path (C:\Keil\C51\Asm in default installations). - The A51 Assembler now supports the following pre-defined Macros: __FILE__ name of the file being translated __LINE__ current line number in the file being compiled __TIME__ time when the translation was started __DATE__ date when the translation was started __STDC__ defined to 1 __A51__ version number of the A51 Assembler (for example, 600 for V6.00) __KEIL__ defined to 1 - C sfr and sbit declarations are now accepted. The A51 Assembler now accepts the same register definition files as the C Compiler. For example: sfr P0 = 0x80; sbit P0_1 = P0^1; - User-generated error output is now supported. Standard error messages may be generated with the __ERROR__ directive. For example: IF CVAR1LEN > 10 __ERROR__ "CVAR1 LEN EXCEEDS 10 BYTES" ENDIF #ifdef TESTVERS && RELEASE #error TESTVERS GENERATED IN RELEASE MODE #endif 5. Linker Enhancements BL51 Version 4.03 has the following improvements: - The DISABLEWARNING directive (Abbr. DW) allows you to selectively disable Linker warnings. For example, to disable Warning 1 and Warning 5, use the following command line: BL51 myfile.obj DISABLEWARNING (1, 5) - The NOSORTSIZE directive (Abbr. NOSO) disables sorting program segments by size. This is the method used in C51 Version 5 and earlier. In C51 Version 6, the BL51 Linker sorts and locates segments by size. This ensures fewer GAPS in the memory space and reduces memory consumption. - The SPEEDOVL directive (Abbr. SP) causes the linker to ignore constant segments (those that begin with ?CO?) from the overlay analysis. You may need to use this directive if you have a large number of constant code segments in a program and the linker requires a very long time to run. This directive might also be useful for applications that contain complex pointers to function tables (see the 8051 Utilities User's Guide, pages 34-41). Note that if you use function pointers, you must manually adjust the call tree (using the OVERLAY directive) or the SPEEDOVL directive may result in unreported warnings. - The NOAJMP directive (Abbr. NOAJ) disables the use of the AJMP instruction in the interbank jump table in code banking programs. This option is required for 8051 derivatives that do not support the AJMP instruction. - The RECURSIONS directive (Abbr. RC) allows you to specify the number of recursions allowed before the linker generates the following fatal error and halts: FATAL ERROR 232: APPLICATION CONTAINS TOO MANY RECURSIONS. For example: BL51 test.obj RECURSIONS(100) The linker may run for a long time in order to detect all recursions and remove the references. Therefore, the default setting is RECURSIONS(10). - The NOINDIRECTCALL directive (Abbr. NOIC) is used in code banking applications to signal the linker that calls through function pointers are made into the same code bank. This generates faster indirect function calls in code banking programs. If you use this directive, you must ensure that indirect function calls never cross a code bank. - The NOJMPTAB directive (Abbr. NOJT) is used in code banking programs to direct the BL51 linker to exclude the inter-bank call table normally used for bank-to-bank function calls. This directive is provided to enable you to create a user-defined bank switching mechanism. The NOJMPTAB directive modifies the behavior of BL51 as follows: a) The linker no longer needs the L51_BANK logic file. b) Call instructions are not modified to jump to the call table. c) Warnings are not generated if a jump or call is made to another bank. When you use NOJMPTAB, you must ensure that the proper bank is selected before you invoke a function in that bank. BL51 does not select the bank automatically. - The XDATA and CODE directives now accept address ranges. For example: BL51 myfile.obj CODE (0-0x2000, 0x4000-0x8000) XDATA (0-0x3FF) Specifies that BL51 may locate your program CODE anywhere in the ranges from 0000h to 2000h and from 4000h to 8000h. BL51 may locate your program's XDATA variables anywhere from 0000h to 03FFh. BL51 warns you if your program CODE or XDATA exceeds the specified memory area size. The XDATA and CODE ranges are generated from the uVision2 Options dialog - Target page when you enter external memory devices. - In the segment control directives, wildcards are now accepted when you locate segments. Wildcards are now allowed in the segment location directives (CODE, XDATA, DATA, and so on). For example: BL51 myfile.obj CODE (?pr?*?myfile (0x100)) locates all program segments (functions) from myfile.obj starting at address 0100h. 6. Manuals Provided This release of C51 includes the "Getting Started and Creating Applications User's Guide". This manual leads you step-by-step through several example programs and also introduces you to our broad product line. It is a quick reference for all of our 8051 and 251-based development tools and is available in PDF format in \KEIL\C51\HLP\GS51.PDF. 7. Example Programs Several example programs are included in the EXAMPLES directory. These examples demonstrate how to use the uVision2 Project Manager and Debugger (see the uVision2 Quick Start Guide for details). 8. New Devices & Register Header Files C51 Version 6.11 adds support for many 8051 derivatives currently available, including support for multiple DPTR's on Atmel, Dallas, Infineon, Philips and Temic devices. Header and other support files for most 8051 derivatives have been added. Now, when you edit C or assembler source text, the correct register definition file is listed in the editor context menu (right mouse click to open). Use the Insert "#include | ||||||||||
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