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| Virtual Simulation Registers (VTREG)The µVision3 Debugger implements virtual simulation registers (VTREG) that can be used to review the I²C communication on the Debugger command line level or within Debug and Signal functions. The following registers are implemented: | VTREG | Description |
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| I2C_IN | Data sent from the I²C peripherals to the the Microcontroller: Possible values in this register are:- 0xFFFF: for IDLE or STOP condition
- 0x0100: for START, initiates SLAVE transmit or receive on the microcontroller; next byte is slave address
- 0x00 .. 0xFF: any address or data byte transfer to the microcontroller
- 0xFF00: for ACK
- 0xFF01: for NACK
| | I2C_OUT | Data sent from the Microcontroller to the I²C peripherals. Possible values in this register are:- 0xFFFF: for IDLE or STOP condition
- 0x0100: for START, initiates MASTER transmit or receive on the microcontroller; next byte is slave address
- 0x00 .. 0xFF: any address or data byte transfer to the I²C peripherals
- 0xFF00: for ACK
- 0xFF01: for NACK
| | I2C_CLK | Clock Frequency in Slave Mode in Hz, i.e. 100000 for 100KHz transmission |
µVision3 supports only the 8-bit address mode of the I²C bus. The 11-bit address modes are currently not implemented and also not supported by the most microcontroller devices. |
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