Keil Logo

Trace Port

Trace Port defines the port type and frequency used for tracing. Three different port types are possible:

  • Serial Wire Output mode.
  • Sync Trace Port using the device's Trace Port Interface Unit (TPIU) in 3 modes.
  • Embedded Trace Buffer using the device's on-chip trace buffer for trace.

Serial Wire Output

Serial Wire Trace Port Options

  • Serial Wire Output – Manchester sets the Serial Wire Trace Output pin (SWO) for tracing. When selecting this option, ensure to set the debug Port to SW.
  • SWO Clock Prescaler defines the SWO Clock frequency. Values from 1 to 8192 can be entered. Set this option to a higher value in case trace overflows are encountered.
  • Autodetect configures the SWO Clock Prescaler automatically for the highest possible SWO Clock that ULINKpro supports.
  • SWO Clock displays the communication frequency, which is calculated by dividing the Core Clock trough the SWO Clock Prescaler. Frequencies up to 200 MHz are supported.
  • Detected errors are displayed beneath SWO Clock.

Sync Trace Port

ETM Trace Port Correction Settings

  • Sync Trace Port with n-bit Data, n=[1,2,4], directs the debugger to capture Instruction Trace data in 1, 2, or 4-bit format.

    When ETM Trace Enable is set, ensure that the Trace Port settings match the settings specified in the Initialization File. Refer to Configure Cortex-M Devices for Tracing, find the device used, and read the section Enable 4-Pin Trace (ETM).

  • CLK sets a signal delay in ns for the pin TRACECLK. Usually, no changes are necessary and the value of 0.0 ns is sufficient.
  • D0..D3 sets a signal delay in ns for the pins TRACEDATA[0]..TRACEDATA[3]. Usually, no changes are necessary and the value of 0.0 ns is sufficient.

In the event that data streams are not synchronized, which might happen due to chip or PCB design, use the options CLK and D0..D3 to enforce signal synchronization, as explained in Compensate Signal Delays.

Embedded Trace Buffer (ETB)

ETM Trace Port Options

Use this to read trace from the on-chip Embedded Trace Buffer (ETB), which provides on-chip storage of trace data using on-chip memory. Data is accessed through registers. No additional output-pins are needed. Streaming Trace is not supported. Refer to your device's user manual for further information.

Choose one of the Sync Trace Port formats or Embedded Trace Buffer to activate the checkbox ETM Trace Enable.

Note

  • µVision does not provide time information for ETB trace.
  • Code coverage is not supported for ETB trace.
  • You can read the ETB buffer while the CPU is running if a TraceHalt tracepoint was hit before.
  Arm logo
Important information

This site uses cookies to store information on your computer. By continuing to use our site, you consent to our cookies.

Change Settings

Privacy Policy Update

Arm’s Privacy Policy has been updated. By continuing to use our site, you consent to Arm’s Privacy Policy. Please review our Privacy Policy to learn more about our collection, use and transfers
of your data.