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Cortex Debug+ETM

The Cortex Debug+ETM connector interface can access the Embedded Trace Macrocell (ETM) TRACECLK and TRACEDATA(n) signals. The four TRACEDATA signals provide a high-speed data path for capturing instructions.

ULINKpro ETM Pinout Diagram

ETM TRACE Signals

Signal Connects to...
TRACECLK ETM trace clock pin.
TRACEDATA(0-3) 4-bit, trace data output pins.

JTAG Signals

Signal Connects to...
TMS Test Mode State pin — Use 100K Ohm pull-up resistor to VCC.
TDO Test Data Out pin.
TDI Test Data In pin — Use 100K Ohm pull-up resistor to VCC.
TCLK Test CLocK pin — Use 100K Ohm pull-down resistor to GND.
VTref Positive Supply Voltage — Power supply for JTAG interface drivers.
GND Digital ground.
nRESET nRESET pin — Connect this pin to the (active low) reset input of the target CPU. Use 100K Ohm pull-up resistor to VCC. This is an open-collector/open-drain output.

Serial Wire Signals

The Serial Wire mode is a different operating mode of the JTAG port. Only two pins are used for the communication. A third pin can be used optionally to trace data. JTAG pins and Serial Wire pins are shared.

  • TCLK is SWCLK (Serial Wire Clock)
  • TMS is SWDIO (Serial Wire debug Data Input/Output)
  • TDO is SWO (Serial Wire trace Output)
Signal Connects to...
SWDIO Data I/O pin. Use 100K Ohm pull-up resistor to VCC.
SWO Optional trace output pin.
SWCLK Clock pin. Use 100K Ohm pull-down resistor to GND.
VCC Positive Supply Voltage — Power supply for JTAG interface drivers.
GND Digital ground.
RESET nRESET pin — Connect this pin to the (active low) reset input of the target CPU. Use 100K Ohm pull-up resistor to VCC. This is an open-collector/open-drain output.

Note

  • Refer to Connectors for additional information.
  • Usually, devices do not include pull-up or pull-down resistors on JTAG nor SW pins. Resistors should be added externally onto the board. However, do not add resistors when the device includes them already.
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