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MCBXC167 User's Guide
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MCBXC167 User's Guide
Startup Code
The assembler module START_V2.A66 provides the startup code that configures the XC16x after a reset or a power up. It is divided into the following functional sections:
| Startup Code Sections | Description |
|---|---|
| Definitions for System and User Stack | UST1SZ/UST2SZ are required for the Fast Register Bank Switching on XC16x. Refer to: C166: USING XC16X FAST REGISTER BANK SWITCHING. |
| Definitions for Startup Code | Defines behavior of the Startup Code as documented in the respective comments. |
| CPU Configuration | Configures the SYSCON1 and SYSCON3 registers. |
| Peripheral Configuration | Configures the CPUCON1 and CPUCON2 registers. |
| Definitions for Reset Configuration Register (RSTCON) | Configures the Reset behavior. |
| Definitions for PLL Control Register (PLLCON) | Configures the PLL unit of the XC167 that defines the clock for the CPU and the peripherals. Use the PLL Clock Setting as described for the 40MHz CPU clock. |
| Definitions for Watchdog Timer Control Register (WDTCON) | Configures the Watchdog Timer. |
| Definitions for Frequency Output Control (FOCON) | Configures the Clock Output pin. |
| External Bus Configuration | Configures the external BUS system of the XC167 device. Use the settings in External Bus Configuration to access the devices on the MCBXC167 boards. |
Note
- All CPU configuration settings are explained in detail in the Infineon XC167 System Users Manual.
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