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DIP Switches

The DIP switch settings (along with the Configuration Jumpers) configure the MCBx51 board. Descriptions of each DIP switch follow the illustration.

Note

  • A DIP switch is ON when it is positioned toward the edge of the MCBx51 board. A DIP switch is OFF when it is positioned toward the center of the board.

DIP Switch

DIP Switch (default settings shown)

Uart_INT (Switch 1): Default ON

The Uart_INT switch selects whether or not the external 16550 UART generates an interrupt on the microcontroller.

  • ON: The interrupt output from the 16550 is connected to port pin 3.2.
  • OFF: The interrupt output from the 16550 is not connected to the microcontroller.

This switch is useful when using interrupt-driven serial I/O with the external UART. You must set Uart_INT to ON, if you want to halt execution of a user program within µVision.

ext_Uart (Switch 2): Default ON

The ext_Uart switch determines whether or not the chip select signal for the external 16550 UART is generated.

  • ON: The chip select signal is generated and the Monitor program uses the external serial interface for communication. The communication baud rate is 57600 BPS.
  • OFF: The UART chip select is not generated and the Monitor program uses the on-chip serial interface for communication. In this case, the communication baud rate is 19200 BPS@12MHz or 38400 BPS@24MHz.
SRC/D2 (Switch 3): Default ON

The SRC/D2 switch selects SOURCE or BINARY mode on the 251 CPU.

  • ON: The SOURCE mode is selected.
  • OFF: The BINARY mode is selected.

The SRC/D2 must be ON when using the Dallas 320/420/520 device to select the Monitor version, which supports the Dual DPTR registers of that CPU. Refer to CPU Selection for a complete description on CPU types and related Monitor versions.

The SRC/D2 must be OFF when using a 151 or 8051 device and when running the MCBx51 with a user application in EPROM.

PAGE (Switch 4): Default OFF

The PAGE switch selects whether or not the 251 or 151 Monitor operates in page mode or non-page mode.

  • ON: Page mode Monitor version is enabled.
  • OFF: Non-page mode Monitor version is enabled.

The configuration jumpers must also be set to PAGE for page mode or NONP for non-page mode for the MCBx51 board to run correctly.

If you operate the MCBx51 with a user application in EPROM, you must set the PAGE switch OFF. However, you may still use the jumpers to select page or non-page mode.

Monitor (Switch 5): Default ON

The Monitor switch selects if the Monitor is used for debugging or if the MCBx51 operates with a user application EPROM at IC13.

  • ON: The Monitor Memory Mapping is enabled and you must operate the MCBx51 board with the supplied Monitor EPROM.
  • OFF: The User Memory Mapping is selected and you may insert an EPROM with your target application.

If you operate the MCBx51 with a user application EPROM, you must set the DIP Switches 51/151 (6), PAGE (4) and SRC/D2 (3) to OFF.

51/151 (Switch 6): Default OFF

The 51/151 switch selects whether a 251 or a 151/8051 compatible microcontroller is installed in the IC1 socket.

  • ON: For a 151/8051 compatible device.
  • OFF: For a 251 compatible device (unless the 251 is emulating an 8051 or 151 device).
MAP1 (Switch 7), MAP0 (Switch 8): Default OFF, OFF

The MAP1 and MAP0 switches select the memory map for the MCBx51. The memory map used depends on the Monitor DIP switch setting. The memory for both Monitor settings is shown in the following tables.

Monitor Memory Mapping (Monitor DIP Switch is ON)
Map1 Map0 RAM Monitor EPROM UART CS & USER CS
OFF OFF 00:0000h-01:FFFFh FF:E800h-FF:FFFFh UART:FF:E400h-FF:E7FFh
251 Mode FE:0000h-FF:DFFFh USER:FF:E000h-FF:E3FFh
OFF ON Illegal Illegal Illegal
ON OFF Illegal Illegal Illegal
ON ON X:0000h-X:DFFFh C:E800h-C:FFFFh UART:X:E400h-X:E7FFh
8051 Mode C:0000h-C:DFFFh (von Neumann mapped) USER:X:E000h-X:E3FFh (von Neumann mapped)


User Memory Mapping (Monitor DIP switch is OFF)
Note: DIP Switch 51/151, Page and SRC/D2 must be also off
Map1 Map0 RAM USER EPROM UART CS & USER CS
OFF OFF 00:0000h-01:FFFFh FF:E800h-FF:DFFFh UART:FF:E400h-FF:E7FFh
251 Mode FE:0000h-FE:DFFFh FF:E800h-FF:FFFFh USER:FF:E000h-FF:E3FFh
OFF ON 00:0000h-01:FFFFh FE:0000h-FF:DFFFh UART: FF:E400h-FF:E7FFh
251 Mode FF:E800h-FF:FFFFh USER:FF:E000h-FF:E3FFh
ON OFF 00:0000h-00:7FFFh 00:8000h-01:FFFFh
FF:E800h-FF:FFFFh
UART: FF:E400h-FF:E3FFh
251 Mode FF:E800h-FF:FFFFh USER:FF:E000h-FF:E3FFh
ON ON X:0000h-X:DFFFh C:0000h-C:FFFFh UART:X:E400h-X:E7FFh
8051 Mode USER:X:E000h-X:E3FFh
LED (Switch 9): Default ON

The LED switch selects whether or not Port 1 is connected to the 8 LEDs in the upper right portion of the board.

  • ON: The LEDs on port 1 are enabled.
  • OFF: The LEDs are not connected to port 1.

If the Monitor DIP switch is ON and LED is OFF, the Monitor does not modify the port 1 lines on power-up.

A17 (Switch 10): Default ON

The A17 switch selects whether the 251 CPU uses P1.7 as the A17 address line or as an I/O port line.

  • ON: The P1.7 is used as an A17 line and you can address up to 256KB memory with the 251 device.
  • OFF: The P1.7 is used as an I/O port line. Note that the CONFIG BYTES of the 251 CPU must be programmed correctly to use this feature.

The Monitor EPROM, which is supplied on the MCBx51 board, is configured for 256KB memory. Refer to the 251 or 151 data sheets for more information. If you use the MCBx51 board with an 8051 compatible device, such as the Intel 151 or Dallas 320, the A17 DIP switch must be OFF.

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