NXP 80C51MX

The NXP 80C51MX provides a unified 16 MB address space. New instructions can access up to 16MB memory whereby CODE and XDATA space are mapped into one single address space.

The stack pointer can be configured as 16-Bit stack pointer that addresses the on-chip RAM area in the EDATA memory class.

The following table shows the memory classes used for programming the 80C51MX architecture. These memory classes are available when you are using the AX51 macro assembler and the LX51 linker/locater.

Memory Class	Address Range	Description
DATA	7F:0000 – 7F:007F	Direct addressable on-chip RAM.
BIT	7F:0020 – 7F:002F	Bit-addressable RAM; accessed bit instructions.
IDATA	7F:0000 – 7F:00FF	Indirect addressable on-chip RAM; can be accessed with @R0 or @R1.
EDATA	7F:0000 – 7F:FFFF	Complete on-chip RAM; can be used as stack space or can be accessed with @PR0 or @PR1.
XDATA	00:0000 – 00:FFFF	64 KB RAM (read/write access). Accessed with MOVX instruction.
HDATA	00:0000 – 7F:FFFF	8 MB RAM (read/write access). Accessed with MOVX instruction and extended DPTR.
CODE	80:0000 – 80:FFFF	Classic 8051 compatible 64 KB ROM (only read access possible). Used for executable code or constants.
ECODE	80:0000 – 80:FFFF	8 MB ROM (only read access possible).
HCONST	80:0000 – 80:FFFF	8 MB ROM. Same as ECODE, this class is used by the CX51 Compiler for constants.
BANK 0 … BANK 63	80:0000 – 0xBF:FFFF B0:0000 – B63:FFFF	Used by the CX51 Compiler to expand the program memory to more than 64KB.

Note

Colons are used to improve the readability only. The addresses are entered in the tools as numbers without colon.
The memory prefixes D: I: X: C: B0: .. B31: cannot be used at Ax51 assembler level. The memory prefix is only listed for better understanding. The Lx51 linker/locater and several Debugging tools, for example the µVision2 Debugger, are using memory prefixes to identify the memory class of the address.

NXP 80C51MX

Products

Development Tools

Hardware & Collateral

Downloads

Support

Contact

Important information