8051 Instruction Set Manual

Extended 8051 Variants

Several new variants of the 8051 extend the code and/or xdata space of the classic 8051 with address extension registers.

The following table shows the memory classes used for programming the extended 8051 devices. These memory classes are available for classic 8051 devices when you are using memory banking with the LX51 linker/locater. In addition to the code banking known from the BL51 linker/locater, the LX51 linker/locator supports also data banking for xdata and code areas with standard 8051 devices.

Memory ClassAddress RangeDescription
DATAD:00 – D:7FDirect addressable on chip RAM.
BITD:20 – D:2Fbit addressable RAM; accessed bit instructions.
IDATAI:00 – I:FFIndirect addressable on chip RAM; can be accessed with @R0 or @R1.
XDATAX:0000 – X:FFFF64 KB RAM (read/write access). Accessed with MOVX instruction.
HDATAX:0000 – X:FFFFFF16 MB RAM (read/write access). Accessed with MOVX instruction and extended DPTR.
CODEC:0000 – C:FFFF64 KB ROM (only read access possible). Used for executable code or constants.
ECODEC:0000 – C:FFFFFF16 MB ROM (only read access possible). Used for constants. In some modes of the Dallas 390 architecture also program execution is possible. .
BANK 0
.
BANK 31
B0:0000 – B0:FFFF
.
B31:0000 – B31:FFFF
Code Banks for expanding the program code space to 32 x 64KB ROM.

Note

  • The memory prefixes D:, I:, X:, C:, and B0:-B31: cannot be used at the Ax51 assembler level. The memory prefix is only listed for better understanding. The Lx51 linker/locater and several Debugging tools, for example the µVision2 Debugger, are using memory prefixes to identify the memory class of the address.
  • If you are using the Dallas 390 contiguous mode the address space for CODE is C:0000-C:0xFFFFFF.