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8051 Instruction Set Manual
Architecture Overview
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Classic 8051
Classic 8051 Memory Layout
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Extended 8051 Memory Layout
NXP 80C51MX
NXP 80C51MX Memory Layout
251 Architecture
251 Memory Layout
CPU Registers
8051 Variants
251 Architecture
Program Status Word (PSW)
Opcodes
Instructions
8051 Instruction Set Manual
Program Status Word (PSW)
The Program Status Word (PSW) contains status bits that reflect the current CPU state. The 8051 variants provide one special function register called PSW with this status information. The 251 provides two additional status flags, Z and N, that are available in a second special function register called PSW1.
PSW Register (all 8051 and 251 variants)
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|
| CY | AC | FO | RS1 | RS0 | OV | UD | P |
Additional PSW1 Register (on 251 Architecture only)
| Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|
| CY | AC | N | RS1 | RS0 | OV | Z | — |
The following table describes the status bits in the PSW:
RS1 RS0 Working Register Bank and Address
0 0 Bank0 (D:0x00 - D:0x07)
0 1 Bank1 (D:0x08 - D:0x0F)
1 0 Bank2 (D:0x10 - D:0x17)
1 1 Bank3 (D:0x18H - D:0x1F)
| Symbol | Function |
|---|---|
| CY | Carry flag |
| AC | Auxiliary Carry flag (For BCD Operations) |
| F0 | Flag 0 (Available to the user for General Purpose) |
| RS1, RS0 |
Register bank select: RS1 RS0 Working Register Bank and Address 0 0 Bank0 (D:0x00 - D:0x07) 0 1 Bank1 (D:0x08 - D:0x0F) 1 0 Bank2 (D:0x10 - D:0x17) 1 1 Bank3 (D:0x18H - D:0x1F) |
| 0V | Overflow flag |
| UD | User definable flag |
| P | Parity flag |
| — | Reserved for future use (251 Only) |
| Z | Zero flag (251 Only) |
| N | Negative flag (251 Only) |
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