8051 Variants

The classic 8051 provides 4 register banks of 8 registers each. These register banks are mapped into the DATA memory area at address 0 – 0x1F. In addition the CPU provides a 8-bit A (accumulator) and B register and a 16-bit DPTR (data pointer) for addressing XDATA and CODE memory. These registers are also mapped into the SFR space as special function registers.