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Analog Devices MicroConverter B2 Series Atmel 89x8252 and Variants Cast/Evatronix Dual DPTR Dallas 320, 420, 520, and 530 Dallas 390, 400, 5240, and Variants Arithmetic Accelerator Infineon C517, C509, 80C537, and Variants Data Pointers High-speed Arithmetic Library Routines NXP and Atmel Dual DPTR NXP 80C51MX Architecture NXP 8xC750, 8xC751, and 8xC752 Error Messages Library Reference AppendixNXP 80C51MX Architecture
The NXP 80C51MX architecture provides extended instructions and addressing modes which support up to 16MB of memory. Universal pointer registers and related instructions provide hardware support for generic 24-bit pointers. These are fully supported by the Keil CX51 Compiler, LX51 Linker/Locater, and AX51 Macro Assembler.
Programming examples for the NXP 80C51MX architecture are found in the C51\EXAMPLES\NXP 80C51MX folder.
Note
- The NXP 80C51MX architecture is supported with the extended CX51 Compiler, LX51 Linker/Locater, and AX51 Macro Assembler which are available only in the PK51 Professional Developers Kit.
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