Individual statements are described below.
||Defines the system stack space used by CALL/RET
and PUSH/POP instructions. Adjust the system stack space
according to the application requirements.
||Defines the user stack space available for
automatics. This stack space is accessed by R0. Adjust the system
stack space according to the application requirements.
||Defines the user stack space available for the
interrupt functions assigned to the local register bank 1 or 2.
The user stack must be assigned separately, since the compiler
cannot copy R0-values to local register banks. If no interrupt
functions are assigned to local register bank 1 or 2, set
UST1SZ/UST2SZ to 0.
||Memory Zero Initialization of RAM areas. Default:
enable the memory zero initialization of RAM area. To disable the
memory zero initialization, set CLR_MEMORY = 0. This reduces the
startup code size.
||Variable Initialization of explicitly initialized
variables (variables are to be defined as static or declared at
file level). Default: initialize variables. To disable the
variable initialization, set INIT_VARS = 0. This reduces the
startup code size.
||Allows to re-assign the DPP registers. Set DPPUSE
= 0 to reduce the code size of the startup code, if the L166
DPPUSE directive is not used.
||Set DPP3USE = 0 to disable the usage of DPP3
during initialization of variables and to reduce the startup code
size. This option might be required if you write program parts
that are reloaded during application execution.
||Initializes the CPUCONx register
CPUCONx. Default is 0 - do not initialize. The CPU
configuration registers select a number of general features and
behaviors of the CPU core. In general, these registers must not
be modified by application. For details and exceptions refer to
the device user manual.
||Initializes the Internal Memory Block register,
which contains the bit fields controlling the wait state
generation for the Flash memory (IMBCTRL) and the other IMB
memory blocks (IMBCTRH). Default is 0 - do not initialize.
||Initializes the Wake-up Oscillator Control
register (WUOSCCON) to configure the wake-up clock OSC_WU. Please
refer to the device user manual for details.
||Initializes the High Precision Control register
(HPOSCCON) to configure the High-Precision Oscillator OSC_HP.
Please refer to the device user manual for details.
|INIT_PLLOCSCON and INIT_PLLCONx
||Initializes the PLL register. Set the divider
value, VCO bypass status, power saving mode, and operation
control. Please refer to the device user manual for details.
||Initializes the register SYSCON0 used to select
the system clock source and the emergency clock.
||Initializes the External Service Request register
(ESR) to control the multi-functional pin behaviour, for example
as output, input, reset, trap, or act as a trigger input for the
Global State Controller (GSC).
||Sets the Hardware Watchdog control register
(WDTCON). Default: disable the hardware watchdog. To enable the
watchdog set WATCHDOG = 1.
||Configures the External Bus (EBC) behaviour. Set
the pins for segment addresses, bus arbitration, master/slave
mode, and chip select. Set the Address Select register
(ADDRSELx), the Function Configuration register
(FCONCSx), and Timing Configuration register
(TCONCSx). For details, please refer to the respective
device user manual.
||Initializes the RSTCON register used to define the
general reset behaviour.