The startup code is executed immediately upon reset of the target
system and performs the following operations in order:
The functions of the individual EQU statements are described
below.
Name |
Definition |
_ALECTL0 |
ALE Lengthening Control Bit; see the C167 data
sheet for description. |
_BTYP0 or BYTP |
Defines the external bus configuration the CPU
uses. The bus configuration is used only if BTYP_ENABLE is set to
1. |
_BUSACT0 or BUSACT |
Bus Active Control Bit. Default: 1 to enable the
external bus. |
_BYTDIS |
Byte High Enable pin control bit initialization
value. Default: 0 for enabled. (This is the reset value of the
CPU). To disable the BHE# output, set _BYTDIS to 1. |
_CLREN |
System Clock Output Enable bit initialization
value. Default: 0 to disable the CLKOUT output (this is also the
reset value of the CPU.) To enable the CLKOUT output set _CLKEN
to 1. |
_MCTC0 or _MCTC |
Memory Cycle Time initialization value. Default: 1
for one memory wait state (MCTC = 0EH). Reset value of the CPU is
15 for 15 additional state times. |
_MCTCn-_CSWENn |
Defines the bus characteristics for the address
range specified with ADDRESSn and RANGEn. These values are used
to set the BUSCON1-BUSCON4 registers. |
_MTTC0 or MTTC |
Memory Tri-State Time initialization value.
Default: 0 for 0.5 states; this is also the reset value of the
CPU. To select 0 states for the Tri-State time, set _MTTC to
1. |
_RDY_AS |
Synchronous / Asynchronous READY# input selection.
Default: 0 for synchronous READY# input. |
_RDYEN0 or RDYEN |
READY# Input Enable Control Bit. Default: 0 to
disable the READY# input. |
_ROMEN |
The Internal ROM Access Enable bit is read-only.
Do not change this value. |
_ROMS1 |
On-Chip ROM Segment-Mapping Control Bit. Default:
0 for on-chip ROM mapped to segment 0 (address range
0x0000-0xFFFF). Seg _ROMS1 to 1 for segment 1 (address range
0x10000-0x1FFFF). |
_RWDC0 or RWDC |
Read/Write Signal Delay initialization value.
Default: 1 for no delay (this is the typical value in most
systems). Reset value of the CPU is 0 for 0.5 states delay
time. |
_SGTDIS |
Segmentation Disable Control Bit initialization
value. The segmentation is disabled for the TINY memory model; in
all other memory models it is enabled. Do not change the
definition of _SGTDIS. |
_WRCFG |
Write Configuration Control Bit. Default: 0 for
normal configuration of WR# and BHE# outputs. |
_XRAMEN |
XRAM Enable Control Bit. Default: 0 to disable
access to XRAM area. External bus accesses are generated in the
XRAM area. |
ADDRESS1-ADDRESS4 |
Define the start address of the Chip Select 1-4
output (CS1#-CS4#). This value is used to set the
ADDRSEL1-ADDRSEL4 register. |
BTYP_ENABLE |
Allow software to modify BTYP and change the bus
mode. By default, this is disabled and the bus type is set by the
hardware pins of the C16x/ST10. To enable the external bus
configuration, set BTYP_ENABLE = 1. |
BUSCON1-BUSCON4 |
Initialization for
BUSCON1/ADDRSEL1-BUSCON4/ADDRSEL4 registers. Set BUSCON1 = 1 to
initialize BUSCON1/ADDRSEL1. |
CLR_MEMORY |
Memory Zero Initialization of RAM areas. Default:
enable the memory zero initialization of RAM area. To disable the
memory zero initialization, set CLR_MEMORY = 1. This reduces the
startup code size. |
DPPUSE |
Allow re-assignment of DPP registers. Default: 1
to support the L166 DPPUSE directive. To disable the DPP
re-assignment, set DPPUSE = 0. This reduces the startup code
size. |
EXT_RAM |
External RAM Write-Access Enable (P3.13 = WR-Pin)
initialization value. The default value enables the external RAM
access. To disable external RAM, remove the statement $SET
(EXT_RAM). |
INIT_VARS |
Variable Initialization of explicitly initialized
variables (variables are to be defined as static or declared at
file level). Default: initialize variables. To disable the
variable initialization, set INIT_VARS = 0. This reduces the
startup code size. |
RANGE1-RANGE4 |
Define the address range of the Chip Select 1-4
output (CS1#-CS4#). This value is used to set the
ADDRSEL1-ADDRSEL4 register. |
SSTSZ |
Set the system stack space, if you selected 7 for
the STK_SIZE. |
STK_SIZE |
STK_SIZE: Maximum System Stack Size selection
initialization value. Default value is 0 for 256-word stack size.
Set STK_SIZE to the following values for other stack sizes:
0 for 256-word system stack
1 for 128-word system stack
2 for 64-word system stack
3 for 32-word system stack
4 for 512-word system stack (not for C166)
7 for user-defined system-stack size
If you select 7, the system-stack size is defined with the SSTSZ
variable. |
USTSZ |
Set the user stack space. The user stack is used
for automatic variables. |
WATCHDOG |
Hardware Watchdog control. Default: disable the
hardware watchdog. To enable the watchdog set WATCHDOG = 1. |