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32K Common Area

The following schematic shows hardware that has a 32 KByte common area and seven 32 KByte code banks. A single EPROM is used for all code space. Due to the address decoding logic, code bank 0 is identical to the common area. Therefore, it should not be used by the application.

Code Banking Hardware Schematic

This design provides 256 KBytes of xdata memory that is mapped like the code memory but is accessed using the /RD and /WR lines (instead of the /PSEN line). The xdata space may be used for variable banking.

The following figure illustrates the memory map for this example.

Code Banking Memory Map

For this hardware the configuration file (L51_BANK.A51) is configured as follows:

?N_BANKS        EQU   8        ; Eight banks are required.
?B_MODE         EQU   0        ; banking via on-chip I/O Port.
?B_VAR_BANKING  EQU   1        ; you may use also variable banking.
?B_PORT         EQU   090H     ; Port address of P1.
?B_FIRSTBIT     EQU   2        ; Bit 2 is the first address line.

Note

  • You must not use code bank 0 in your application (this memory is identical to the common area). Therefore, no module of your application may be assigned to code bank 0.

The BANKAREA directive must be set as follows:

BL51 BANK1 {A.OBJ}, ..., BANK7{G.OBJ} ... BANKAREA (0x8000,0xFFFF)

 

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