BL51 User's Guide

XDATA Port

A latch or I/O device mapped into the XDATA space may be used to extend the address lines of the 8051 device. The following example illustrates hardware that uses a latch mapped into the XDATA space to address a 512 KByte EPROM.

Code Banking Hardware Schematic

The following figure illustrates the memory map for this example.

Code Banking Memory Map

The configuration file (L51_BANK.A51) is configured as follows:

?N_BANKS      EQU  8      ; Eight banks are required.
?B_MODE       EQU  1      ; bank switch via xdata port.
?B_XDATAPORT  EQU  0      ; any I/O address can be given for the example.
?B?FIRSTBIT   EQU  0      ; bit 0 is used as first address line.

No changes are required in the startup code (STARTUP.A51).

The linker automatically adjusts the size of the common area places copies of it into each bank. This makes the contents of all code banks identical in the address range of the common area. The BANKAREA directive is not required (the default address range is 0-0xFFFF).