BL51 User's GuideBL51 Introduction Linking Programs Locating Segments Data Overlaying Code Banking Theory of Operation Configuration I/O Port XDATA Port User-Defined Common Area Bank Area Locating Modules Locating Segments Structuring Programs Examples Four 64K Code Banks On-chip ROM XDATA Port 32K Common Area Real-Time Programs Error Messages
Four 64K Code Banks
This example demonstrates the configuration required to bank switch using one 256 KByte EPROM and four 64 KByte banks. The following figure illustrates the hardware schematic.
The following figure illustrates the memory map for this example.
One 256 KByte EPROM is used in this hardware configuration. Bank switching is implemented using two bank select address lines (Port 1.5 and Port 3.3). The configuration file (L51_BANK.A51) is configured as follows:
?N_BANKS EQU 4 ; Four banks are required. ?B_MODE EQU 4 ; user-provided bank switch code.
The section in L51_BANK.A51 that begins with IF ?B_MODE = 4 defines the code that switches code banks. This section must be configured as follows:
P1 DATA 90H ; I/O Port Addresses P3 DATA 0B0H ; " SWITCH0 MACRO ; Switch to Memory Bank #0 CLR P3.3 ; Clear Port 3 Bit 3 CLR P1.5 ; Clear Port 1 Bit 5 ENDM SWITCH1 MACRO ; Switch to Memory Bank #1 SETB P3.3 ; Set Port 3 Bit 3 CLR P1.5 ; Clear Port 1 Bit 5 ENDM SWITCH2 MACRO ; Switch to Memory Bank #2 CLR P3.3 ; Clear Port 3 Bit 3 SETB P1.5 ; Set Port 1 Bit 5 ENDM SWITCH3 MACRO ; Switch to Memory Bank #3 SETB P3.3 ; Set Port 3 Bit 3 SETB P1.5 ; Set Port 1 Bit 5 ENDM
Add the following to your startup code (STARTUP.A51) to ensure that the CPU starts in a defined state at reset:
MOV SP,#?STACK-1 P1 DATA 90H ; I/O Port Addresses P3 DATA 0B0H EXTRN DATA (?B_CURRENTBANK) MOV ?B_CURRENTBANK,#0 ; Select code bank 0 CLR P3.3 ; Clear Port 3 Bit 3 CLR P1.5 ; Clear Port 1 Bit 5 JMP ?C_START
The linker automatically adjusts the size of the common area places copies of it into each bank. This makes the contents of all code banks identical in the address range of the common area. The BANKAREA directive is not required (the default address range is 0-0xFFFF).
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