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Linker User Guide

Preface Overview of the Linker Linking Models Supported by armlink Image Structure and Generation The structure of an ARM ELF image Views of the image at each link stage Input sections, output sections, regions, and prog Load view and execution view of an image Methods of specifying an image memory map with the Image entry points Simple images Types of simple image Type 1 image structure, one load region and contig Type 2 image structure, one load region and non-co Type 3 image structure, multiple load regions and Section placement with the linker Default section placement Section placement with the FIRST and LAST attribut Section alignment with the linker Linker support for creating demand-paged files Linker reordering of execution regions containing Linker-generated veneers What is a veneer? Veneer sharing Veneer types Generation of position independent to absolute ven Reuse of veneers when scatter-loading Command-line options used to control the generatio Weak references and definitions How the linker performs library searching, selecti How the linker searches for the ARM standard libra Specifying user libraries when linking How the linker resolves references The strict family of linker options Linker Optimization Features Getting Image Details Accessing and Managing Symbols with armlink Scatter-loading Features Scatter File Syntax Linker Command-line Options Linker Steering File Command Reference Via File Syntax

What is a veneer?

3.6.1 What is a veneer?

A veneer extends the range of a branch by becoming the intermediate target of the branch instruction.

The branch instruction BL is PC-relative and has a limited branch range. The range of a BL instruction is 32MB for ARM instructions. Processors that support Thumb-2 technology have a range of 16MB. Processors that do not support Thumb-2 technology have a range of 4MB.
When a branch involves a destination beyond the branching range of the BL instruction, armlink must generate a veneer. The veneer then sets the PC to the destination address. This enables the veneer to branch anywhere in the 4GB address space. If the veneer is inserted between ARM and Thumb code, the veneer also handles the instruction set state change.
The linker can generate the following veneer types depending on what is required:
  • Inline veneers.
  • Short branch veneers.
  • Long branch veneers.
armlink creates one input section called Veneer$$Code for each veneer. A veneer is generated only if no other existing veneer can satisfy the requirements. If two input sections contain a long branch to the same destination, only one veneer is generated that is shared by both branch instructions. A veneer is only shared in this way if it can be reached by both sections.
If you are using ARMv4T, armlink generates veneers when a branch involves change of state between ARM and Thumb®. You still get interworking veneers for ARMv5TE and later when using conditional branches, because there is no conditional BL instruction. Veneers for state changes are also required for B instructions in ARMv5 and later.

Note

If execute-only (XO) sections are present, only XO-compliant veneer code is created in XO regions.
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