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Linker User Guide

Preface Overview of the Linker Linking Models Supported by armlink Image Structure and Generation The structure of an ARM ELF image Views of the image at each link stage Input sections, output sections, regions, and prog Load view and execution view of an image Methods of specifying an image memory map with the Image entry points Simple images Types of simple image Type 1 image structure, one load region and contig Type 2 image structure, one load region and non-co Type 3 image structure, multiple load regions and Section placement with the linker Default section placement Section placement with the FIRST and LAST attribut Section alignment with the linker Linker support for creating demand-paged files Linker reordering of execution regions containing Linker-generated veneers What is a veneer? Veneer sharing Veneer types Generation of position independent to absolute ven Reuse of veneers when scatter-loading Command-line options used to control the generatio Weak references and definitions How the linker performs library searching, selecti How the linker searches for the ARM standard libra Specifying user libraries when linking How the linker resolves references The strict family of linker options Linker Optimization Features Getting Image Details Accessing and Managing Symbols with armlink Scatter-loading Features Scatter File Syntax Linker Command-line Options Linker Steering File Command Reference Via File Syntax

Type 1 image structure, one load region and contiguous execution regions

3.2.2 Type 1 image structure, one load region and contiguous execution regions

A Type 1 image consists of a single load region in the load view and three default execution regions, ER_RO, ER_RW, ER_ZI. These are placed contiguously in the memory map. An additional ER_XO execution region is created only if any input section is execute-only.

This approach is suitable for systems that load programs into RAM, for example, an OS bootloader or a desktop system. The following figure shows the load and execution view for a Type 1 image without execute-only (XO) code:
Figure 3-4 Simple Type 1 image
Simple Type 1 image without execute-only code

Use the following command for images of this type:
armlink --ro_base 0x8000

Note

0x8000 is the default address, so you do not have to specify --ro_base for the example.

Load view

The single load region consists of the RO and RW output sections, placed consecutively. The RO and RW execution regions are both root regions. The ZI output section does not exist at load time. It is created before execution, using the output section description in the image file.

Execution view

The three execution regions containing the RO, RW, and ZI output sections are arranged contiguously. The execution addresses of the RO and RW regions are the same as their load addresses, so nothing has to be moved from its load address to its execution address. However, the ZI execution region that contains the ZI output section is created at run-time.
Use armlink option --ro_base address to specify the load and execution address of the region containing the RO output. The default address is 0x8000.
Use the --zi_base command-line option to specify the base address of a ZI execution region.

Load view for images containing execute-only regions

For images that contain XO sections, the XO output section is placed at the address that is specified by --ro_base. The RO and RW output sections are placed consecutively and immediately after the XO section.

Execution view for images containing execute-only regions

For images that contain XO sections, the XO execution region is placed at the address that is specified by --ro_base. The RO, RW, and ZI execution regions are placed contiguously and immediately after the XO execution region.
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