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Linker User Guide
Conventions and feedback
Overview of the linker
Linking models supported by armlink
Image structure and generation
The image structure
Input sections, output sections, regions, and Prog
Load view and execution view of an image
Methods of specifying an image memory map with the
Types of simple image
Type 1 image, one load region and contiguous execu
Type 2 image, one load region and non-contiguous e
Type 3 image, two load regions and non-contiguous
Image entry points
About specifying an initial entry point
Section placement with the linker
Placing sections with FIRST and LAST attributes
Section alignment with the linker
Demand paging
About ordering execution regions containing Thumb
Overview of veneers
Veneer sharing
Veneer types
Generation of position independent to absolute ven
Reuse of veneers when scatter-loading
Using command-line options to control the generati
About weak references and definitions
How the linker performs library searching, selecti
Controlling how the linker searches for the ARM st
Specifying user libraries when linking
How the linker resolves references
Use of the strict family of options in the linker
Using linker optimizations
Getting information about images
Accessing and managing symbols with armlink
Using scatter files
Linker User Guide
Type 1 image, one load region and contiguous execution regions
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| Home > Image structure and generation > Type 1 image, one load region and contiguous execution regions | |||
A Type 1 image consists of a single load region in the load view and three execution regions placed contiguously in the memory map. This approach is suitable for systems that load programs into RAM, for example, an OS bootloader or a desktop system.
Use the following command for images of this type:
armlink --ro_base 0x8000
Note
0x8000 is the default address, so you do
not have to specify --ro_base for the example.
Load viewThe single load region consists of the RO and RW output sections, placed consecutively. The RO and RW execution regions are both root regions. The ZI output section does not exist at load time. It is created before execution, using the output section description in the image file.
The three execution regions containing the RO, RW, and ZI output sections are arranged contiguously. The execution addresses of the RO and RW execution regions are the same as their load addresses, so nothing has to be moved from its load address to its execution address. However, the ZI execution region that contains the ZI output section is created at run-time.
Use armlink option --ro_base to
specify the load and execution address of the region containing
the RO output. The default address is address0x8000.
Use the --zi_base command-line option to
specify the base address of a ZI execution region.
| Copyright © 2007-2008, 2011-2012 ARM. All rights reserved. | ARM DUI 0377D |
| Non-Confidential | ID062912 |
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