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Linker User Guide
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Overview of the linker
Linking models supported by armlink
Image structure and generation
The image structure
Input sections, output sections, regions, and Prog
Load view and execution view of an image
Methods of specifying an image memory map with the
Types of simple image
Type 1 image, one load region and contiguous execu
Type 2 image, one load region and non-contiguous e
Type 3 image, two load regions and non-contiguous
Image entry points
About specifying an initial entry point
Section placement with the linker
Placing sections with FIRST and LAST attributes
Section alignment with the linker
Demand paging
About ordering execution regions containing Thumb
Overview of veneers
Veneer sharing
Veneer types
Generation of position independent to absolute ven
Reuse of veneers when scatter-loading
Using command-line options to control the generati
About weak references and definitions
How the linker performs library searching, selecti
Controlling how the linker searches for the ARM st
Specifying user libraries when linking
How the linker resolves references
Use of the strict family of options in the linker
Using linker optimizations
Getting information about images
Accessing and managing symbols with armlink
Using scatter files
Linker User Guide
Type 2 image, one load region and non-contiguous execution regions
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| Home > Image structure and generation > Type 2 image, one load region and non-contiguous execution regions | |||
A Type 2 image consists of a single load region, and three execution regions in execution view. The RW execution region is not contiguous with the RO execution region. This approach is used, for example, for ROM-based embedded systems, where RW data is copied from ROM to RAM at startup:
Use the following command for images of this type:
armlink --ro_base 0x0 --rw_base 0xA000
Load viewIn the load view, the single load region consists of the RO and RW output sections placed consecutively, for example, in ROM. Here, the RO region is a root region, and the RW region is non-root. The ZI output section does not exist at load time. It is created at runtime.
In the execution view, the first execution region contains the RO output section and the second execution region contains the RW and ZI output sections.
The execution address of the region containing the RO output section is the same as its load address, so the RO output section does not have to be moved. That is, it is a root region.
The execution address of the region containing the RW output section is different from its load address, so the RW output section is moved from its load address (from the single load region) to its execution address (into the second execution region). The ZI execution region, and its output section, is placed contiguously with the RW execution region.
Use armlink options --ro_base to
specify the load and execution address for the RO output section,
and address--rw_base to
specify the execution address of the RW output section. If you do
not use the exec_address--ro_base option to specify the address,
the default value of 0x8000 is used by armlink.
For an embedded system, 0x0 is typical for the --ro_base value.
If you do not use the --rw_base option to specify
the address, the default is to place RW directly above RO (as in
a Type 1 image).
Use the --zi_base command-line option to
specify the base address of a ZI execution region.
Note
The execution region for the RW and ZI output sections cannot overlap any of the load regions.
| Copyright © 2007-2008, 2011-2012 ARM. All rights reserved. | ARM DUI 0377D |
| Non-Confidential | ID062912 |
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