Linker User GuideConventions and feedback Overview of the linker Linking models supported by armlink Image structure and generation The image structure Input sections, output sections, regions, and Prog Load view and execution view of an image Methods of specifying an image memory map with the Types of simple image Type 1 image, one load region and contiguous execu Type 2 image, one load region and non-contiguous e Type 3 image, two load regions and non-contiguous Image entry points About specifying an initial entry point Section placement with the linker Placing sections with FIRST and LAST attributes Section alignment with the linker Demand paging About ordering execution regions containing Thumb Overview of veneers Veneer sharing Veneer types Generation of position independent to absolute ven Reuse of veneers when scatter-loading Using command-line options to control the generati About weak references and definitions How the linker performs library searching, selecti Controlling how the linker searches for the ARM st Specifying user libraries when linking How the linker resolves references Use of the strict family of options in the linker Using linker optimizations Getting information about images Accessing and managing symbols with armlink Using scatter files
Linker User Guide
Type 2 image, one load region and non-contiguous execution regions
A Type 2 image consists of a single load region, and three execution regions in execution view. The RW execution region is not contiguous with the RO execution region. This approach is used, for example, for ROM-based embedded systems, where RW data is copied from ROM to RAM at startup:
Use the following command for images of this type:
armlink --ro_base 0x0 --rw_base 0xA000
In the load view, the single load region consists of the RO and RW output sections placed consecutively, for example, in ROM. Here, the RO region is a root region, and the RW region is non-root. The ZI output section does not exist at load time. It is created at runtime.
In the execution view, the first execution region contains the RO output section and the second execution region contains the RW and ZI output sections.
The execution address of the region containing the RO output section is the same as its load address, so the RO output section does not have to be moved. That is, it is a root region.
The execution address of the region containing the RW output section is different from its load address, so the RW output section is moved from its load address (from the single load region) to its execution address (into the second execution region). The ZI execution region, and its output section, is placed contiguously with the RW execution region.
Use armlink options
The execution region for the RW and ZI output sections cannot overlap any of the load regions.